Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 10/21/2025 has been entered.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Chawla et al. (U.S. Pat. No. 9,262,197), hereinafter Chawla, in view of Peterson (US Pub. No. 2009/0083829), hereinafter Peterson.
Referring to claim 16, Chawla discloses a method comprising:
receiving, by a virtualization acceleration device including a processor (I/O acceleration device, Fig. 2, elements 250, 252), a remote control message sent by a remote control device (remote control messages sent by external devices to the acceleration device for controlling peripherals and physical machine behavior, Col. 5, lines 8–21) for conducting a remote control of a physical machine (a physical machine through PCI-E connections, Col. 2, lines 15–22);
Peterson discloses, what Chawla lacks, writing the remote control message (writing via control instruction exchanged between guest OS and CPU, Fig. 5A–5D, steps S302–S316) into a shared memory (idle loop and interrupt descriptor table used as shared memory structures, Fig. 4, elements 250 and 252) on the virtualization acceleration device (controller kernel managing native instruction exchange, Fig. 3, element 215) to be read by a virtualized peripheral controller (hardware control sub-modules including NIC, keyboard, mouse, audio, and video interfaces, Fig. 6, elements 408–442); and remotely controlling (guest OSs A–D exchanging native-form instructions to control terminals, Fig. 5A–5D, steps S316, S354, S372) the physical machine through the virtualized peripheral controller (hardware control sub-modules including NIC, keyboard, mouse, audio, and video interfaces, Fig. 6, elements 408–442) on the virtualization acceleration device according to the remote control message (POSIX kernel passing native I/O instructions, Fig. 4, 215a–b; Fig. 6, 410).
Chawla and Peterson are analogous art because they are from the same field of endeavor: virtualization systems enabling peripheral or remote device control in computing architectures.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Chawla and Peterson before him or her, to modify the virtualization acceleration system of Chawla to include: the shared memory mechanism and messaging flow between the processor and peripheral controller as taught by Peterson.
The suggestion/motivation for doing so would have been to enable modular control logic and reduce latency by separating processing and peripheral handling functions in a virtualized system.
Therefore, it would have been obvious to combine Peterson with Chawla to obtain the invention as specified in the instant claim.
Claim 20 recite the corresponding limitation of claim 16. Therefore, they are rejected accordingly.
Allowable Subject Matter
Claims 17 – 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Allowable Subject Matter
Claims 1 – 15 are allowed.
The following is an examiner’s statement of reasons for allowance:
the prior art, does not teach or fairly suggest:
In claim 1: the virtualization acceleration device includes a register corresponding to the virtualized peripheral controller: and the register is mapped to a configuration space of the virtualization acceleration device to implement the virtualized peripheral controller, a value of the register in the configuration space identifying the virtualized peripheral controller.
Further the combination of the above limitations with all of the other limitations in the respective independent claim is not obvious.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUANITO C BORROMEO whose telephone number is (571)270-1720. The examiner can normally be reached on Monday - Friday 9 - 5.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Henry Tsai can be reached on 5712724176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JUANITO C BORROMEO/ Assistant Examiner, Art Unit 2184
/HENRY TSAI/ Supervisory Patent Examiner, Art Unit 2184