Prosecution Insights
Last updated: August 18, 2026
Application No. 18/481,894

CONFIGURABLE RECEIVE PATH FOR MIXER-FIRST OR AMPLIFIER-FIRST SIGNAL PROCESSING

Non-Final OA §103
Filed
Oct 05, 2023
Priority
Sep 22, 2021 — divisional of 11/799,507
Examiner
TSVEY, GENNADIY
Art Unit
2648
Tech Center
2600 — Communications
Assignee
Qualcomm Incorporated
OA Round
3 (Non-Final)
60%
Grant Probability
Moderate
3-4
OA Rounds
0m
Est. Remaining
84%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allowance Rate
465 granted / 769 resolved
-1.5% vs TC avg
Strong +24% interview lift
Without
With
+23.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
37 currently pending
Career history
812
Total Applications
across all art units

Statute-Specific Performance

§101
3.0%
-37.0% vs TC avg
§103
55.4%
+15.4% vs TC avg
§102
11.3%
-28.7% vs TC avg
§112
24.6%
-15.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 769 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 06/09/2026 has been entered. In view of applicant’s amendment and arguments regarding objections to the claims, the objection is hereby withdrawn. In view of applicant’s amendment and arguments regarding rejection of claim(s) 8, 9, 17 and 18 under 35 U.S.C. 112(a) and (b) or pre-AIA 35 U.S.C. 112, first and/or second paragraph, set forth in the previous Office Action, the rejection(s) is/are hereby withdrawn. The applicant’s arguments have been considered but are moot in view of new ground(s) of rejections necessitated by the applicant’s amendment. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 – 3, 5 – 10 and 12 – 18 are rejected under 35 U.S.C. 103 as being unpatentable over US 20070111661 (Bargroff) in view of CN 101483408 (Ma) (references are given according to English translation) and further in view of US 10320350 (Leitner). Regarding claims 1 and 13, Bargroff in FIG 10 with corresponding description teaches “A receiver (paragraph 0139: the receiver of FIG. 1 can include LNB modules connected to an integrated circuit implementation of the crosspoint switch with band translation 1000. Also see Sketch 1 showing a portion of FIG 10 that is specifically mapped to the limitations of this claim), comprising: an input port configured to receive an RF input signal (paragraph 0144: The differential input 1012a of the first LNA 1010a); an amplifier coupled to the input port (paragraph 0143: a first low noise amplifier (LNA) 1010a); a first path comprising the amplifier…” “…and the first set of mixers (“a first path” comprising the LNA 1010a, both in-phase and inverted outputs from the amplifier including a common portion 1014a and through the switches 1022a and 1026a into the differential inputs of the first band translation device 1030a (mixer). Since the first band translation device 1030a has differential inputs and outputs, it necessarily comprises a “set of mixers”, thus being “a first set of mixers”); a second path comprising…” “…and the second set of mixers (“a second path” comprising both in-phase and inverted outputs from the amplifier including a common portion 1014a and through the switches 1024a and 1028a into the differential input of the second band translation device 1030b (mixer). Since the second band translation device 1030b has differential inputs and outputs, it necessarily comprises a “set of mixers”, thus being “a second set of mixers”)…” “…wherein the first path and the second path share a common portion after an output of the amplifier (represented by both wires of the common portion 1014a), and wherein the first path further comprises a first switching element coupled between the common portion and the first set of mixers (represented by the switch 1022a connected between the common portion 1014a and the first band translation device 1030a); and baseband processing circuitry coupled to one or both of the first set of mixers and the second set of mixers (implicit, directly or indirectly coupled to the output of both translation devices 1030a and 1030b).” PNG media_image1.png 785 1427 media_image1.png Greyscale Sketch 1 Bargroff does not disclose presence of “a matching network” in the second path, “wherein the amplifier is not part of the second path”. Leitner teaches a system and method for bypassing a low noise amplifier (LNA) (col. 1 lines 7 – 8). As further explained in col. 1 lines 27 – 41, in some signal environments, the received RF signal may vary over a few orders of magnitude depending on the relative locations of the transmitter and receiver and depending on the amount of power being transmitted. To address this situation, the LNA may be bypassed to increase system linearity. One of the solutions given by Leitner is shown in FIG 2A with corresponding description and a practical implementation of the design is shown in FIG 3D with description appearing in col. 8 lines 4 – 20. Particularly, it includes a bypass switch 332 and a matching network 322. It also includes two paths: one through amplifier and another through the bypass switch as shown in Sketch 2 below which is based on Leitner’s FIG 3D with the Examiner’s annotations: PNG media_image2.png 860 1095 media_image2.png Greyscale Sketch 2 Therefore, it would have been obvious to a person of ordinary skill in the art at the effective filing date of the application to utilize disclosed by Leitner circuit arrangement for bypassing low noise amplifier, in the system of Bargroff. Doing so would have allowed to address a situation in which the received RF signal may vary over a few orders of magnitude depending on the relative locations of the transmitter and receiver and depending on the amount of power being transmitted, thus increasing the system linearity (see Leitner, col. 1 lines 27 – 38). Bargroff does not disclose presence of “adjustable transistors coupled” (“adjustable gain control transistors”, as in claim 13) within the second path prior to “a second set of mixers”. Bargroff in paragraph 0144 teaches connecting a high isolation switch configuration to the output of the first LNA 1010a, and in paragraph 0153 states that FIGS. 11A-11D are embodiments of high isolation switches. Each of the switch embodiments of FIGS. 11A-11D are single-ended configurations. The switch embodiments can be duplicated to allow switching of in-phase and inverted signals of differential signals. Thus, a pair of switches from FIGS. 11A-11D can be used as the switch pairs of FIG. 10. Paragraph 0156: FIG. 11C is a third switch embodiment having multiple transistors configured to provide increased signal isolation. Bargroff does not disclose presence of “resistors coupled between the amplifier and a first set of mixers” (“degeneration resistors”, as in claim 13) within the first path. Additionally, Bargroff does not disclose structure of the band translation devices 1030, thus prompting a person of ordinary skill in the art to search for additional references. In this respect, Ma in FIG 1 teaches a traditional differential passive mixer structure having resistors R1 and R2 at its differential inputs. Therefore, since Bargroff does not disclose structure of the band translation devices 1030, it would have been obvious to a person of ordinary skill in the art at the effective filing date of the application to utilize disclosed by Ma structure of a traditional differential mixer simply to fill in where Bargroff is silent and since, according to the Supreme Court, “[t]he combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results.” KSR Int’l Co. v. Teleflex, Inc., 550 U.S. 398, 416 (2007). The Examiner made Sketch 3 that includes Bargroff’s circuit of FIG 10 (only with respect to the upper portion) modified with using Bargroff’s switch of FIG 11C in place of each of the switches 1022a – 1028a as well as with using Ma’s differential passive mixer as each of the band translation devices 1030 and Leitner’s bypass arrangements implemented for differential low noise amplifier. Correspondence between the claim and the resulting structure is also shown in Sketch 3 specifically pointing out position of the resistors and adjustable transistors as well as first and second paths. PNG media_image3.png 1175 1574 media_image3.png Greyscale Sketch 3 Thus, the structure shown in Sketch 3 meets the limitations of independent claims 1 and 13. Regarding claim 2, Bargroff in combination with Ma and Leitner teaches “wherein the baseband processing circuitry is coupled to both the first set of mixers and the second set of mixers (implicit, directly or indirectly coupled to the output of both translation devices 1030a and 1030b), wherein the second path is coupled to the input port without a low noise amplifier therebetween (as may be seen from Sketch 3 above, the line representing signal path marked as “second path” does not include LNA 1010a), and wherein the receiver is configured to couple the input port to only one of the first path or the second path at a time (see Leitner, col. 6 lines 8 – 16: Bypass switch 332, which includes transistors T5, T6, T7, T8 and T9, is configured to route the output of LNA 330 to output pin RFOUT by turning-on transistor T9 when LNA 330 is active during an “LNA mode.” During the LNA mode, transistors T5, T6 and T8 that connect the input of LNA 330 to output pin RFOUT are turned-off. When LNA 330 is bypassed in a “bypass mode,” the input of LNA 330 transistor is coupled to output pin RF out by turning-on transistors T5, T6 and T8 and turning-off transistor T9. In other words, by means of operating the switches, the signal can pass either through the matching network (as part of the “second path”) or through the LNA (as part of the “first path”) (“only one of the first path or the second path at a time”), but not both simultaneously).” Regarding claim 3, Bargroff in combination with Ma and Leitner teaches “wherein the baseband processing circuitry is coupled to the first set of mixers, the receiver further comprising second baseband processing circuitry coupled to the second set of mixers (in Bargroff it is implicit, baseband processing circuitry is directly or indirectly coupled to the output of both translation devices 1030a and 1030b. Therefore, the part of the circuitry coupled to the translation device 1030a may be called “the baseband processing circuitry”, while the part of the circuitry coupled to the translation device 1030b may be called “second baseband processing circuitry”), wherein the second path is coupled to the input port without a low noise amplifier therebetween (as may be seen from Sketch 3 above, the line representing signal path marked as “second path” does not include LNA 1010a), and wherein the receiver is configured to couple the input port to one (see Leitner, col. 6 lines 8 – 16: Bypass switch 332, which includes transistors T5, T6, T7, T8 and T9, is configured to route the output of LNA 330 to output pin RFOUT by turning-on transistor T9 when LNA 330 is active during an “LNA mode.” During the LNA mode, transistors T5, T6 and T8 that connect the input of LNA 330 to output pin RFOUT are turned-off. When LNA 330 is bypassed in a “bypass mode,” the input of LNA 330 transistor is coupled to output pin RF out by turning-on transistors T5, T6 and T8 and turning-off transistor T9. In other words, by means of operating the switches, the signal can pass either through the matching network (as part of the “second path”) or through the LNA (as part of the “first path”) so that the input port is coupled to one of the paths) or both of the first path and the second path (“both of the first path and the second path” may be coupled to the input, but sequentially, not at the same time, which is not forbidden by the claim language.).” Regarding claim 5, Bargroff in combination with Ma teaches “wherein the first path and the second path are separate prior to the first set of mixers and the second set of mixers (as may be seen from Sketch 3 above, these are separate paths just prior to each set of mixers).” Regarding claim 6, Bargroff in combination with Ma teaches or fairly suggests “wherein the amplifier comprises a low noise amplifier (LNA) coupled between the input port and the first set of mixers (Bargroff, paragraph 0143: a first low noise amplifier (LNA) 1010a which is shown to be connected as the claim requires).” Regarding claim 7, Bargroff in combination with Ma teaches or fairly suggests “wherein the resistors comprise degeneration resistors coupled to mixers of the first set of mixers (Ma, paragraph 0031: resistors R1 and R2 connected to the differential inputs of the mixer) and the adjustable transistors comprise configurable gain control elements coupled to the second set of mixers (mapped to specifically transistors 1122 and 1124 in the second path in Sketch 3 above (from Bargroff’s FIG 11C).).” Regarding claims 8 and 17, Bargroff in combination with Ma and Leitner teaches or fairly suggests “further comprising: RF input switches coupled between the input port and the resistors and between the input port and the adjustable transistors (see Sketch 3 above: switches at the input and output of the matching circuit and the switches at the output of the LNA are connected as the claim requires), wherein the RF input switches are configured to couple the input port to only one of the first path or the second path at a time (see Leitner, col. 6 lines 8 – 16: Bypass switch 332, which includes transistors T5, T6, T7, T8 and T9, is configured to route the output of LNA 330 to output pin RFOUT by turning-on transistor T9 when LNA 330 is active during an “LNA mode.” During the LNA mode, transistors T5, T6 and T8 that connect the input of LNA 330 to output pin RFOUT are turned-off. When LNA 330 is bypassed in a “bypass mode,” the input of LNA 330 transistor is coupled to output pin RF out by turning-on transistors T5, T6 and T8 and turning-off transistor T9. In other words, by means of operating the switches, the signal can pass either through the matching network (as part of the “second path”) or through the LNA (as part of the “first path”) (“only one of the first path or the second path at a time”), but not both simultaneously).” Regarding claims 9 and 18, Bargroff in combination with Ma and Leitner teaches or fairly suggests “wherein the receiver is configured to couple the input port to one or both of the first path and the second path (switching transistors 1120 on or off in a path would couple the respective path to the input port. “Both of the first path and the second path” may be coupled to the input, but sequentially, not at the same time. Bargroff, paragraph 0146: A switch connected to the in-phase output, for example 1022a, is typically paired with a switch on the inverted output, for example 1026a, such that a differential signal is selectively connected by the switch pair 1022a, 1026a. Par. 0147: A second switch pair 1024a, 1028a selectively connects the differential output of the first LNA 1010a to the second band translation device 1030b. The same applies to the switches at the input and output of the matching circuit and the switches at the output of the LNA shown in Sketch 3 above, which operate as the claim requires).” Regarding claim 10, Bargroff in combination with Ma and Leitner teaches or fairly suggests “the matching network is coupled between the input port and the adjustable transistors (as shown in Sketch 3 above, the matching network is positioned between the input port and the adjustable transistors 1122 and 1124).” Regarding claim 12, Bargroff in combination with Leitner teaches or fairly suggests “further comprising: logic circuitry (Leitner, Col. 7 lines 25 – 30: the operation mode of LNA integrated circuit 300 may be selected by providing a digital control signal via interface pin SER to interface and control logic 314 that controls the on and off state of transistors T3, T4, T5, T6, T7, T8 and T9, via control signals S3, S4, S5, S6, S7, S8 and S9. Col. 8 lines 61 – 63: The control of the selection and bypassing of each of LNAs 404 may be controlled by interface and control logic block 412. Col. 9 lines 13 – 18: Bypass controller 508 is configured to provide mode selection data to LNA integrated circuit 504 based on input from RF receiver 506 or other controller. For example, when RF receiver 506 detects that the input signal from antenna 502 is at a high level, it may instruct bypass controller 508 to select the bypass mode.) configured to determine whether criteria are met for switching between a mixer-first configuration and an amplifier-first configuration (Leitner, FIG 6 and col. 9 lines 21 – 30: In step 604, a decision is made whether to operate the LNA in an LNA mode in which the LNA actively amplifies the received RF signal (“an amplifier-first configuration”), or to operate the LNA in a bypass mode in which the LNA is bypassed (“a mixer-first configuration”). This decision may be made, for example, according to a measured amplitude of the received RF signal. The LNA mode is selected when the amplitude of the received RF signal is low and the bypass mode is selected when the amplitude of the received RF signal is high.); and a radio frequency front end (RFFE) coupled to the receiver (Leitner, FIG 3D), wherein the RFFE comprises a filter (Leitner, col. 8 lines 21 – 24: FIG. 3E illustrates an LC matching network 323 that can be used to implement matching network 322 shown in FIG. 3D. As shown, the LC matching network 323 includes a shunt capacitor CMATCH and a series inductor LMATCH. Although disclosed as a matching network, the circuit shown in FIG 3E is a low-frequency filter) and a low noise amplifier (LNA) (Leitner, LNA 330 in FIG 3D), wherein the logic circuitry is configured to bypass at least one of the filter or the LNA of the RFFE based on the criteria (Leitner, FIG 6 and col. 9 lines 21 – 30: In step 604, a decision is made whether to operate the LNA in an LNA mode in which the LNA actively amplifies the received RF signal (in this case “bypass at least one of the filter” is fulfilled), or to operate the LNA in a bypass mode in which the LNA is bypassed (in this case “bypass at least one of … the LNA” is fulfilled). This decision may be made, for example, according to a measured amplitude of the received RF signal. The LNA mode is selected when the amplitude of the received RF signal is low and the bypass mode is selected when the amplitude of the received RF signal is high.).” Regarding claim 14, Bargroff in combination with Ma and Leitner teaches or fairly suggests “wherein the second path is coupled to the input port without a low noise amplifier therebetween (as may be seen from Sketch 3 above, the line representing signal path marked as “second path” does not include LNA 1010a), and wherein the matching network is coupled between the input port and the adjustable gain control transistors (as shown in Sketch 3 above, the matching network is positioned between the input port and the adjustable transistors 1122 and 1124).” Regarding claim 15, Bargroff in combination with Ma teaches or fairly suggests “wherein the baseband processing circuitry is coupled to both the first set of mixers and the second set of mixers (although not shown in FIG 10 of Bargroff, it is implicit, either directly or indirectly).” Regarding claim 16, Bargroff in combination with Ma teaches or fairly suggests “wherein the baseband processing circuitry is coupled to the first set of mixers (although not shown in FIG 10 of Bargroff, it is implicit, either directly or indirectly connected to the band translation device 1030a), the receiver further comprising second baseband processing circuitry coupled to the second set of mixers (although not shown in FIG 10 of Bargroff, it is implicit, either directly or indirectly connected to the band translation device 1030b).” Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over US 20070111661 (Bargroff) in view of CN 101483408 (Ma) (references are given according to English translation) and further in view of US 10141907 (Klaren). Claim 21 depends from claim 1 and, therefore, it is rewritten to include the limitations of claim 1. Regarding claim 21, Bargroff teaches “A receiver, comprising: an input port configured to receive an RF input signal; an amplifier coupled to the input port; a first path comprising the amplifier, resistors coupled between the amplifier and a first set of mixers, and the first set of mixers; a second path comprising…” “…adjustable transistors coupled between the matching network and a second set of mixers, and the second set of mixers…” “…wherein the first path and the second path share a common portion after an output of the amplifier, and wherein the first path further comprises a first switching element coupled between the common portion and the first set of mixers; and baseband processing circuitry coupled to one or both of the first set of mixers and the second set of mixers (the limitations above are rejected over a combination of Bargroff and Ma as explained in the rejection of claim 1 above, the explanation being incorporated herein by reference)…” Bargroff does not disclose presence of “a matching network” in the second path, “wherein the amplifier is not part of the second path” as well as “a second switching element coupled between the input port and the amplifier, the second switching element different from the first switching element; a third switching element coupled between the input port and the common portion, the third switching element different from the second switching element; and logic circuitry configured to determine whether criteria are met for switching between a mixer-first configuration and an amplifier-first configuration, wherein: in the mixer-first configuration, the first switching element and the second switching element are toggled off, and the third switching element is toggled on, and in the amplifier-first configuration, the first switching element and the second switching element are toggled on, and the third switching element is toggled off.” Klaren teaches a method of filtering and impedance matching (see col. 3 lines 13 – 14) as well as a front end arrangement having switches S2 and S3 used to bypass the LNA 13 in cases where the received signal strength is high and therefore the LNA gain is no longer needed (see col. 1 lines 40 – 43). The design is shown in FIG 6A with corresponding description. Particularly, it includes bypass switches S2 and S3 to bypass the LNA, and a combined filter and impedance match block 630A (see col. 4 lines 23 – 25). It also includes two paths: one through the LNA and another through the bypass switches as shown in Sketch 4 below which is based on Klaren’s FIG 6A with the Examiner’s annotations: PNG media_image4.png 700 1135 media_image4.png Greyscale Sketch 4 Therefore, it would have been obvious to a person of ordinary skill in the art at the effective filing date of the application to utilize disclosed by Klaren circuit arrangement for bypassing low noise amplifier, in the system of Bargroff. Doing so would have allowed to bypass the low noise amplifier in cases where the received signal strength is high and therefore the LNA gain is no longer needed (see Klaren col. 1 lines 40 – 43). The Examiner made Sketch 5 that includes Bargroff’s circuit of FIG 10 (only with respect to the upper portion) modified with using Bargroff’s switch of FIG 11C in place of each of the switches 1022a – 1028a as well as with using Ma’s differential passive mixer as each of the band translation devices 1030 and Klaren’s front-end arrangement utilizing bypass switches implemented for differential low noise amplifier. Correspondence between the claim and the resulting structure is also shown in Sketch 5 specifically pointing out position of the resistors and adjustable transistors as well as first and second paths. PNG media_image5.png 950 1671 media_image5.png Greyscale Sketch 5 Thus, the structure shown in Sketch 5 meets the limitations of independent claim 1. With respect to matching network, it is part of both first and second paths, which is not forbidden by the claim language. the structure shown in Sketch 5 also meets the requirements of claim 21 as following: “further comprising: a second switching element coupled between the input port and the amplifier, the second switching element different from the first switching element (see marking in Sketch 5 showing positions of the switching elements); a third switching element coupled between the input port and the common portion, the third switching element different from the second switching element (see marking in Sketch 5 showing positions of the switching elements); and logic circuitry configured to determine whether criteria are met for switching between a mixer-first configuration and an amplifier-first configuration (implicit in Klaren, see col. 1 lines 40 – 43: switches S2 and S3 used to bypass the LNA 13 in cases where the received signal strength is high and therefore the LNA gain is no longer needed. Therefore, this limitation maps to the implicitly present logic that makes determination whether the received signal strength is high so to bypass the low noise amplifier (thus resulting in “a mixer-first configuration”), or not high so to include the low noise amplifier in the signal path (thus resulting in “an amplifier-first configuration”)), wherein: in the mixer-first configuration…” “…the second switching element are toggled off (as shown in Sketch 5 above, when the amplifier is bypassed, “the second switching element” is in upper position which may be considered “off” for the amplifier), and the third switching element is toggled on (as shown in Sketch 5 above, when the amplifier is bypassed, “the third switching element” is in upper position, which may be considered as “on” for the bypass loop), and in the amplifier-first configuration…” “…the second switching element are toggled on (although not explicitly shown in Sketch 5 above, when the amplifier is NOT bypassed, “the second switching element” is in lower position which may be considered “on” for the amplifier), and the third switching element is toggled off (although not explicitly shown in Sketch 5 above, when the amplifier is NOT bypassed, “the third switching element” is in lower position, which may be considered as “off” for the bypass loop).” With respect to “the first switching element”, also shown in Sketch 5 above and corresponding to 1022a of Bargroff’s FIG 10, as disclosed in Bargroff’s paragraph 0143, it is either on or off depending on specific frequency band to be received. Therefore, in such particular cases as if “in the mixer-first configuration”, and the second frequency band is to be utilized, “the first switching element” 1022a will be in the off position, and if “in the amplifier-first configuration”, and the first frequency band is to be utilized, “the first switching element” 1022a will be in the on position, thus meeting the limitations of the claim. Allowable Subject Matter Claims 11, 20 and 22 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to GENNADIY TSVEY whose telephone number is (571)270-3198. The examiner can normally be reached Mon-Fri 9-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wesley Kim can be reached at 571-272-7867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GENNADIY TSVEY/ Primary Examiner, Art Unit 2648
Read full office action

Prosecution Timeline

Oct 05, 2023
Application Filed
Sep 30, 2025
Non-Final Rejection mailed — §103
Dec 30, 2025
Response Filed
Feb 09, 2026
Final Rejection mailed — §103
Jun 09, 2026
Request for Continued Examination
Jun 12, 2026
Response after Non-Final Action
Jul 22, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
60%
Grant Probability
84%
With Interview (+23.9%)
2y 10m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 769 resolved cases by this examiner. Grant probability derived from career allowance rate.

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