DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Examiner Notes
Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Response to Applicants’ Arguments/Remarks
In response to Applicants' arguments/remarks regarding to the prior objection to the specification.
Applicants’ argument that the limitations “a third capacitor coupled between the output and the first pulse input; and a fourth capacitor coupled between the output and the second pulse input,” as recited in claim 1, are fully supported by the application as originally filed is not persuasive. Applicants contend that, as shown in FIG. 9A (reproduced below) or FIG. 13A, capacitor Cup2 is coupled between output node 936 (or 1336) and the first pulse input “Up” for example, through inverter 929, and that capacitor Cdn2 is coupled between output node 937 (or 1337) and the second pulse input “Dn bar” through inverter 927. Applicants further contend that output node 937 (or 1337) may be shorted to output node 936 (or 1336) by extra switch 932, thereby allowing the Up and Dn network charge states to be shared. However, the Examiner respectfully disagrees. Based on the original disclosure filed on January 12, 2021, and as illustrated in FIGS. 9A and 13A, capacitor Cup2 is connected between output node 936 (or 1336) and the output of inverter 929, rather than directly between output node 936 (or 1336) and the first pulse input “Up” Similarly, capacitor Cdn2 is connected between output node 937 (or 1337) and the output of inverter 927, rather than directly between output node 937 (or 1337) and the second pulse input “Dn bar”. More particularly, as illustrated by the basic inverter structure reproduced below, the output of an inverter is selectively coupled to a power-supply terminal or a ground terminal depending upon the logic state applied to the inverter input. Thus, when the input signal “Up” is at a logic-low level, the terminal of capacitor Cup2 connected to the output of inverter 929 is coupled to power-supply terminal Vreg. Conversely, when the input signal “Up” is at a logic-high level, that terminal of capacitor Cup2 is coupled to ground (GND). Accordingly, Cup2 is connected between output node 936 (or 1336) and the output of inverter 929, whose electrical state is controlled by the “Up” signal; the figure does not disclose Cup2 as being connected between output node 936 (or 1336) and the “Up” pulse-input node itself.
Likewise, when the input signal “Dn bar” is at a logic-low level, the terminal of capacitor Cdn2 connected to the output of inverter 927 is coupled to power-supply terminal Vreg. When the input signal “Dn bar” is at a logic-high level, that terminal of capacitor Cdn2 is coupled to ground (GND). Thus, Cdn2 is connected between output node 937 (or 1337) and the output of inverter 927, rather than between output node 937 (or 1337) and the “Dn bar” pulse-input node itself. The fact that the states of the respective inverter outputs are controlled by the “Up” and “Dn bar” input signals does not, without more, provide a disclosure that the capacitors are coupled between the output and the respective pulse inputs, as presently recited in claim 1. Rather, the originally filed figures disclose intervening inverter circuitry between each pulse input and the corresponding capacitor terminal.
Therefore, the Examiner finds that the limitation “a third capacitor coupled between the output and the first pulse input; and a fourth capacitor coupled between the output and the second pulse input,” as recited in claim 1, is not supported by the application as originally filed. In particular, the relied-upon disclosure does not describe, and FIGS. 9A, 10, 11A, and 13A do not show, the claimed capacitor-to-pulse-input coupling. Accordingly, Applicants’ argument has been fully considered but is not persuasive.
Similarly, the Examiner finds that the limitation “a third capacitor coupled between the converter output and the first input; and a fourth capacitor coupled between the converter output and the second input,” as recited in claim 32, is not supported by the application as originally filed. Specifically, the originally filed disclosure neither describes nor illustrates the third and fourth capacitors as being coupled between the converter output and the respective first and second inputs, as presently claimed. Accordingly, the Examiner finds that the subject matter recited in claim 32 lacks support in the application as originally filed.
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In response to the rejection of claims 1–8, 21–24, and 32–36 under 35 U.S.C. § 112 for failure to comply with the written description requirement, Applicants argue that, as discussed above with respect to the objections to the Specification, the disputed features of claims 1 and 32 are disclosed at least in FIGS. 9A and 11A of the application as originally filed. Applicants therefore contend that these features are fully supported by the original disclosure and respectfully request reconsideration and withdrawal of the rejections of claims 1 and 32 and their dependent claims under 35 U.S.C. § 112. Applicants’ arguments have been fully considered but are not persuasive.
As discussed above with respect to the objections to the Specification, the Examiner respectfully disagrees with Applicants’ position. In particular, the disputed features of claims 1 and 32 are neither described in the Specification nor illustrated in FIGS. 9A and 11A of the application as originally filed in a manner that provides written description support for the presently claimed subject matter. Accordingly, the relied-upon portions of the original disclosure do not reasonably convey to one of ordinary skill in the art that the inventor had possession of the subject matter presently recited in claims 1 and 32 as of the filing date.
Therefore, Applicants’ arguments do not overcome the written description rejection. The rejection of independent claims 1 and 32, and dependent claims 2–8, 21–24, and 33–36, under 35 U.S.C. § 112 for failure to comply with the written description requirement is maintained, as set forth below.
Specification
The specification remains objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). Correction of the following is required: the claimed limitation such as “a third capacitor coupled between the output and the first pulse input; and a fourth capacitor coupled between the output and the second pulse input” (emphasis added), as recited in the base claim 1, is neither described in the specification nor shown in the figures (Figs. 9A, 10, 11A & 13A, as elected Species A on 07/15/2004) of the present application. Clarification is required.
The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). Correction of the following is required: the claimed limitation such as “a third capacitor coupled between the converter output and the first input; and a fourth capacitor coupled between the converter output and the second input” (emphasis added), as recited in the base claim 32, is neither described in the specification nor shown in the figures (Figs. 9A, 10, 11A & 13A, as elected Species A on 07/15/2004) of the present application. Clarification is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-8, 21-24 and 35 remain rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The newly amended limitation such as “a third capacitor coupled between the output and the first pulse input; and a fourth capacitor coupled between the output and the second pulse input” (emphasis added), as recited in the base Claim 1; is not properly described in the application as to possession of the claimed invention at the time of filing. Therefore, that limitation is seen as a new matter which is not supported by the original disclosure. Applicant is required to cancel the new matter in the reply to this Office Action.
Furthermore, claims 2-8, 21-14 and 35 are rejected due to their dependencies on Claim 1.
Claims 32-34 and 36 remain rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The newly amended limitation such as “a third capacitor coupled between the converter output and the first input; and a fourth capacitor coupled between the converter output and the second input” (emphasis added), as recited in the base claim 32, is not properly described in the application as to possession of the claimed invention at the time of filing. Therefore, that limitation is seen as a new matter which is not supported by the original disclosure. Applicant is required to cancel the new matter in the reply to this Office Action.
Furthermore, claims 33, 34 and 36 are rejected due to their dependencies on Claim 32.
Allowable Subject Matter
Claims 25-30 are allowed.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/HAI L NGUYEN/Primary Examiner, Art Unit 2836 October 1, 2026
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