DETAILED ACTION
This action is in response to claims filed 17 February 2026 for application 18483269 filed 09 October 2023. Currently claims 14-36 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Terminal Disclaimer
The terminal disclaimer filed on 17 February 2026 disclaiming the terminal portion of any patent granted on this application which would extend beyond the expiration date of 11,816,595 B2 has been reviewed and is accepted. The terminal disclaimer has been recorded.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 14, 15, 32 and 33 are rejected under 35 U.S.C. 102(A)(1) as being anticipated by Hayashi et al. (US 20160063391 A1).
Regarding claims 14, 32 and 33, Hayashi discloses:
An information processing apparatus, comprising:
a host unit connected to an Ising machine via an interface, the host unit being configured to control the Ising machine (“In order to solve the above-described problem, an information processing system that finds a solution of a problem by searching for a ground state of an Ising model is provided according to an aspect of the present invention, wherein the information processing system includes: a host unit equipped with one or more semiconductor chips that execute the ground-state search of the Ising model; an operation unit that provides a user interface for a user to designate the problem; and a management unit that converts the problem designated by the user by using the user interface into the Ising model and controls the host unit to have the semiconductor chip perform the ground-state search of the converted Ising model; wherein the user can designate, in addition to the problem, a condition for solving the problem by using the user interface; wherein the management unit generates an operating condition of the semiconductor chip according to the condition designated by the user and sends the generated operating condition and the Ising model of the problem designated by the user to the host unit; and wherein the host unit controls the semiconductor chip to perform the ground-state search of the Ising model sent from the management unit in accordance with the operating condition sent from the management unit.” [0019] 20160063391),
wherein:
the Ising machine includes a reconfigurable semiconductor device and is configured to perform a search process for searching for a ground state of an Ising model representing a combinatorial optimization problem (“The present invention relates to an information processing system and a management apparatus. Particularly, the invention is suited for use in an information processing system having a function solving problems such as combinatorial optimization by using semiconductor chips which perform a ground-state search of Ising models.” [0003], “In consideration of the above-described circumstances, the ground-state search of the Ising model should preferably be performed with a solid-state component such as a semiconductor device that can be implemented by regularly arranging numerous element units. Particularly, it is desirable that such a solid-state component has an array structure represented by a storage apparatus such as a DRAM (Dynamic Random Access Memory) or an SRAM (Static Random Access Memory) and the element unit has a simple structure to enhance accumulation ability. Therefore, in recent years; the applicant of the present application has been developing such semiconductor devices (hereinafter referred to as the Ising chips).” [0016]), and
the host unit is configured to:
prior to the search process,
acquire coefficient information including a plurality of coupling coefficients that define the Ising model (“The Ising chip 32 expresses all of the spin σi, the interaction coefficient Ji,j, and the external magnetic field coefficient hi of the Ising model with information stored in memory cells in the spin array 50. Setting of an initial state of the spin σi and reading of a solution after completion of the ground-state search are performed via the SRAM compatibility interface 54. Furthermore, with the Ising chip 32, reading/writing of the interaction coefficient Ji,j and the external magnetic field coefficient hi to set the Ising model, whose ground state should be searched, to the spin array 50 is also performed via the SRAM compatibility interface 54.” [0082], see also [0083]);
among a plurality of pieces of circuit information indicating circuits for the semiconductor device to perform the search process, select, based on a number of the plurality of coupling coefficients included in the coefficient information or an accuracy of a coupling coefficient included in the coefficient information [0082-83], one circuit information indicating a circuit capable of searching for the ground state of the Ising model, and reconfigure the Ising machine according to the selected circuit information (“Subsequently, the operating condition generation program 83 (FIG. 13) generates the solver operating conditions for the ground-state search processing to be executed at that time, based on the predefined solver operating conditions 87 (FIG. 15) and the conditions (the solution precision and the time limit) sent from the operation terminal 5 (SP11). Specifically speaking, when the required time for one ground-state search which is defined in the predefined solver operating conditions 87 is equal to or longer than the time limit designated by the user on the problem input screen 110, the operating condition generation program 83 generates the solver operating conditions obtained by reducing the number of repeats of interactions as defined in the predefined solver operating conditions 87 so that the required time for one ground-state search becomes shorter than the time limit.” [0163], “wherein the user can designate, in addition to the problem, a condition for solving the problem with the user interface; wherein the management unit generates an operating condition of the semiconductor chip in accordance with the condition designated by the user and sends the generated operating condition and the Ising model of the problem designated by the user to the host unit; and wherein the host unit controls the semiconductor chip to perform the ground-state search of the Ising model sent from the management unit in accordance with the operating condition sent from the management unit.” Claim 1).
Regarding claim 15, Hayashi discloses: The information processing apparatus according to claim 14, wherein, when a search process for searching for a ground state of a second Ising model is performed in a state where a first circuit capable of searching for a ground state of a first Ising model is configured in the semiconductor device (“The operating condition generation program 83 is a program having a function that generates operating conditions of an Ising chip 32 that satisfies the user's request based on conditions such as solution precision and limited which will be described later with reference to FIG. 20 and are designated by the user by using the operation terminal 5, and the predefined solver operating conditions 87 described later (hereinafter referred to as the solver operating conditions). Furthermore, the Ising control program 84 is a program having a function that controls individual Ising chips 32 (FIG. 2) in each Ising accelerator board 25 mounted in each host 3. Furthermore, the solution quality evaluation program 85 is a program having a function that evaluates the quality of a solution obtained by the ground-state search executed by the host 3.” [0122]),
the host unit is configured to (“Furthermore, the problem definition file 94 is a file which is created by the user in advance and in which a problem to be solved by using the Ising model is defined. For example, as shown in FIG. 18, the problem definition file 94 in which a linear programming problem is defined includes each piece of information about an objective function and constraints. FIG. 18 shows a problem to find x and y that minimizes “x+2y” under constraints of “x≧0” and “3x+2y<100.” Incidentally, FIG. 18 shows an example in which solver operating conditions that are target solution precision (objective) of “50”% or more and calculation time (Timelimit) of less than “50 sec” are also defined in the problem definition file 94; however, the solver operating conditions do not necessarily have to be defined in the problem definition file 94 in advance and may be designated on the problem input screen 110 described later with reference to FIG. 20.” [0135]):
determine whether the ground state of the second Ising model is searchable by the first circuit (“Subsequently, the operating condition generation program 83 (FIG. 13) generates the solver operating conditions for the ground-state search processing to be executed at that time, based on the predefined solver operating conditions 87 (FIG. 15) and the conditions (the solution precision and the time limit) sent from the operation terminal 5 (SP11). Specifically speaking, when the required time for one ground-state search which is defined in the predefined solver operating conditions 87 is equal to or longer than the time limit designated by the user on the problem input screen 110, the operating condition generation program 83 generates the solver operating conditions obtained by reducing the number of repeats of interactions as defined in the predefined solver operating conditions 87 so that the required time for one ground-state search becomes shorter than the time limit.” [0163]);
when searchable, cause the Ising machine to perform the search process without reconfiguring the Ising machine (“Subsequently, the operating condition generation program 83 (FIG. 13) generates the solver operating conditions for the ground-state search processing to be executed at that time, based on the predefined solver operating conditions 87 (FIG. 15) and the conditions (the solution precision and the time limit) sent from the operation terminal 5 (SP11). Specifically speaking, when the required time for one ground-state search which is defined in the predefined solver operating conditions 87 is equal to or longer than the time limit designated by the user on the problem input screen 110, the operating condition generation program 83 generates the solver operating conditions obtained by reducing the number of repeats of interactions as defined in the predefined solver operating conditions 87 so that the required time for one ground-state search becomes shorter than the time limit.” [0163]); and
when not searchable, cause the Ising machine to perform the search process by reconfiguring the Ising machine (“Subsequently, the operating condition generation program 83 (FIG. 13) generates the solver operating conditions for the ground-state search processing to be executed at that time, based on the predefined solver operating conditions 87 (FIG. 15) and the conditions (the solution precision and the time limit) sent from the operation terminal 5 (SP11). Specifically speaking, when the required time for one ground-state search which is defined in the predefined solver operating conditions 87 is equal to or longer than the time limit designated by the user on the problem input screen 110, the operating condition generation program 83 generates the solver operating conditions obtained by reducing the number of repeats of interactions as defined in the predefined solver operating conditions 87 so that the required time for one ground-state search becomes shorter than the time limit.” [0163]).
Response to Arguments
Applicant's arguments filed 17 February 2026 have been fully considered but they are not persuasive. The amended subject matter of claims 14, 32 and 33 is disclosed by Hayashi. Please see the updated rejection above.
The double patenting rejection is withdrawn due to the terminal disclaimer.
Allowable Subject Matter
Claims 16-31 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. None of the prior art, either alone or in combination, teaches or discloses alternating updates of main and auxiliary variable processes in the search process.
Claims 34-36 are allowed.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC NILSSON whose telephone number is (571)272-5246. The examiner can normally be reached M-F: 7-3.
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/ERIC NILSSON/Primary Examiner, Art Unit 2151