Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
1. This action is responsive to: remarks filed on 13 October 2025.
2. Claims 1-20 are currently pending and claims 1, 12 and 16 are independent claims.
Claim Rejections - 35 USC § 103
3. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C §103 as being unpatentable over Cho et al. (US Publication No. 20140281170), hereinafter Cho and in view of Mark Overby (US Publication No. 20150089218), hereinafter Overby.
Regarding claim 1:
A memory device, comprising: one or more specific data (CSD) registers (Cho, ¶41, ¶32, Fig.1).
and a controller configured to: receive a write request comprising: a data field comprising a configuration value (Cho, ¶6, ¶9, ¶76).
an address in the one or more CSD registers to write the configuration value to (Cho, ¶41, ¶7, ¶62).
an indication of a request type (Cho, ¶108, ¶9).
Cho does not explicitly suggest, a message authentication code (MAC); however, in a same field of endeavor Overby discloses this limitation (Overby, ¶48).
Cho does not explicitly suggest, and a write counter value however, in a same field of endeavor Overby discloses this limitation (Overby, ¶39).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include the method of write mechanism in eMMC of Cho with the use of message authentication code (MAC) disclosed in Overby because it in order to generate authentication information, stated by Overby at para.48.
Regarding claim 2:
wherein the memory device is an embedded multimedia card (eMMC) (Cho, Fig.1).
Regarding claim 3:
Cho does not explicitly suggest, wherein the indication has a value of 0x0006 indicating that the request type corresponds to an authenticated write request for programming configuration of the memory device using the configuration value; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶38-39).
Same motivation for combining the respective features of Cho and Overby applies herein, as discussed in the rejection of claim 1.
Regarding claim 4:
Cho does not explicitly suggest, wherein an authentication of the write request is determined based on the MAC and the write counter value; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶38-39).
Same motivation for combining the respective features of Cho and Overby applies herein, as discussed in the rejection of claim 1.
Regarding claim 5:
Cho does not explicitly suggest, in response to the determining that the write request is authenticated, wherein the controller is configured to enable updating a write protection scheme of the memory device in response to the configuration value having a first value; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶38, ¶42).
Same motivation for combining the respective features of Cho and Overby applies herein, as discussed in the rejection of claim 1.
Regarding claim 6:
Cho does not explicitly suggest, wherein updating the write protection scheme comprises updating one or more fields in the one or more CSD registers; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶31).
Same motivation for combining the respective features of Cho and Overby applies herein, as discussed in the rejection of claim 1.
Regarding claim 7:
Cho does not explicitly suggest, wherein the write protection scheme comprises a type of write protection set up by using a CMD command; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶51).
Same motivation for combining the respective features of Cho and Overby applies herein, as discussed in the rejection of claim 1.
Regarding claim 8:
wherein the CMD command comprises a CMD28 to set up a write protection for a write protection group (Cho, ¶35).
Regarding claim 9:
wherein the write protection scheme comprises an entire device write protection, a work protection group (WPG) write protection, or a boot partition write protection (Cho, ¶90).
Regarding claim 10:
wherein the controller is configured to disable updating the write protection scheme of the memory device in response to the configuration value having a second value (Cho, ¶67).
Regarding claim 11:
wherein using a CMD28 to set up a write protection is disabled (Cho, ¶82).
Regarding claim 12:
receiving, via a controller of the memory device, a write request comprising: a data field comprising a configuration value (Cho, ¶6, ¶9, ¶76).
an address in one or more CSD registers of the memory device to write the configuration value to (Cho, ¶41, ¶7, ¶62).
an indication of a request type (Cho, ¶108, ¶9).
Cho does not explicitly suggest, a message authentication code (MAC); however, in a same field of endeavor Overby discloses this limitation (Overby, ¶48).
Cho does not explicitly suggest, and a write counter value however, in a same field of endeavor Overby discloses this limitation (Overby, ¶39).
Cho does not explicitly suggest, determining, via the controller, an authentication of the write request based on the MAC and the write counter value; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶38-39).
and writing the configuration value to the address in the one or more CSD registers in response to authentication of the write request; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶14, ¶43).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include the method of write mechanism in eMMC of Cho with the use of message authentication code (MAC) disclosed in Overby because it in order to generate authentication information, stated by Overby at para.48.
Regarding claim 13:
wherein the memory device is an embedded multimedia card (eMMC) (eMMC) (Cho, Fig.1).
Regarding claim 14:
Cho does not explicitly suggest, wherein the indication has a value of 0x0006 indicating that the request type corresponds to an authenticated write request for programming configuration of the memory device using the configuration value; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶38-39).
Same motivation for combining the respective features of Cho and Overby applies herein, as discussed in the rejection of claim 1.
Regarding claim 15:
Cho does not explicitly suggest, wherein determining the authentication of the write request comprises: generating, by the controller, a calculated MAC based on at least the write counter value; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶48).
comparing, by the controller, the calculated MAC with the MAC of the write request; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶60).
and in response to determining that the calculated MAC is not equal to the MAC of the write request, determining that the write request is not authenticated; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶52).
Same motivation for combining the respective features of Cho and Overby applies herein, as discussed in the rejection of claim 1.
Regarding claim 16:
receive a write request comprising: a data field comprising a configuration value (Cho, ¶6, ¶9, ¶76).
an address in one or more CSD registers of the memory device to write the configuration value to (Cho, ¶41, ¶7, ¶62).
an indication of a request type (Cho, ¶108, ¶9).
Cho does not explicitly suggest, a message authentication code (MAC); however, in a same field of endeavor Overby discloses this limitation (Overby, ¶48).
Cho does not explicitly suggest, and a write counter value however, in a same field of endeavor Overby discloses this limitation (Overby, ¶39).
Cho does not explicitly suggest, determining, via the controller, an authentication of the write request based on the MAC and the write counter value; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶38-39, ¶60).
Cho does not explicitly suggest, and in response to determining that the write request is authenticated, write the configuration value to the address in the one or more CSD registers; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶14, ¶43, ¶60).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include the method of write mechanism in eMMC of Cho with the use of message authentication code (MAC) disclosed in Overby because it in order to generate authentication information, stated by Overby at para.48.
Regarding claim 17:
wherein the memory device is an embedded multimedia card (eMMC) (Cho, Fig.1).
Regarding claim 18:
Cho does not explicitly suggest, wherein the instructions further cause the controller to: generate a calculated MAC based on at least the write counter value; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶48).
compare the calculated MAC with the MAC of the write request (Overby, ¶60).
and in response to determining that the calculated MAC is not equal to the MAC of the write request, determine that the write request is not authenticated; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶52).
Same motivation for combining the respective features of Cho and Overby applies herein, as discussed in the rejection of claim 1.
Regarding claim 19:
Cho does not explicitly suggest, wherein the instructions cause the controller to enable updating a write protection scheme of the memory device in response to the configuration value having a first value; however, in a same field of endeavor Overby discloses this limitation (Overby, ¶38, ¶42).
Same motivation for combining the respective features of Cho and Overby applies herein, as discussed in the rejection of claim 1.
Regarding claim 20:
wherein the instructions cause the controller to disable updating the write protection scheme of the memory device in response to the configuration value having a second value (Cho, ¶67).
Conclusion
4. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Monjour Rahim whose telephone number is (571)270-3890.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Shewaye Gelagay can be reached on 571-272-4219. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (in USA or CANANDA) or 571-272-1000.
/Monjur Rahim/
Patent Examiner
United States Patent and Trademark Office
Art Unit: 2436; Phone: 571.270.3890
E-mail: monjur.rahim@uspto.gov
Fax: 571.270.4890