Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed on May 19, 2026 has been entered. Claims 1, 3-5, 7-16, 20, 22, 24, 27, 29, and 31-39 are pending in the application.
Response to Arguments
Applicant’s arguments with respect to claims 1, 3-5, 7-16, 20, 22, 24, 27, 29, and 31-39 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 3, 4, 8, 12, 13, 16, 20, 27, 31, 32, 35, and 39 are rejected under 35 U.S.C. 103 as being unpatentable over Papasakellariou (U.S. Publication No. 2023/0087510) in view of Wang (WO2023011235A1), and further in view of Choi et al. (U.S. Publication No. 2021/0092762 A1).
Regarding claim 1, Papasakellariou teaches “[a]n apparatus for wireless communication, comprising: a transceiver; one or more memories configured to, individually or in combination, store instructions; and one or more processors communicatively coupled with the one or more memories, wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to: receive, from a network node, . . . downlink control information (DCI) . . . including . . . a parameter having a value indicating whether uplink control information (UCI) is to be multiplexed with an uplink control channel or . . . uplink shared channel” (see ¶¶ [0054], [0058], [0131] and [0133]; UE (i.e., apparatus for wireless communication) includes a RF transceiver, processor, and memory; the processor is also capable of executing other processes and programs resident in the memory; multiplexing of multicast HARQ-ACK information in the PUCCH can also be controlled by a serving gNB (i.e., network node) through an indication in a DCI format (i.e., receive, from a network node, downlink control information (DCI)) scheduling the PUSCH transmission; the DCI format can include a 1-bit field (i.e., a parameter having a value indicating) that indicates whether the UE should multiplex multicast HARQ-ACK information in the PUCCH or in the PUSCH (i.e., uplink control channel or an uplink shared channel); the indication by the 1-bit field may also apply for unicast UCI; thus, indicating whether uplink control information (UCI) is to be multiplexed with an uplink control channel or an uplink shared channel);
Papasakellariou also teaches “. . . multiplex the UCI with the uplink control channel; . . . multiplex the UCI with . . . uplink shared channel” (see ¶ [0133]; when the indication (i.e., based on the value) is to multiplex UCI in the PUSCH, the UE multiplexes the UCI in the PUSCH (the uplink shared channel); otherwise, the UE multiplexes the UCI in the PUCCH (the uplink control channel)); and
Papasakellariou also teaches “transmit one of the uplink control channel or the . . . uplink shared channel . . . multiplexed with the UCI” (see ¶ [0133]; UE multiplexes the UCI in the PUSCH (the uplink shared channel) and does not transmit the PUCCH (the uplink control channel); UE multiplexes and transmits PUSCH (the uplink shared channel) and PUCCH (the uplink control channel); thus, the UE transmits one of the uplink control channel or the uplink shared channel multiplexed with the UCI).
Papasakellariou does not explicitly disclose receiving “multiple” DCIs, “each scheduling an uplink shared channel of multiple uplink shared channels and each including a downlink assignment index (DAI),” “when the value of the DAI parameter for none of the multiple DCIs is greater than zero,” “when the value of the DAI parameter for one of the multiple DCIs is greater than zero, multiplex the UCI with the uplink shared channel scheduled by the one of the multiple DCIs,” “when the value of the DAI parameter for two or more of the multiple DCIs is greater than zero, multiplex by repetition the UCI with each of the uplink shared channels scheduled by the two or more of the multiple DCIs, and transmitting the “multiple” uplink shared channels of claim 1. However, foregoing limitations were well known in the art prior to the effective filing date of the claimed invention.
For example, Wang teaches receive “multiple” DCIs “each scheduling an uplink shared channel of multiple uplink shared channels and each including a downlink assignment index (DAI) parameter,” “multiplex the UCI with the uplink shared channel scheduled by the one of the multiple DCIs,” ““multiplex . . . the UCI with each of the multiple uplink shared channel scheduled by the two or more of the multiple DCIs,” and “transmit . . . the multiple uplink shared channels multiplexed with the UCI” (¶ [0006]; multiple PUSCH scheduling signaling (DCI) messages (i.e., multiple DCIs each scheduling an uplink shared channel of multiple uplink shared channels) contain a Downlink Assignment Index (UL DAI) indication information (i.e., downlink assignment index (DAI) parameter); therefore, teaches receiving multiple DCIs, each scheduling an uplink shared channel of multiple uplink shared channels and each including a downlink assignment index (DAI) parameter; the UL DAI indication information is used to calculate the codebook length of the Hybrid Automatic Repeat Request-Acknowledgement (HARQ-ACK) signal (UCI) multiplexed onto the PUSCH; when a DCI schedules a PUSCH, the UL DAI is applied to that PUSCH; therefore, based on DAI of each of the DCIs, the UCI is multiplexed with the PUSCH scheduled by that DCI; therefore, teaches multiplex the UCI with the uplink shared channel scheduled by the one of the multiple DCIs and multiplex the UCI with each of the multiple uplink shared channel scheduled by the two or more of the multiple DCIs; furthermore, multiplexing the UCI with corresponding PUSCHs inherently teaches transmitting multiple uplink shared channels multiplexed with the UCI). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Papasakellariou to incorporate teachings of Wang to have an apparatus for wireless communication that receives multiple DCIs each scheduling an uplink shared channel of multiple uplink shared channels, multiplex the UCI with each of the uplink shared channel scheduled by at least one of the multiple DCIs, and transmit the multiple uplink shared channels multiplexed with the UCI. The motivation to do so would have been to improve multiplexing the UCI onto PUSCHs based on DAI of DCIs (see ¶ [0007] of Wang).
While, as explained above, the combination of Papasakellariou and Wang discloses “multiplex the UCI with the uplink shared channel scheduled by the one of the multiple DCIs,” and “multiplex . . . the UCI with each of the multiple uplink shared channel scheduled by the two or more of the multiple DCIs” of claim 1, it does not explicitly disclose “when the value of the DAI parameter for none of the multiple DCIs is greater than zero” and “when the value of the DAI parameter for one of the multiple DCIs is greater than zero” and “when the value of the DAI parameter for two or more of the multiple DCIs is greater than zero, multiplex by repetition the UCI” of claim 1. However, the foregoing limitations were well known in the art prior to the effective filing date of the claimed invention.
For example, Choi discloses “when the value of the DAI parameter for none of the multiple DCIs is greater than zero” and “when the value of the DAI parameter for one of the multiple DCIs is greater than zero” and “when the value of the DAI parameter for two or more of the multiple DCIs is greater than zero, multiplex by repetition the UCI” (see ¶¶ [0139], [0146] and [0148]; if a semi-static HARQ-ACK codebook is configured, and if the value of a UL-DAI field is 1 (i.e., greater than zero), the UE may multiplex HARQ-ACK (UCI) with PUSCH transmission in all of a plurality of slots in which PUSCH transmission is performed; thus, UCI can be multiplexed with PUSCH when the value of a DAI is greater than 0; furthermore, in the case where a PUSCH is repeatedly transmitted in one slot, the embodiments described above may be applied based on a repetition unit rather than a slot; the UE may determine to multiplex HARQ-ACK (UCI) information with PUSCH transmission in all of a plurality of repetition units; if a semi-static HARQ-ACK codebook is configured, and if the value of a UL-DAI field is 1 (i.e., value of DAI greater than zero), the UE may multiplex HARQ-ACK (UCI) with PUSCH transmission in all of a plurality of repetition units (by repetition); thus, UCI can be multiplexed by repetition when the value of a DAI is greater than 0; if a semi-static HARQ-ACK codebook is configured, and if the value of a UL-DAI field is 0 (i.e., DAI for none of the DCI greater than zero), the UE may not multiplex HARQ-ACK with PUSCH transmission in all of a plurality of slots in which PUSCH transmission is performed; not multiplexing HARQ-ACK (UCI) with PUSCH also inherently teaches that multiplexing it with PUCCH, which is a default standard; thus, UCI is multiplexed with PUCCH when the value of the DAI parameter for none of the DCI is greater than zero).
Therefore, given the teaching of “multiplex the UCI with the uplink shared channel scheduled by the one of the multiple DCIs,” and “multiplex . . . the UCI with each of the multiple uplink shared channel scheduled by the two or more of the multiple DCIs” by the combination of Papasakellariou and Wang, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Papasakellariou in view of Wang to incorporate teachings of Choi to multiplex the UCI with the uplink shared channel scheduled by the one of the multiple DCIs when DAI of one of the DCI is greater than zero, multiplex the UCI by repetition with each of the multiple uplink shared channels scheduled by the two or more of the multiple DCIs when DAI for two or more of the multiple DCIs is greater than zero. The motivation to do so would have been to improve efficiency of multiplexing UCI (see ¶ [0030] of Choi).
Regarding claim 3, the combination of Papasakellariou, Wang, and Choi teaches the apparatus of claim 1, and further teaches “wherein when the value of the DAI parameter for two or more of the multiple DCIs is greater than zero, and wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex, with each of the multiple uplink shared channels, the UCI on physical uplink control channels (PUCCHs) scheduled or configured in a same slot as the multiple uplink shared channels” (see ¶¶ [0091], and [0131] – [0133]; PUCCH and PUSCH can overlap in a slot (i.e., PUCCH and uplink shared channel are scheduled in a same slot). the UE determines whether to multiplex UCI in the PUSCH (the uplink shared channel), or whether to simultaneously transmit the PUCCH and the PUSCH, based on the indication; when the indication is to multiplex UCI in the PUSCH, the UE multiplexes the UCI in the PUSCH; otherwise, the UE multiplexes the UCI in the PUCCH (the uplink control channel); thus, multiplex, with the uplink shared channel, the UCI on PUCCHs scheduled or configured in a same slot as the uplink shared channel).
Regarding claim 4, the combination of Papasakellariou, Wang, and Choi teaches the apparatus of claim 1, and further teaches “wherein when the value of the DAI parameter for two or more of the multiple DCIs is greater than zero, and wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex, with the uplink shared channel, the UCI on physical uplink control channels (PUCCHs) that overlap in time with the uplink shared channel” (see ¶¶ [0132] and [0136]; UE to multiplex UCI in a PUSCH or in a PUCCH when the PUSCH and PUCCH transmissions would overlap in time; UE determines whether to multiplex UCI in a PUSCH or in a PUCCH when the PUSCH and PUCCH transmissions would overlap in time; thus, multiplex, with the uplink shared channel, the UCI on physical uplink control channels (PUCCHs) that overlap in time with the uplink shared channel).
Regarding claim 8, the combination of Papasakellariou, Wang, and Choi teaches the apparatus of claim 1, and further teaches “wherein when the value of the DAI parameter for two or more of the multiple DCIs is greater than zero, and wherein the uplink control channel is dedicated for UCI multiplexing” (see ¶ [0086]; UE determines a PUCCH resource based on a value of the PRI field in a last DCI format that the UE correctly decodes; thus, the PUCCH is dedicated resource for the multiplexing when DCI indicates whether UCI should multiplex in the PUCCH).
Regarding claim 12, the combination of Papasakellariou, Wang, and Choi teaches the apparatus of claim 1, and further teaches “wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex the UCI with the uplink control channel, wherein the parameter indicates UCI is to be multiplexed with the uplink control channel, and wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to select resources for the uplink control channel from a pool of uplink control channel resources dedicated for UCI multiplexing” (see ¶ [0086]; to enable flexible allocation of PUCCH resources, a PUCCH resource indicator (PRI) field, with fixed or configurable size, can be included in a DCI format scheduling a PDSCH reception and a UE can then determine a PUCCH resource based on a value of the PRI field; UE determines a PUCCH resource based on a value of the PRI field in a last DCI format that the UE correctly decodes; thus, resources for the uplink control channel are selected from a pool of uplink control channel resources dedicated for UCI multiplexing).
Regarding claim 13, the combination of Papasakellariou, Wang, and Choi teaches the apparatus of claim 12, and further teaches “wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to select the resources for the uplink control channel based on a physical uplink control channel resource indicator (PRI) value specified in the DCI” (see ¶ [0086]; to enable flexible allocation of PUCCH resources, a PUCCH resource indicator (PRI) field, with fixed or configurable size, can be included in a DCI format scheduling a PDSCH reception and a UE can then determine a PUCCH resource based on a value of the PRI field; UE determines a PUCCH resource based on a value of the PRI field in a last DCI format that the UE correctly decodes).
Regarding claim 16, the combination of Papasakellariou, Wang, and Choi teaches the apparatus of claim 12, and further teaches “wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to select the resources for the uplink control channel based on a set indicator value and a physical uplink control channel resource indicator (PRI) value specified in the DCI, wherein the set indicator value indicates one of multiple sets of uplink control channel resources, and the PRI value indicates the uplink control channel in the one of the multiple sets of uplink control channel resources” (see ¶ [0086]; to enable flexible allocation of PUCCH resources, a PUCCH resource indicator (PRI) field, with fixed or configurable size (i.e., the PRI value indicates the uplink control channel in the one of the multiple sets of uplink control channel resources), can be included in a DCI format scheduling a PDSCH reception and a UE can then determine a PUCCH resource based on a value of the PRI field; UE determines a PUCCH resource based on a value of the PRI field in a last DCI format that the UE correctly decodes).
Regarding claim 20, the combination of Papasakellariou, Wang, and Choi teaches the apparatus of claim 1, and further teaches “wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex the UCI with a number of feedback bits indicated at least in part by the DAI parameter, wherein the number of feedback bits is indicated at least in part by the value of the DAI with a modulo operation based on a maximum value for the DAI parameter minus 1” (see ¶ [0136] of Choi; if a dynamic HARQ-ACK codebook is configured for the UE, the DCI for scheduling a PUSCH may include a 2-bit or 4-bit UL-DAI field; if the value of the 2-bit UL-DAI field is 3 (i.e., 11b) (i.e., maximum value for the DAI parameter minus 1), the value of the 2-bit UL-DAI field may indicate that the remainder obtained by dividing the number of PDSCHs, of which the successful or unsuccessful reception is indicated by the HARQ-ACK information to be multiplexed with PUSCH transmission, by 4 is 0 (e.g., the number of PDSCHs of which the successful or unsuccessful reception is indicated by the HARQ-ACK information is 0, 4, 8, . . . ) (i.e., the number of feedback bits is indicated at least in part by the value of the DAI with a modulo operation based on a maximum value for the DAI parameter minus 1); therefore, multiplex the UCI with a number of feedback bits indicated at least in part by the DAI parameter, wherein the number of feedback bits is indicated at least in part by the value of the DAI with a modulo operation based on a maximum value for the DAI parameter minus 1). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Papasakellariou in view of Wang to incorporate teachings of Choi to multiplex the UCI the number of feedback bits is indicated at least in part by the value of the DAI with a modulo operation based on a maximum value for the DAI parameter minus 1. The motivation to do so would have been to improve efficiency of multiplexing UCI (see ¶ [0030] of Choi).
Regarding claims 27, 31, 32, 35, and 39, they are method claims corresponding to claims 1, 3, 4, 8, and 12 that have been rejected above. Applicant’s attention is directed to the rejection of claims 1 and 3, 4, 8, 12, 13 and 16. Claims 27, 31, 32, 35, and 39 are rejected under the same rationale.
Claims 5 and 33 are rejected under 35 U.S.C. 103 as being unpatentable over Papasakellariou in view of Wang, further in view of Choi, and further in view of Han et al. (U.S. Publication No. 2024/0260027).
Regarding claim 5, the combination of Papasakellariou, Wang, and Choi teaches the apparatus of claim 1, and further teaches “wherein when the value of the DAI parameter for two or more of the multiple DCIs is greater than zero, the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex” (see ¶¶ [0131] and [0133] of Papasakellariou, ¶ [0006] of Wang, and ¶¶ [0139], [0146] and [0148] of Choi). The combination of Papasakellariou, Wang, and Choi does not explicitly disclose “with each of the multiple uplink shared channels, multiple UCIs on physical uplink control channels (PUCCHs) scheduled or configured in a same slot as multiple the uplink shared channels” as recited in claim 5. However, the foregoing is well known in the art prior to the effective filing date of the claimed invention. For example, Han teaches “multiplex, with each of multiple uplink shared channels, multiple UCIs on physical uplink control channels (PUCCHs) scheduled or configured in a same slot as multiple the uplink shared channels” (see ¶ [0064]; two different UCI (i.e., multiple UCIs) on multiple PUCCHs; PUCCH #0 carrying UCI #0 to TRP #0 overlaps with PUSCH repetition to TRP #0 in slot #0, and PUCCH #1 carrying UCI #1 to TRP #1 overlaps with PUSCH repetition to TRP #1 in slot #1 (i.e., physical uplink control channels (PUCCHs) scheduled or configured in a same slot as multiple the uplink shared channels); UCI #0 carried by PUCCH #0 is multiplexed on PUSCH to TRP #0 in slot #0; and UCI #1 carried by PUCCH #1 is multiplexed on PUSCH to TRP #1 in slot #1; thus, the multiple UCIs are multiplexed with the multiple uplink shared channels). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Papasakellariou in view of Wang and further in view of Choi to incorporate teachings of Han to have multiple UCIs multiplexed with multiple PUSCHs that are scheduled with the same slot as multiple PUCCHs carrying the multiple UCIs. The motivation to do so would have been to improve efficiency of channel resource usage by multiplexing UCI. (¶¶ [0006] of Han).
Regarding claim 33, it is a method claim corresponding to claim 5 that has been rejected above. Applicant’s attention is directed to the rejection of claim 5. Claim 33 is rejected under the same rationale.
Claims 7 and 34 are rejected under 35 U.S.C. 103 as being unpatentable over Papasakellariou in view of Wang, further in view of Choi, and further in view of Yang et al. (U.S. Publication No. 2023/0292320).
Regarding claim 7, the combination of Papasakellariou, Wang, and Choi teaches the apparatus of claim 1, and further teaches “wherein when the value of the DAI parameter for two or more of the multiple DCIs is greater than zero, the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex the UCI with the uplink shared channel” (see ¶ [0133] of Papasakellariou, ¶ [0006] of Wang, and ¶¶ [0139], [0146] and [0148] of Choi). The combination of Papasakellariou, Wang, and Choi does not explicitly disclose “based at least in part on the UCI and uplink shared channel being associated with a same component carrier (CC) or being associated with different CCs in intra-band continuous carrier aggregation” of claim 7. However, the foregoing is well known in the art prior to the effective filing date of the claimed invention. For example, Yang teaches “based at least in part on the UCI and uplink shared channel being associated with a same component carrier (CC) or being associated with different CCs in intra-band continuous carrier aggregation” (see ¶ [0025]; UCI is multiplexed with a PUSCH, and the PUSCH can be on the same component carrier (CC) as PUCCH (i.e., the PUCCH configured to carry the UCI); thus, the UCI is being multiplexed with an uplink shared channel and based at least in part the uplink shared channel are associated with a same component carrier (CC)). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Papasakellariou in view of Wang and further in view of Choi to incorporate teachings of Yang to have UCI multiplex with an uplink shared channel based at least in part on the UCI and uplink shared channel associated with the same CC. The motivation to do so would have been to improve network performance (see ¶ [0020] of Yang).
Regarding claim 34, it is a method claim corresponding to claim 7 that has been rejected above. Applicant’s attention is directed to the rejection of claim 7. Claim 34 is rejected under the same rationale.
Claims 9–11, 14, 15, and 36-38 are rejected under 35 U.S.C. 103 as being unpatentable over Papasakellariou in view of Wang, further in view of Choi, and further in view of Xiong et al. (U.S. Publication No. 2019/0261361).
Regarding claim 9, the combination of Papasakellariou, Wang, and Choi teaches the apparatus of claim 8, and further teaches “wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex the UCI with the uplink control channel dedicated for UCI multiplexing” (see ¶ [0086]). The combination of Papasakellariou, Wang, and Choi does not explicitly disclose “based at least in part on detecting multiple UCIs within a slot” of claim 9. However, the foregoing is well known in the art prior to the effective filing date of the claimed invention. For example, Xiong teaches “based at least in part on detecting multiple UCIs within a slot” (see ¶ [0036]; when PUCCH resources carrying different UCI types (i.e., multiple UCIs) overlap at least one symbol in time in a slot (i.e., detected within a slot), UE can multiplex dynamic HARQ-ACK and/or SR and/or one or more CSI (i.e., UCI) in a resource which is indicated by a PUCCH (i.e., the uplink control channel) resource indication field in downlink control information (DCI)). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the combination of Papasakellariou, Wang, and Choi to incorporate teachings of Xiong to multiplex UCI with uplink control channel based at least in part on multiple UCIs detected in a slot. The motivation to do so would have been to improve network performance (see ¶ [0003] of Xiong).
Regarding claim 10, the combination of Papasakellariou, Wang, Choi, and Xiong teaches the apparatus of claim 9, and further teaches “wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex, with the uplink control channel, the multiple UCIs within the slot” (see ¶ [0036] of Xiong; when PUCCH resources carrying different UCI types (i.e., multiple UCIs) overlap at least one symbol in time in a slot (i.e., detected within a slot), UE can multiplex dynamic HARQ-ACK and/or SR and/or one or more CSI (i.e., the multiple UCIs) in a resource which is indicated by a PUCCH (i.e., the uplink control channel) resource indication field in downlink control information (DCI)). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Papasakellariou to incorporate teachings of Xiong to multiplex with uplink control channel the multiple UCIs within the slot. The motivation to do so would have been to improve network performance (see ¶ [0003] of Xiong).
Regarding claim 11, the combination of Papasakellariou, Wang, Choi, and Xiong teaches the apparatus of claim 9, and further teaches “wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex, with the uplink control channel, a portion of the multiple UCIs within the slot that overlap the uplink control channel in time” (see ¶ [0036] of Xiong; when PUCCH resources carrying different UCI types (i.e., multiple UCIs) overlap at least one symbol in time in a slot (i.e., detected within a slot), UE can multiplex dynamic HARQ-ACK and/or SR and/or one or more CSI (i.e., a portion of the multiple UCIs) in a resource which is indicated by a PUCCH (i.e., the uplink control channel) resource indication field in downlink control information (DCI); thus, a portion of the multiple UCIs are multiplexed within the slot that overlap the uplink control channel in time). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Papasakellariou to incorporate teachings of Xiong to multiplex with uplink control channel a portion of the multiple UCIs within the slot that overlap the uplink control channel in time. The motivation to do so would have been to improve network performance (see ¶ [0003] of Xiong).
Regarding claim 14, the combination of Papasakellariou, Wang, Choi teaches the apparatus of claim 12, but does not explicitly disclose “wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex, with the uplink control channel, multiple UCIs within a slot” of claim 14. However, the foregoing is well known in the art prior to the effective filing date of the claimed invention. For example, Xiong teaches “wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex, with the uplink control channel, multiple UCIs within a slot” (see ¶ [0036] of Xiong; when PUCCH resources carrying different UCI types (i.e., multiple UCIs) overlap at least one symbol in time in a slot (i.e., detected within a slot), UE can multiplex dynamic HARQ-ACK and/or SR and/or one or more CSI (i.e., the multiple UCIs) in a resource which is indicated by a PUCCH (i.e., the uplink control channel) resource indication field in downlink control information (DCI)). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the combination of Papasakellariou, Chen, and Yoshioka to incorporate teachings of Xiong to multiplex with uplink control channel the multiple UCIs within the slot. The motivation to do so would have been to improve network performance (see ¶ [0003] of Xiong).
Regarding claim 15, the combination of Papasakellariou, Wang, Choi teaches the apparatus of claim 12, but does not explicitly disclose “wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex, with the uplink control channel, a portion of multiple UCIs within a slot that overlap the uplink control channel in time” of claim 15. However, the foregoing is well known in the art prior to the effective filing date of the claimed invention. For example, Xiong teaches “wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to multiplex, with the uplink control channel, a portion of multiple UCIs within a slot that overlap the uplink control channel in time” (see ¶ [0036] of Xiong; when PUCCH resources carrying different UCI types (i.e., multiple UCIs) overlap at least one symbol in time in a slot (i.e., detected within a slot), UE can multiplex dynamic HARQ-ACK and/or SR and/or one or more CSI (i.e., a portion of the multiple UCIs) in a resource which is indicated by a PUCCH (i.e., the uplink control channel) resource indication field in downlink control information (DCI); thus, a portion of the multiple UCIs are multiplexed within the slot that overlap the uplink control channel in time). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the combination of Papasakellariou, Chen, and Yoshioka to incorporate teachings of Xiong to multiplex with uplink control channel a portion of the multiple UCIs within the slot that overlap the uplink control channel in time. The motivation to do so would have been to improve network performance (see ¶ [0003] of Xiong).
Regarding claim 36-38, they are method claims corresponding to claims 9-11 that have been rejected above. Applicant’s attention is directed to the rejection of claims 9-11. Claims 36-38 are rejected under the same rationale.
Claims 22 and 29 are rejected under 35 U.S.C. 103 as being unpatentable over Papasakellariou in view of Wang.
Regarding claim 22, Papasakellariou teaches “[a]n apparatus for wireless communication, comprising: a transceiver; one or more memories configured to, individually or in combination, store instructions; and one or more processors communicatively coupled with the one or more memories, wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to: generate, for a user equipment (UE), . . . downlink control information (DCI) . . . including a parameter having a value indicating whether uplink control information (UCI) is to be multiplexed with an uplink control channel or . . . uplink shared channel” (see ¶¶ [0043], [0048], [0131], and [0133] ; BS comprises RF transceiver, processor, and memory; processor capable of executing programs and other processes resident in the memory; multiplexing of multicast HARQ-ACK information in the PUCCH can also be controlled by a serving gNB (i.e., network node; the apparatus) through an indication in a DCI format (i.e., receive, from a network node, downlink control information (DCI)) scheduling the PUSCH transmission; the DCI format can include a 1-bit field (i.e., a parameter having a value indicating) that indicates whether the UE should multiplex multicast HARQ-ACK information in the PUCCH or in the PUSCH (i.e., uplink control channel or an uplink shared channel); the indication by the 1-bit field may also apply for unicast UCI; thus, the network node (the apparatus) generates DCI including a parameter indicating whether UCI is to be multiplexed with an uplink control channel or an uplink shared channel); and
Papasakellariou does not explicitly disclose “generate . . . multiple DCIs each scheduling an uplink shared channel of multiple uplink shared channels and each including a downlink assignment index (DAI),” and “transmit, for the UE, each of the multiple DCIs” of claim 1. However, the foregoing is well known in the art prior to the effective filing date of the claimed invention. For example, Wang teaches “generate . . . multiple downlink control information (DCIs) each scheduling an uplink shared channel of multiple uplink shared channels and each including a downlink assignment index (DAI)” and “transmit, for the UE, each of the multiple DCIs” ((¶ [0006]; multiple PUSCH scheduling signaling (DCI) messages (i.e., multiple DCIs each scheduling an uplink shared channel of multiple uplink shared channels, and transmit, for the UE, each of the multiple DCIs) contain a Downlink Assignment Index (UL DAI) indication information (i.e., downlink assignment index (DAI) parameter); thus, generate multiple downlink control information (DCIs) each scheduling an uplink shared channel of multiple uplink shared channels and each including a downlink assignment index (DAI) and transmit, for the UE, each of the multiple DCIs).
Regarding claim 29, it is method claim corresponding to claim 22 that has been rejected above. Applicant’s attention is directed to the rejection of claim 22. Claim 29 is rejected under the same rationale.
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Papasakellariou in view of Wang and further in view of Choi.
Regarding claim 24, the combination of Papasakellariou and Wang teaches the apparatus of claim 22, and further teaches “wherein the one or more processors are, individually or in combination, configured to execute the instructions to cause the apparatus to: receive, from the UE, UCI multiplexed with each of the multiple uplink shared channels; and demultiplex, for each uplink shared channel of the multiple uplink shared channels and based on the parameter, the UCI corresponding to physical uplink control channels (PUCCHs) scheduled or configured in a same slot as the uplink shared channel” (see ¶¶ [0091], and [0131] – [0133] of Papasakellariou; PUCCH and PUSCH can overlap in a slot (i.e., PUCCH and uplink shared channel are scheduled in a same slot); the UE determines whether to multiplex UCI in the PUSCH (the uplink shared channel), or whether to simultaneously transmit the PUCCH and the PUSCH, based on the indication; when the indication is to multiplex UCI in the PUSCH, the UE multiplexes the UCI in the PUSCH; otherwise, the UE multiplexes the UCI in the PUCCH (the uplink control channel); thus, at the network node (i.e., the apparatus) the received UCI is multiplexed with the uplink shared channel based on the parameter, where the PUCCH of the UCI and the uplink shared channel are scheduled or configured in the same slot; the network node (i.e., the apparatus) can demultiplex the UCI based on the parameter indicated in the DCI).
The combination of Papasakellariou and Wang does not explicitly disclose “wherein at least one parameter of the multiple DCIs has a value greater than zero” of claim 1. However, the foregoing is well known in the art prior to the effective filing date of the claimed invention. For example, Choi teaches “wherein at least one DAI parameter of the multiple DCIs has a value greater than zero” (see ¶¶ [0139], [0146] and [0148]; if a semi-static HARQ-ACK codebook is configured, and if the value of a UL-DAI field is 1 (i.e., greater than zero), the UE may multiplex HARQ-ACK (UCI) with PUSCH transmission in all of a plurality of slots in which PUSCH transmission is performed; thus when received, the network node will correspondingly demultiplex the UCI corresponding the PUSCH). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Papasakellariou in view of Wang to incorporate teachings of Choi to demultiplex based on DAI greater than zero. The motivation to do so would have been to improve efficiency of multiplexing UCI (see ¶ [0030] of Choi).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Jung et al. (U.S. Publication No. 2023/0123957 A1) teaches multiplexing UCI on PUSCH by repetition.
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/SRIHARSHA REDDY VANGAPATY/Examiner, Art Unit 2475
/HASHIM S BHATTI/Primary Examiner, Art Unit 2475
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