DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 24 August 2026 has been entered.
Response to Arguments
Applicant’s arguments with respect to the claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-6, 17-18, & 21-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 8,227,894) in view of Tan et al. (US 2007/0117913).
In regards to claim 1,
Lee ‘894 discloses a capacitor comprising:
a first electrode layer (511-513 – fig. 5; C6:L31-39);
a second electrode layer (521-523 – fig. 5; C6:L31-39); and
a dielectric layer (540 – fig. 5; C6:L52) disposed between the first electrode layer and the second electrode layer in a thickness direction of the first electrode layer, wherein
an inner portion of the first electrode layer covers the dielectric layer, the inner portion surrounded by an outermost portion of the first electrode layer when the first electrode layer is viewed in plan (fig. 5),
an inner portion of the second electrode layer covers the dielectric layer, the inner portion surrounded by an outermost portion of the second electrode layer when the second electrode layer is viewed in plan (fig. 5),
a thickness of the dielectric layer varies from one point to another (fig. 5), and
the thickness of the dielectric layer varies continuously or stepwise in a particular in-plane direction (fig. 5). Lee ‘894 fails to disclose the dielectric layer is an antiferroelectric material.
Tan ‘913 discloses an antiferroelectric dielectric (abstract).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to use the dielectric of Tan ‘913 as the dielectric of Lee ‘894 to obtain a capacitor wherein the dielectric has a high dielectric constant and high energy storage capabilities with ease of processing as well as with improved mechanical properties. Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
In regards to claim 2,
Lee ‘894 as modified by Tan ‘913 discloses all the claimed limitations discussed above with respect to claim 1, except for wherein the antiferroelectric layer has a thickness of 10 nanometers or more and 1 micrometer or less. However, the thickness of a dielectric layer in a capacitor is a result effective variable based on the formula of capacitance, particularly for controlling capacitance.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the capacitor of Lee ‘894 as modified by Tan ‘913 such that the antiferroelectric layer has a thickness of 10 nanometers or more and 1 micrometer or less to obtain a desired capacitance. Where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
In regards to claim 3,
Lee ‘894 as modified by Tan ‘913 discloses all the claimed limitations discussed above with respect to claim 1, except for a ratio of a maximum of the thickness of the antiferroelectric layer to a minimum of the thickness of the antiferroelectric layer is more than 1 and less than 10. However, the thickness of a dielectric layer in a capacitor is a result effective variable based on the formula of capacitance, particularly for controlling capacitance.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the capacitor of Lee ‘894 as modified by Tan ‘913 such that a ratio of a maximum of the thickness of the antiferroelectric layer to a minimum of the thickness of the antiferroelectric layer is more than 1 and less than 10to obtain a desired capacitance. Where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
In regards to claim 4,
Lee ‘894 as modified by Tan ‘913 discloses all the claimed limitations discussed above with respect to claim 1, except for wherein a maximum of the thickness of the antiferroelectric layer is 500 nanometers or less. However, the thickness of a dielectric layer in a capacitor is a result effective variable based on the formula of capacitance, particularly for controlling capacitance.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the capacitor of Lee ‘894 as modified by Tan ‘913 such that a maximum of the thickness of the antiferroelectric layer is 500 nanometers or less to obtain a desired capacitance. Where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
In regards to claim 5,
Lee ‘894 as modified by Tan ‘913 discloses all the claimed limitations discussed above with respect to claim 1, except for wherein the thickness of the antiferroelectric layer is smaller than a thickness of the first electrode layer. However, the thickness of a dielectric layer in a capacitor is a result effective variable based on the formula of capacitance, particularly for controlling capacitance.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the capacitor of Lee ‘894 as modified by Tan ‘913 such that the thickness of the antiferroelectric layer is smaller than a thickness of the first electrode layer to obtain a desired capacitance. Where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
In regards to claim 6,
Lee ‘894 as modified by Tan ‘913 discloses all the claimed limitations discussed above with respect to claim 1, except for wherein the thickness of the antiferroelectric layer is smaller than a thickness of the second electrode layer. However, the thickness of a dielectric layer in a capacitor is a result effective variable based on the formula of capacitance, particularly for controlling capacitance.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the capacitor of Lee ‘894 as modified by Tan ‘913 such that the thickness of the antiferroelectric layer is smaller than a thickness of the second electrode layer to obtain a desired capacitance. Where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
In regards to claim 17,
Lee ‘894 as modified by Tan ‘913 further discloses further comprising a support (542 – fig. 5 of Lee ‘894), wherein the first electrode layer is disposed between the support and the antiferroelectric layer in the thickness direction of the first electrode layer (fig. 5 of Lee ‘894).
In regards to claim 18,
Lee ‘894 as modified by Tan ‘913 further discloses wherein the support has no empty space overlapping the antiferroelectric layer in plan view (fig. 5 of Lee ‘894).
In regards to claim 20,
Lee ‘894 as modified by Tan ‘913 further discloses a circuit board comprising the capacitor according to claim 1, wherein the capacitor is mounted to an electrical circuit formed on the circuit board (fig. 16A; C13:L7-35 of Lee ‘894).
In regards to claim 21,
Lee ‘894 as modified by Tan ‘913 further discloses an electronic device comprising the capacitor according to claim 1, wherein:
the capacitor is mounted to an electrical circuit formed on a circuit board, and
the electronic device is equipped with the circuit board (fig. 16A; C13:L7-35 of Lee ‘894).
In regards to claim 22,
Lee ‘894 discloses electricity storage device comprising:
a battery (C1:L26-32 – it is noted that a computer will comprise either a recharge battery when formed as a laptop or a small battery for providing power to the clock/CMOS memory); and
a capacitor, the capacitor comprising:
a first electrode layer (511-513 – fig. 5; C6:L31-39);
a second electrode layer (521-523 – fig. 5; C6:L31-39); and
a dielectric layer (540 – fig. 5; C6:L52) disposed between the first electrode layer and the second electrode layer in a thickness direction of the first electrode layer, wherein
an inner portion of the first electrode layer covers the dielectric layer, the inner portion surrounded by an outermost portion of the first electrode layer when the first electrode layer is viewed in plan (fig. 5),
an inner portion of the second electrode layer covers the dielectric layer, the inner portion surrounded by an outermost portion of the second electrode layer when the second electrode layer is viewed in plan (fig. 5),
a thickness of the dielectric layer varies from one point to another (fig. 5), and
the thickness of the dielectric layer varies continuously or stepwise in a particular in-plane direction (fig. 5). Lee ‘894 fails to disclose the dielectric layer is an antiferroelectric material.
Tan ‘913 discloses an antiferroelectric dielectric (abstract).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to use the dielectric of Tan ‘913 as the dielectric of Lee ‘894 to obtain a capacitor wherein the dielectric has a high dielectric constant and high energy storage capabilities with ease of processing as well as with improved mechanical properties. Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Claim(s) 1, 10-16, 19, & 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over CN111899979A hereafter referred to as Yang in view of Silicon-doped hafnium oxide anti-ferroelectric thin films for energy storage hereafter referred to as Ali.
In regards to claim 1,
Yang discloses a capacitor comprising:
a first electrode layer (2 – fig. 1; [0030]);
a second electrode layer (3 – fig. 1; [0030]); and
a dielectric layer (1 – fig. 1; [0030]) disposed between the first electrode layer and the second electrode layer in a thickness direction of the first electrode layer, wherein
an inner portion of the first electrode layer covers the dielectric layer, the inner portion surrounded by an outermost portion of the first electrode layer when the first electrode layer is viewed in plan,
an inner portion of the second electrode layer covers the dielectric layer, the inner portion surrounded by an outermost portion of the second electrode layer when the second electrode layer is viewed in plan,
a thickness of the dielectric layer varies from one point to another, and
the thickness of the dielectric layer varies continuously or stepwise in a particular in-plane direction (fig. 1-2),
the dielectric material can be selected based on the actual situation ([0040]). Yang fails to disclose the dielectric layer is an antiferroelectric material.
Ali discloses an antiferroelectric dielectric for use in capacitors (abstract).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to use the dielectric of Ali as the dielectric of Yang to obtain a capacitor wherein the dielectric has high energy storage capabilities. Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
In regards to claim 10,
Yang as modified by Ali further discloses wherein the thickness of the antiferroelectric layer varies stepwise in the particular in-plane direction (fig. 1-2 of Yang), and
the antiferroelectric layer includes a connecting portion between a pair of regions having different thicknesses, the connecting portion defining a step corresponding to a difference between the thicknesses of the pair of regions (fig. 1-2 of Yang).
In regards to claim 11,
Yang as modified by Ali further discloses wherein the thickness of the antiferroelectric layer varies stepwise in the particular in-plane direction (fig. 1-2 of Yang), and
the antiferroelectric layer includes a connecting portion between a pair of regions having different thicknesses, the connecting portion having a thickness varying continuously or stepwise from one of the pair of regions toward the other (fig. 1-2 of Yang).
In regards to claim 12,
Yang as modified by Ali further discloses wherein the antiferroelectric layer includes a plurality of first regions each having a first thickness and having a first area in plan view, and a second region having a second thickness different from the first thickness (fig. 1-2 of Yang), and
the plurality of first regions are disposed apart from each other when the antiferroelectric layer is viewed in plan from the second electrode layer (fig. 1-2 of Yang).
In regards to claim 13,
Yang as modified by Ali further discloses wherein the plurality of first regions are disposed regularly when the antiferroelectric layer is viewed in plan from the second electrode layer (fig. 1-2 of Yang).
In regards to claim 14,
Yang as modified by Ali further discloses wherein each of the plurality of first regions is in a shape of a belt parallel to another belt when the antiferroelectric layer is viewed in plan from the second electrode layer (fig. 1-2; [0031] of Yang).
In regards to claim 15,
Yang as modified by Ali further discloses wherein each of the plurality of first regions is in a circular or rectangular shape surrounded by the second region when the antiferroelectric layer is viewed in plan from the second electrode layer (fig. 1-2; [0031] of Yang).
In regards to claim 16,
Yang as modified by Ali further discloses wherein the antiferroelectric layer includes a metal oxide including at least one of hafnium and zirconium (abstract of Ali).
In regards to claim 19,
Yang as modified by Ali further discloses electrical circuit comprising the capacitor according to claim 1 (see claim 1 rejection above), wherein the capacitor is mounted to the electrical circuit ([0004] of Yang).
In regards to claim 23,
Yang as modified by Ali further discloses wherein: an antiferroelectric layer comprises at least one selected from a group consisting of a first metal oxide, a second metal oxide, and a third metal oxide,
the first metal oxide is expressed by HfO2, ZrO2, or Hf1-xZrxO2, where x satisfying 0<x<1, and comprises a tetragonal phase,
the second metal oxide is a metal oxide in which part of Hf in HfO2 or Hf1-xZrxO2 is substituted by Si or Al, where x satisfying 0<x<1, and
the third metal oxide is a metal oxide in which part of Zr in ZrO2 or Hf1-xZrxO2 is substituted by Y, Ti, Sn, or Ce, where x satisfying 0<x<1 (conclusion of Ali).
Allowable Subject Matter
Claim(s) 8-9 & 24 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art does not teach or suggest (in combination with the other claim limitations) wherein the thickness of the antiferroelectric layer varies continuously and monotonously from one outermost end of the second electrode to another outermost end of the second electrode in the particular in-plane direction (claim 8), wherein the thickness of the antiferroelectric layer varies stepwise in the particular in-plane direction, the antiferroelectric layer includes a first region and a second region, the first region having a minimum thickness and having a given area in plan view, the second region having a maximum thickness and having a given area in plan view, and a ratio of the area of the second region in plan view to the area of the first region in plan view is equal to or more than 2 and equal to or less than 10 (claim 9), wherein the thickness of the antiferroelectric layer varies continuously and monotonously from one outermost end of the second electrode to another outermost end of the second electrode in the particular in-plane direction (claim 24).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2006/0081960 – fig. 1-2
Communication
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/David M Sinclair/Primary Examiner, Art Unit 2847
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