Prosecution Insights
Last updated: April 19, 2026
Application No. 18/485,089

SHARING REGISTER FILE USAGE BETWEEN FUSED PROCESSING RESOURCES

Non-Final OA §DP
Filed
Oct 11, 2023
Examiner
NAM, HYUN
Art Unit
2183
Tech Center
2100 — Computer Architecture & Software
Assignee
Intel Corporation
OA Round
5 (Non-Final)
86%
Grant Probability
Favorable
5-6
OA Rounds
2y 7m
To Grant
86%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
750 granted / 867 resolved
+31.5% vs TC avg
Minimal -1% lift
Without
With
+-0.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
20 currently pending
Career history
887
Total Applications
across all art units

Statute-Specific Performance

§101
10.4%
-29.6% vs TC avg
§103
38.5%
-1.5% vs TC avg
§102
16.1%
-23.9% vs TC avg
§112
19.2%
-20.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 867 resolved cases

Office Action

§DP
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/20/2026 has been entered. Obvious-type Double Patenting (ODP) Rejections The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b). Claims 21-23, 25-28, 30-33, and 35 are rejected under the judicially created doctrine of obviousness-type double patenting as being unpatentable over claims 21, 23-28, 30-35, and 37-41 of copending Application No. 17/569229, hereinafter ‘229. Although the conflicting claims are not identical, they are not patentably distinct from each other. For example, Claims 21-35 of instant Application, respectively contain elements of claims 21, 23-28, 30-35, and 37-41 of the ‘229 as follows: Claims Instant Claims ‘229 21, 26, 31 processor memory processing resources 1st process. resource 1st output matrix multiplication 1st portion of 1st set of matrix data 2nd set of matrix data 2nd process. resource generate 2nd output matrix multiplication the second portion 21 21 21 21 21 21 23 21 24 21 23 24 23 23 processor memory 1st , 2nd process. resources 1st process. resource write matrix multiplication 1st portion 1st set of matrix data 2nd set of matrix data 2nd process. resource allocate write matrix data second portion 22, 27, 32 storage in a set of registers resources are fused 21 write in to set of registers resources are fused 23, 28, 33 receive an instruction to initiate matrix multiplication 1st set of registers 1st set of matrix data shared local memory 1st process. resource 1st data bus 2nd process resource 2nd data bus 21 receive instruction to initiate matrix multiplication 1st set of registers 1st set of matrix data shared local memory 1st process resource 1st data bus 2nd process. resource 2nd data bus 24, 29, 34 share the 1st set of matrix data between 1st process. resource and 2nd process. resource allocate 1st portion of 1st set of matrix data to 1st process. resource and 2nd portion of 1st set of matrix data to 2nd process. resource 21 share the 1st set of matrix data between 1st process. resource and 2nd process. resource allocate 1st portion of 1st set of matrix data to 1st process. resource and 2nd portion of 1st set of matrix data to 2nd process. resource 25, 30, 35 write 2nd set of matrix data into 2nd set of registers generate a signal to execute matrix multiplication using 1st process. resource and 2nd process. resource includes graphic processor 24 25 27 write 2nd set of matrix data into 2nd set of registers generate a signal to execute matrix multiplication with 1st process. resource and 2nd process. resource Includes Graphic processor Therefore, claims 21, 23-28, 30-35, and 37-41 of the ‘229 anticipate(s) the instant application. Allowable Subject Matter Claims 21-23, 26-28, and 31-33 would be allowable if rewritten or amended to overcome the rejection(s) under ODP; or with proper Terminal Disclaimer. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to Hyun Nam whose telephone number is (571) 270-1725 and fax number is (571) 270-2725. The examiner can normally be reached on Monday through Friday 8:30 AM to 5:00 PM EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached on (571) 270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HYUN NAM/Primary Examiner, Art Unit 2183
Read full office action

Prosecution Timeline

Oct 11, 2023
Application Filed
Feb 20, 2024
Response after Non-Final Action
Jun 12, 2024
Non-Final Rejection — §DP
Aug 20, 2024
Response Filed
Nov 15, 2024
Final Rejection — §DP
Dec 12, 2024
Response after Non-Final Action
Mar 20, 2025
Request for Continued Examination
Mar 27, 2025
Response after Non-Final Action
Apr 05, 2025
Non-Final Rejection — §DP
Jul 10, 2025
Response Filed
Oct 15, 2025
Final Rejection — §DP
Nov 20, 2025
Response after Non-Final Action
Feb 20, 2026
Request for Continued Examination
Mar 04, 2026
Response after Non-Final Action
Mar 07, 2026
Non-Final Rejection — §DP (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
86%
Grant Probability
86%
With Interview (-0.7%)
2y 7m
Median Time to Grant
High
PTA Risk
Based on 867 resolved cases by this examiner. Grant probability derived from career allow rate.

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