Prosecution Insights
Last updated: July 17, 2026
Application No. 18/485,963

BATTERY MODULE AND METHOD OF OPERATING THE SAME

Non-Final OA §103
Filed
Oct 12, 2023
Priority
Mar 27, 2023 — RE 10-2023-0040053 +1 more
Examiner
FANTU, YALKEW
Art Unit
Tech Center
Assignee
Samsung SDI Co., Ltd.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
874 granted / 1088 resolved
+20.3% vs TC avg
Strong +16% interview lift
Without
With
+15.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
30 currently pending
Career history
1114
Total Applications
across all art units

Statute-Specific Performance

§101
1.7%
-38.3% vs TC avg
§103
66.1%
+26.1% vs TC avg
§102
25.1%
-14.9% vs TC avg
§112
0.3%
-39.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1088 resolved cases

Office Action

§103
CTNF 18/485,963 CTNF 81993 DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. The instant application with Application Number 18/485,963 filed on 10/12/2023 is presented for examination. Claims 1-11 are pending. Information Disclosure Statment The Information Disclosure Statement dated 10/14/2024 is acknowledged and the cited references have been considered in this examination. Priority 02-26 AIA Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-fti The factual inquiries set forth in Graham v. John Deere Co. , 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under pre-AIA 35 U.S.C. 103(a) are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-20-02-aia AIA This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. 07-21-aia AIA Claim s 1-11 are rejected under 35 U.S.C. 103 as being unpatentable over Beaston (US 2017/0345101) in view of Kuranuki et al. (US 2019/0131812) . With respect to claims 1, 9 and 10, Beaston discloses a battery module (2600: Para. # 225) comprising: a battery comprising battery cells (Para. # 227) ; balancing resistors respectively connected to the battery cells (Para. # 219: balancing resistors associated with certain high value cells) ; balancing switches respectively connected to the battery cells and to the balancing resistors (Para. # 210 ; using the balancing resistors all battery cells) and an analog front end (Fig. 5, 516/528 and 520; Para. # 111: battery management system with micro-controller (MCU) based cell balancing ) configured to: perform cell balancing on the battery cells by controlling the balancing switches (Para. # 213: application program 2012 opens and closes both relays and MOSFET switches in responds to commands from embedded CPU 802) ; receive a stand-alone aging command comprising an aging duty value and an aging-duration-setting value from a first battery management device (Para. # 336,340: arrangement allows an operator easy access to each of the battery packs for replacement, maintenance, testing, etc.) ; control the balancing switches according to the aging duty value during an aging duration (Para. # 116-118: Battery pack electronic control unit (ECU) connector 608 connects switches 622 a - d to battery pack controller 414) ; and turn off all of the balancing switches in a shutdown mode upon expiration of the aging duration (Fig. 6B; Para. #0118: a battery pack cell balancer 420 b . Battery pack cell balancer 420 b). Beaston, does not expressly disclose an analog front end. Kuranuki, on the other hand, discloses an analog front end (AFE) ( Para. # 0025: Equalization circuit 10 includes voltage detector 14, cell selection circuit 11, energy holding-consuming circuit 12, and controller 13; Voltage detector 14 can be composed of, for example, a general-purpose analog front-end integrated circuit (IC) or an application specific integrated circuit (ASIC)). BEASTON and Kuranuki are analogous art because they are from the same field of endeavor namely battery pack operating system, Equalization circuit and power storage system. It would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to have modify the MCU controller of Beaston with AFE controller of Kuranuki for the benefit of interfacing multiple sensors, such as current, voltage, temperature, etc. for many kinds of analog and digital system with different kinds of sensors removing unwanted frequencies, and improve measurement accuracy that help cell balancing reliable. With respect to claims 2 and 7, the combined references of Beaston and Kuranuki disclose the battery module as described above, further Kuranuki discloses wherein the analog front end is further configured to repeat, during the aging duration, a process of turning on the balancing switches for a turn-on time, and turning off the balancing switches for a turn-off time, according to the aging duty value (Para. # 0025: Equalization circuit 10 includes voltage detector 14, cell selection circuit 11, energy holding-consuming circuit 12, and controller) . With respect to claims 3 and 5, the combined references of Beaston and Kuranuki disclose the battery module as described above, further Beaston discloses wherein the analog front end is configured to control the balancing switches such that some of the balancing switches differ in a turn-on timing from other balancing switches during the aging duration (Para. # 118: balance using switching activities; Battery pack cell balancer 420 b includes a first capacitor 624 a coupled to two multiplexers (MUX) 620 a and 620 b through switches 622 a and 622 b ) . With respect to claims 4 and 5, the combined references of Beaston and Kuranuki disclose the battery module as described above, further Kuranuki discloses wherein the analog front end is configured to control the balancing switches such that the balancing switches start to be turned on sequentially in a corresponding order during the aging duration Equalization circuit 10 includes voltage detector 14, cell selection circuit 11 using analog front-end integrated) . With respect to claims 6 and 11, the combined references of Beaston and Kuranuki disclose the battery module as described above, further Beaston discloses wherein the analog front end is further configured to transmit, upon detection of a connection of a second battery management device, the aging duty value and the aging-duration-setting value in the stand-alone aging command, and a cell voltage value of the battery cells, to the second battery management device (Para. # 86: battery pack operating system 150 includes a battery lifetime monitor 162, a battery warranty monitor 164, a battery usage monitor 168, a battery alarms, warnings, and errors (AWE) manager 151, a battery maintenance manager 152, a battery balancing manager 153, a battery calibration manager 154) . With respect to claim 8, the combined references of Beaston and Kuranuki disclose the battery module as described above, further Beaston discloses wherein the battery cells are respectively connected in parallel to the balancing resistors through the balancing switches Para. # 104, 116, 208 and 211: the balancing resistor for the cell is employed (i.e., the balancing resistor's switch is closed) to limit the rate at which the cell is charged) . Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to YALKEW FANTU whose telephone number is (571)272-8928. The examiner can normally be reached Monday-Friday 7:00AM-4:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, DREW A DUNN can be reached at 571-272-2312. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YALKEW FANTU/Primary Examiner, Art Unit 2859 Application/Control Number: 18/485,963 Page 2 Art Unit: 2859 Application/Control Number: 18/485,963 Page 3 Art Unit: 2859 Application/Control Number: 18/485,963 Page 4 Art Unit: 2859 Application/Control Number: 18/485,963 Page 5 Art Unit: 2859
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Prosecution Timeline

Oct 12, 2023
Application Filed
Jun 17, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
96%
With Interview (+15.7%)
2y 8m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1088 resolved cases by this examiner. Grant probability derived from career allowance rate.

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