Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-14 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 and claim 12 both recite a preamble of “a single photon avalanche diode” however both claims recite first, second and third diodes, thus it is assumed that avalanche occurs in each diode . The Examiner requests that the Applicant show where in the specification this is defined.
Claim 4 recites “a fourth impurity region with the first conductive type” however the examiner notes that in claim 3 third impurity region is first conductivity type, thus it is assumed that the fourth impurity region is the second conductive type.
Claim 8, 9, 12 recites first, second and third diodes having a “lower surface” however the Examiner notes that technically speaking a diode is the junction between the p-type and the n-type and thus the choice of the thickness of the layers may be based on the desired depletion thicknesses at a given voltage, however theoretically, as you move away from the junction in either direction, the material can be considered as part of the diode or not, it is only a designation, not a physical or electrical boundary since it is the junction which is the diode. Thus for clarity of the claim, the Examiner requests a definition of when a diode surface is a lower or side surface, without introducing new matter.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Merrill (US 5965875 A) in view of Hung et al. (US 20210375959 A1) hereafter referred to as Hung
In regard to claim 1 Merrill teaches a photodiode [see “FIG. 6 is a partial cross-section drawing illustrating a three-color pixel sensor using a triple-well structure”] comprising:
a first diode including a first PN junction [see “As further shown in FIG. 6, a shallow doped region 106 of N-type conductivity (approx. 10.sup.18 atoms/cm.sup.2) is formed in the P-doped region 104 to a depth between about 0.2-0.5 microns, and preferably about 0.2 microns” “the pn junction between the shallow N-doped region 106 and the P-region 104 forms a blue-sensitive photodiode”] vertically spaced from a light-receiving surface by a first depth;
a second diode in partial contact with the first diode, the second diode including a second PN junction [“The pn junction between the P-doped region 104 and the N-doped 102 is formed at a depth between about 0.5-1.5 micron, and preferably about 0.6 microns” “the pn junction between the P-region 104 and the deep N-region 102 forms a green-sensitive photodiode”] vertically spaced from the light-receiving surface by a second depth greater than the first depth; and
a third diode in partial contact with the second diode, the third diode including a third PN junction [“junction depth of the N-doped region 102 is between about 1.5-3.0 microns, and preferably about 2 microns” “the pn junction between the deep N-doped region 102 and the P-type substrate 100 forms a red-sensitive photodiode”] spaced from the light-receiving surface by a third depth greater than the second depth,
but does not teach that the photodiode is a single photon avalanche diode and wherein the first to third diodes have different breakdown voltages from one another.
See Hung teaches the benefit of bandgap engineering in a trench epitaxy, see paragraph 0040 “Referring to FIG. 2E, a germanium-containing material may be grown from the physically exposed surfaces of the silicon liner 32 in embodiments that include the silicon liner 32 or from the physically exposed surfaces of the first-conductivity-type silicon region 21 in embodiments that do not include the silicon liner 32. The germanium-containing material includes germanium at an atomic percentage greater than 50%. In one embodiment, the germanium-containing material may include doped or undoped germanium such that the atomic percentage of germanium is at least 99%, and is essentially free of silicon. In another embodiment, the germanium-containing material may include a silicon-germanium alloy” “Generally, an epitaxial deposition process may be performed to grow a single crystalline germanium-containing material inside the trench 69. At least the portion of the germanium-containing material layer 30L that grows within the trench 69 may be single crystalline, and may be formed with epitaxial alignment with the single crystalline silicon material of the single crystalline silicon substrate 10,. In this embodiment, the entirety of the portion of the germanium-containing material layer 30L located within the trench 69 may be single crystalline” “The germanium-containing material layer 30L may be intrinsic, or may have a low level of doping. For example, the atomic concentration of dopants within the germanium-containing material layer 30L may be in a range from 1.0×10.sup.13/cm.sup.3 to 1.0×10.sup.18/cm.sup.3, although lesser and greater dopant concentrations may also be used” “Referring to FIG. 2G, a remaining portion of the germanium-containing material may be vertically recessed within an opening in the dielectric mask layer 12. Specifically, the germanium-containing well 30 and optionally an upper portion of the optional silicon liner 32 may be vertically recessed, for example, by performing a recess etch process. In such embodiments, the vertical recess distance may be greater than, the same as, or less than, the thickness of the dielectric mask layer 12”, see teaching on SPAD configurations, “Generally, any type of photovoltaic junction may be formed within, or around, the germanium-containing well 30. The photovoltaic junction may be a vertical p-i-n junction, a lateral p-i-n junction, a vertical p-n junction, or a lateral p-n junction. Further, the configuration of a pinned diode using an pinning layer or the configuration of a single-photon avalanche diode (SPAD) may also be used” see the teaching on controlling epitaxial growth “Referring to FIG. 2D, in some embodiments a silicon liner 32 may be optionally grown from physically exposed surfaces of the first-conductivity-type silicon region 21, which are surfaces of the trench 69. The silicon liner 32 may be grown by a selective silicon epitaxy process that grows epitaxial silicon only from physically exposed semiconductor surfaces and does not grow silicon from dielectric surfaces”.
The Examiner notes that avalanche multiplication has a name because it is a known phenomenon, thus a person of ordinary skill in the art is capable of computing electric fields responsible for avalanche multiplication to occur. Further a person of ordinary skill in the art also understands that blue light has higher energy than red light and that percentage of Ge can be computed to obtain the desired absorption for given device sizing by adjusting the bandgap of the SiGe material of Hung. Similarly a person of ordinary skill in the art is also aware that breakdown voltage is dependent on bandgap.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Merrill to include SiGe epitaxy in a trench to obtain the red, green, and blue LEDs including avalanche behavior i.e. to modify Merrill to include that the photodiode is a single photon avalanche diode and wherein the first to third diodes have different breakdown voltages from one another.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to tailor the absorption in the device of Merrill by adjusting the bandgap using SiGe epitaxy and to obtain better photoresponse by avalanche behavior and that breakdown voltage is dependent on bandgap.
In regard to claim 2 Merrill and Hung as combined teaches wherein the first diode includes: a first impurity region [see Merrill Fig. 6 nldd 106] with a first conductive type adjacent to the light-receiving surface; and a second impurity region [see Merrill Fig. 6 p-well 104] in contact with a lower surface of the first impurity region and the second impurity region having a second conductive type being opposite to the first conductive type, wherein the first PN junction corresponds to a contact portion between [see Fig. 6] the first impurity region and the second impurity region, and wherein a first depletion region of the first diode exists [i.e. because it is a pn junction] in the first PN junction.
In regard to claim 3 Merrill and Hung as combined teaches wherein the second diode includes: the second impurity region [see Merrill Fig. 6 p-well 104]; and a third impurity region [see Merrill Fig. 6 n-well 102] with the first conductive type in contact [see Fig. 6] a lower surface of the second impurity region, wherein the second PN junction corresponds to a contact portion [see Fig. 6] between the second impurity region and the third impurity region, and wherein a second depletion region of the second diode exists [i.e. because it is a pn junction] in the second PN junction.
In regard to claim 4 Merrill and Hung as combined teaches wherein the third diode includes: the third impurity region [see Merrill Fig. 6 n-well 102]; and a fourth impurity region [see Merrill Fig. 6 p-substrate 100] with the first conductive type in contact a lower surface of the third impurity region, wherein the third PN junction corresponds to a contact portion between the third impurity region and the fourth impurity region, and wherein a third depletion region of the third diode exists in the third PN junction.
In regard to claim 5 Merrill and Hung as combined teaches further comprising: a substrate [see Merrill Fig. 6 the p-substrate 100 includes the entire device] including the light-receiving surface, wherein the first diode, the second diode, and the third diode are sequentially arranged [see Fig. 6] in a depth direction of the substrate from the light-receiving surface.
In regard to claim 6 Merrill and Hung as combined does not specifically teach further comprising: isolation regions arranged between the first diode and the second diode, and between the second diode and the third diode.
See that in Merrill Fig. 6 “a photocurrent sensor 108 that includes a first current meter 110 connected across the red photodiode for measuring the red photocurrent ir. A second current meter 112 is connected across the green photodiode for measuring the green photocurrent ig. A third current meter 114 is connected across the blue photodiode for measuring the blue photocurrent ib” thus 110, 112 and 114 are measuring currents from 3 different photodiodes.
See Hung teaches see paragraph 0057 “Shallow trench isolation structures 20 may be formed in an upper portion of the single crystalline silicon substrate 10. The shallow trench isolation structures 20 may include a dielectric fill material such as silicon oxide, and provide electrical isolation from semiconductor devices to be subsequently formed”, see for example in Fig. 2J the “field effect transistors (610, 630, 640)” have the shallow trench isolation structures 20 in between.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Merrill to include further comprising: isolation regions arranged between the first diode and the second diode, and between the second diode and the third diode.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that it is beneficial to isolate different devices from each other by using shallow trench isolation to reduce cross-currents between the devices, and so that the depth of the isolation is based on the depth of the junction in order to obtain better isolation.
In regard to claim 7 Merrill and Hung as combined in claim 1 and also as combined in claim 6 teaches further comprising: a substrate [see Merrill Fig. 6 the p-substrate 100 includes the entire device] including the light-receiving surface, wherein the third diode is formed in the substrate.
In regard to claim 8 Merrill and Hung as combined in claim 6 teaches wherein a lower surface [see the 112 rejection] of the second diode is in contact [see Merrill Fig. 6] with the third diode, and side surfaces of the second diode are isolated [see combination claim 6 , see the shallow trench isolation to reduce cross-currents between the devices] from the third diode.
In regard to claim 9 Merrill and Hung as combined in claim 6 teaches wherein a lower surface [see the 112 rejection] of the first diode is in contact [see Merrill Fig. 6] with the second diode, and side surfaces of the first diode are isolated [see combination claim 6 , see the shallow trench isolation to reduce cross-currents between the devices] from the second diode.
In regard to claim 10 Merrill and Hung as combined teaches wherein the breakdown voltage of the first diode is higher [see claim 1 see combination Hung, see that blue light has higher energy than red light and that percentage of Ge can be computed to obtain the desired absorption for given device sizing by adjusting the bandgap of the SiGe material of Hung, see that breakdown voltage is dependent on bandgap, see that because blue light has higher energy than green light which has higher energy than red light, thus bandgap is chosen higher for blue than green and higher for green than red, thus the breakdown voltage is higher for blue than green and higher for green than red] than the breakdown voltage of the second diode, and the breakdown voltage of the second diode is higher than the breakdown voltage of the third diode.
In regard to claim 11 Merrill and Hung as combined teaches wherein the first to fourth impurity regions have first to fourth parallel [see the parallel portions in Fig. 6 are at the top where the junctions reach the top surface] portions, respectively, and but does not specifically teach wherein the first to fourth parallel portions have higher doping concentrations as compared to other portions of the first to fourth impurity regions.
See that in Merrill Fig. 6 “a photocurrent sensor 108 that includes a first current meter 110 connected across the red photodiode for measuring the red photocurrent ir. A second current meter 112 is connected across the green photodiode for measuring the green photocurrent ig. A third current meter 114 is connected across the blue photodiode for measuring the blue photocurrent ib” thus the parallel portions are the region where the contact is made to the diodes.
See Hung Fig. 2J see paragraph 0077 “the second-conductivity-type doped well 60, and the doped well contact regions 68”, thus regions where contact is made are usually doped in order to make better contact.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Merrill to include wherein the first to fourth parallel portions have higher doping concentrations as compared to other portions of the first to fourth impurity regions.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that increased doping is helpful to make good electrical contact.
Claim(s) 12-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Merrill (US 5965875 A) in view of Hung et al. (US 20210375959 A1) hereafter referred to as Hung
In regard to claim 12 Merrill teaches a photodiode [see “FIG. 6 is a partial cross-section drawing illustrating a three-color pixel sensor using a triple-well structure”] comprising:
a first diode [see “As further shown in FIG. 6, a shallow doped region 106 of N-type conductivity (approx. 10.sup.18 atoms/cm.sup.2) is formed in the P-doped region 104 to a depth between about 0.2-0.5 microns, and preferably about 0.2 microns” “the pn junction between the shallow N-doped region 106 and the P-region 104 forms a blue-sensitive photodiode”] having a lower surface [see the 112 rejection, the lower surface and side surfaces are in the P-doped region 104] and side surfaces connected to ends of the lower surface;
a second diode [“The pn junction between the P-doped region 104 and the N-doped 102 is formed at a depth between about 0.5-1.5 micron, and preferably about 0.6 microns” “the pn junction between the P-region 104 and the deep N-region 102 forms a green-sensitive photodiode”] surrounding the lower surface and [see Fig. 6] the side surfaces of the first diode, the second diode having a lower surface [see the 112 rejection, the lower surface and side surfaces are in the N-doped 102] and side surfaces connected to ends of the lower surface of the second diode;
a third diode [“junction depth of the N-doped region 102 is between about 1.5-3.0 microns, and preferably about 2 microns” “the pn junction between the deep N-doped region 102 and the P-type substrate 100 forms a red-sensitive photodiode”] surrounding the lower surface and [see Fig. 6] the side surfaces of the second diode, the third diode having a lower surface [see the 112 rejection, the lower surface and side surfaces are in the P-type substrate 100 ] and side surfaces connected to ends of the lower surface of the third diode;
but does not teach that the photodiode is a single photon avalanche diode and
a first isolation region between the side surfaces of the first diode and the side surfaces of the second diode; and
a second isolation region between the side surfaces of the second diode and the side surfaces of the third diode.
See Hung teaching on SPAD configurations, “Generally, any type of photovoltaic junction may be formed within, or around, the germanium-containing well 30. The photovoltaic junction may be a vertical p-i-n junction, a lateral p-i-n junction, a vertical p-n junction, or a lateral p-n junction. Further, the configuration of a pinned diode using an pinning layer or the configuration of a single-photon avalanche diode (SPAD) may also be used”
The Examiner notes that avalanche multiplication has a name because it is a known phenomenon, thus a person of ordinary skill in the art is capable of computing electric fields responsible for avalanche multiplication to occur.
See that in Merrill Fig. 6 “a photocurrent sensor 108 that includes a first current meter 110 connected across the red photodiode for measuring the red photocurrent ir. A second current meter 112 is connected across the green photodiode for measuring the green photocurrent ig. A third current meter 114 is connected across the blue photodiode for measuring the blue photocurrent ib” thus 110, 112 and 114 are measuring currents from 3 different photodiodes, see Fig. 6 that the blue diode junction is 0.2 micron deep, the green diode junction is 0.6 micron deep, and the red diode junction is 2 micron deep.
See Hung teaches see paragraph 0057 “Shallow trench isolation structures 20 may be formed in an upper portion of the single crystalline silicon substrate 10. The shallow trench isolation structures 20 may include a dielectric fill material such as silicon oxide, and provide electrical isolation from semiconductor devices to be subsequently formed”, see for example in Fig. 2J the “field effect transistors (610, 630, 640)” have the shallow trench isolation structures 20 in between.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Merrill to include that the photodiode is a single photon avalanche diode and a first isolation region between the side surfaces of the first diode and the side surfaces of the second diode; and a second isolation region between the side surfaces of the second diode and the side surfaces of the third diode.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to obtain better photoresponse by avalanche behavior and that it is beneficial to isolate different devices from each other by using shallow trench isolation to reduce cross-currents between the devices.
In regard to claim 13 Merrill and Hung as combined teaches wherein the lower surface [see the 112 rejection, see claim 12, the lower surface and side surfaces are in the P-doped region 104] of the first diode is in contact with at least one portion of an upper surface of the second diode, and wherein the lower surface [see the 112 rejection, see claim 12, the lower surface and side surfaces are in the N-doped 102] of the second diode is in contact with at least one portion of an upper surface of the third diode.
In regard to claim 14 Merrill and Hung as combined does not specifically teach wherein a depth of the second isolation region is deeper than a depth of the first isolation region.
However see Fig. 6 that the blue diode junction is 0.2 micron deep, the green diode junction is 0.6 micron deep, and the red diode junction is 2 micron deep.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Merrill to include wherein a depth of the second isolation region is deeper than a depth of the first isolation region.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is so that the depth of the isolation is based on the depth of the junction in order to obtain better isolation.
Conclusion
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/SITARAMARAO S YECHURI/ Primary Examiner, Art Unit 2893