Prosecution Insights
Last updated: October 01, 2026
Application No. 18/487,603

RECHARGEABLE BATTERY PACK

Final Rejection §103§DP
Filed
Oct 16, 2023
Priority
Jan 02, 2023 — RE 10-2023-0000350
Examiner
KOROVINA, ANNA
Art Unit
1729
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Samsung SDI Co., Ltd.
OA Round
2 (Final)
29%
Grant Probability
At Risk
3-4
OA Rounds
1y 1m
Est. Remaining
51%
With Interview

Examiner Intelligence

Grants only 29% of cases
29%
Career Allowance Rate
106 granted / 363 resolved
-35.8% vs TC avg
Strong +22% interview lift
Without
With
+22.1%
Interview Lift
resolved cases with interview
Typical timeline
4y 1m
Avg Prosecution
34 currently pending
Career history
402
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
56.6%
+16.6% vs TC avg
§102
13.8%
-26.2% vs TC avg
§112
23.7%
-16.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 363 resolved cases

Office Action

§103 §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Applicant cancelled claims 3-4, amended claims 1, 5, 12, and 15, and added new claims 18. The 112, 102, 103, and double patenting rejections are withdrawn in view of the amendments. However, upon further consideration a new ground of rejection is necessitated by amendment. Response to Arguments Applicant argues the prior art fails to suggest “a maximum width of at least one conductive pad portion of the plurality of pad portions is wider than a maximum width of a corresponding circuit line of the plurality of circuit lines” because Fig. 10 of Moon shows “outer soldering portions D01 and D02 appear to be equal to a maximum width of the corresponding conductive pattern M1 and M2”. Applicant’s argument is not persuasive because while the conductive pattern M1 splits around the hole G1 (i.e., an upper leg above hole G1 and a lower leg below hole G1), neither leg (above or below hole G1) or M1 before or after the G1 is larger than D01; the same can be said for M2. Thus, Moon appears to read on the amended claim. Allowable Subject Matter Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim(s) 1-2, 5-11, 13, 15-16, and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nishihara et al. (US 2012/0019061) in view of Moon et al. (WO 2019/221397, where US 20210226260 is used as a translation) and Kim et al. (US 2010/0243309), hereinafter Nishihara, Moon and Kim (all of record). Regarding Claims 1-2 and 18, Nishihara suggests a rechargeable battery pack (e.g., 100, Fig. 2) comprising: a cell assembly including at least one battery cell (1, see e.g., Fig. 2); a flexible printed circuit (50) electrically connected to the cell assembly and configured to sense at least one property of the battery cell (e.g., voltage, temperature, current [0093, 0149]); and a cell supervision circuit (e.g., 20, Fig. 2) electrically connected to the flexible printed circuit (via lines, e.g., 51, 52, etc.) and on one side of the cell assembly (i.e., same side as the FPC 50). Nishihara suggests a side frame (80) accommodating the cell assembly, wherein the cell supervision circuit (20) is on one side of the side frame (i.e., 20 connected to 80 via screws 93 in portions 86 of plate 80, see e.g., Fig. 3, [0126]). Finally, Nishihara suggests the flexible printed circuit (50) is electrically connected to the cell supervision circuit (20) by an electrically conductive solder (e.g., [0136, 0141, 154]), wherein the electrically conductive solder includes a solder or a conductive glue (e.g., solder, or electrically conductive adhesive, [0136]) for electrically connecting the flexible circuit substrate (50) and the cell supervision circuit (20). Regarding Claims 1, and 5-7, Nishihara suggests the flexible printed circuit (50) comprises a plurality of circuit lines (e.g., 51, 52, etc.) which are electrically connected to the cell supervision circuit (e.g., 20, see rejection of claims 1-2), but does not show i) a plurality of conductive pad portions at respective ends of the plurality of circuit lines electrically connected to the cell supervision circuit (instant claim 1), ii) the size of the pad relative to the line (instant claim 1), and iii) round shaped first and second expansion pads protruding from sides of the circuit line in a width direction and opposite each other having a groove therebetween (instant claims 5-7). However, Moon shows circuit lines (e.g., S (Fig. 5, 7); M1, M2 (Fig. 10)) with a pad portion (e.g., M (Fig. 5, 7)) at the end of the circuit lines that allows electrical signals to be transmitted (e.g., state information, such as voltage, temperature, [0061, 0064]) about the battery B. The conductive pad portion of the plurality of conductive pad portions protrudes from the end of a circuit line of the plurality of circuit lines with a size that is greater than a width of the circuit line (see e.g., Figs. 5, 10) such that a maximum width of the at least one conductive pad portion of the plurality of pad portions is wider than a maximum width of a corresponding circuit line of the plurality or circuit lines (i.e., conductive pattern M1 splits around the hole G1 comprising an upper leg above hole G1 and a lower leg below hole G1, but neither leg (above or below hole G1) or M1 before or after hole G1 is larger than D01), and is intended to be electrically connected to a circuit (e.g., C) by electrically conductive solder (SD). Specifically, the conductive pad portions include a first expansion pad protruding from a first side of the circuit line in a width direction (i.e., perpendicular to Z1), and a second expansion pad protruding from a second side of the circuit line in the width direction; the first expansion pad and the second expansion pad protrude in a shape from the end of the circuit line in directions that are opposite to each other, and include a round groove (e.g., DO; DO1-DO2, Figs. 5-7, 10-11) between the first expansion pad and the second expansion pad. The shape of the expansion pad is close to round, or is a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration (round) was significant. Further, Kim shows each of the plurality of conductive lines (22) on flexible circuit board (e.g., 20, [0053]) comprise conductive pads (23) at respective ends of the lines; the conductive pad portions (23) protrude from the end of the circuit lines (22) of the plurality of circuit lines with a size that is greater than a width of the circuit line (see e.g., Fig. 1) and are electrically connected to another circuit (10) by solder (30). The conductive pads (23) include a first expansion pad protruding from a first side of the circuit line in a width direction (B), and a second expansion pad protruding from a second side of the circuit line in the width direction (B, see Fig. 1); the first expansion pad and the second expansion pad protrude in a round shape from the end of the circuit line in directions that are opposite to each other (Fig. 1), and further comprise a round groove (26) between the first expansion pad and the second expansion pad, for easy connection to solder (30), thereby forming an electric connection to circuit 10, where movement between boards is restricted ([0061]). It would be obvious to one having ordinary skill in the art to utilize round conductive pads to ensure an easy connection to the solder, and restricted movement between the connected components, as suggested by Kim. Regarding Claim 8-9, Nishihara was modified by Moon which suggests a first step side connected to a lateral side of the flexible printed circuit at an end of the first expansion pad and a second step side connected to a lateral side of the flexible printed circuit at an end of the second expansion pad, see e.g., DO at E3 and DO at E4, Figs. 7, 10-11. Regarding Claim 10, Nishihara was modified by Moon which suggests a plated layer (SD) on surfaces of the first step side and the second step side (DO of E3 and E4). Regarding Claim 11, Nishihara was modified by Moon and Kim which suggest a first spaced distance between an outer surface of the first expansion pad and an outer surface of the second expansion pad less than the distance between the lines (hence a ratio of less than 1, see e.g., Kim Fig. 1). The value suggested by the prior art (e.g., less than 1) is close to that claimed (i.e., approximately 0.73 to approximately 0.74), hence obvious, or unpatentable because there is no showing that the claimed proportions were critical (MPEP 2144.05, I.) Regarding Claims 13, Applicant attempts to differentiate the claimed product by the process in which it was made, i.e., “bonded by laser”. Applicant is reminded that “even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process”, see In re Thorpe, 111 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985), MPEP 2113. In this case, Nishihara suggests the electrically conductive solder on the first step side, second step side, and round groove is a cream solder (e.g., reflow solder) applied to the first step side, the second step side, and the round groove, and bonding by heat, thereby electrically connecting to the cell supervision circuit. Regarding Claims 15-16, Nishihara as modified by Moon suggests at least one circuit line of the plurality of circuit lines includes a sub-pad portion (DI, DI1, DI2, Figs. 6-7, 10 of Moon) spaced from a conductive pad portion of the plurality of conductive pad portions (DO, DO1, DO2, Figs. 6-7, 10), and a slot hole (G) in the sub-pad portion into which the electrically conductive solder (SD) is inserted, with the sub-pad portion being electrically connected to the cell supervision circuit by the electrically conductive solder (SD). Claim(s) 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nishihara, Moon and Kim, further in view of Ryu (US 20140030558) and Sanyo (US 2016/0372796), hereinafter Ryu and Sanyo. Regarding Claims 13-14, Applicant attempts to differentiate the claimed product by the process in which it was made, i.e., “bonded by laser”. Applicant is reminded that “even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process”, see In re Thorpe, 111 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985), MPEP 2113. In this case, Nishihara suggests electrically conductive solder on the first step side, second step side, and round groove electrically connected to the cell supervision circuit by heat, but does not suggest the electrically conductive solder is a wire solder. Ryu has recognized wire solder and cream solder as equivalents for the same purpose (e.g., soldering, see e.g., [0051]) in the battery art, hence strong evidence of obviousness in substituting one for the other, MPEP 2144.06. Further, regarding the laser process (relevant to claims 13-14), Sanyo suggests melting and welding solder by laser enhances productivity, [0040]. It would be obvious to one having ordinary skill in the art the cream solder or wire solder is heated, hence melted and welded, by laser with the expectation of improving productivity, as suggested by Sanyo. Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nishihara, Moon and Kim, further in view of Cho et al. (US 2022/0085470), hereinafter Cho. Regarding Claim 17, Nishihara does not suggest a surface of the electrically conductive solder is conformally coated. However, Cho shows sensing lines (L) of the FPCB (200) connected to a circuit board (100) by way of solder (e.g., 110, 60); an electrical connection achieved by conformally coating an electrically conductive solder (60) is advantageous because the heating means (70) can be miniaturized and performed in a relatively narrow space ([0069]). It would be obvious to one having ordinary skill in the art the electrically conductive solder is conformally coated with the expectation utilizing a miniaturized heating means that can be used in a relatively narrow space, as suggested by Cho. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-18 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1-19 of copending Application No. 18370538 in view of Nishihara, Moon, Kim, Ryo, and Sanyo (all cited earlier in the action). Both sets of claims are directed to a battery pack comprising a cell assembly, frame, circuit, and a FPCB connected to the assembly and circuit by a conductive adhesive which is either a solder of conductive glue and includes a conformal coating. Both claims also recite the same features (expansion pads, rounded groove) with respect to the conductive pad portions of the circuit line and dimensions thereof, as well as sub-pad features. Any features not recited in the copending application are made obvious by Nishihara, Moon, Kim, Ryo, and Sanyo as set for in the prior art rejections presented earlier in this action and not repeated here for brevity. This is a provisional nonstatutory double patenting rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANNA KOROVINA whose telephone number is (571)272-9835. The examiner can normally be reached M-Th 7am - 6 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ula Ruddock can be reached at 5712721481. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANNA KOROVINA/Examiner, Art Unit 1729 /ULA C RUDDOCK/Supervisory Patent Examiner, Art Unit 1729
Read full office action

Prosecution Timeline

Oct 16, 2023
Application Filed
Apr 17, 2026
Non-Final Rejection mailed — §103, §DP
Jul 14, 2026
Response Filed
Jul 28, 2026
Final Rejection mailed — §103, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
29%
Grant Probability
51%
With Interview (+22.1%)
4y 1m (~1y 1m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 363 resolved cases by this examiner. Grant probability derived from career allowance rate.

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