Prosecution Insights
Last updated: April 19, 2026
Application No. 18/487,673

TRANSMITTING DATA USING A SHARED NETWORK ADAPTER

Non-Final OA §101§103
Filed
Oct 16, 2023
Examiner
AYERS, MICHAEL W
Art Unit
2195
Tech Center
2100 — Computer Architecture & Software
Assignee
International Business Machines Corporation
OA Round
1 (Non-Final)
70%
Grant Probability
Favorable
1-2
OA Rounds
3y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allow Rate
200 granted / 287 resolved
+14.7% vs TC avg
Strong +56% interview lift
Without
With
+56.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
37 currently pending
Career history
324
Total Applications
across all art units

Statute-Specific Performance

§101
14.8%
-25.2% vs TC avg
§103
47.3%
+7.3% vs TC avg
§102
2.9%
-37.1% vs TC avg
§112
25.6%
-14.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 287 resolved cases

Office Action

§101 §103
DETAILED ACTION This office action is in response to claims filed 16 October 2023. Claims 1-20 are pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claims 1, 8, and 15 are objected to because of the following informalities (line number corresponds to claim 1): In line 6 “imitative state” should read “initiative state”. Appropriate correction is required. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea (mental process) without significantly more. Regarding claim 1, in step 1 of the 101 analysis set forth in MPEP 2106, the claim recites a method that transmits a packet by a network interface card of a shared network adapter based on an initiative state. A method is one of the four statutory categories of invention. In step 2A, prong 1 of the 101 analysis set forth in the MPEP 2106, the examiner has determined that the following limitations recite a process that, under the broadest reasonable interpretation, covers a mental process but for recitation of generic computer components: i. “preparing, by a host, one or more storage block page entries (SBPEs) corresponding to a transmit (TX) packet” (a person can mentally prepare storage block page entries by simply making a judgement of certain data to include in a SBPE (MPEP 2106.04(a))) ii. “determining, based on an initiative state stored in host memory, to transmit an interrupt to inform a shared network adapter of the TX packet” (a person can mentally determine to transmit an interrupt by simply evaluating an initiative state, and making a judgement of whether or not to transmit the interrupt (MPEP 2106.04(a))). iii. “updating the imitative state to indicate the shared network adapter is currently processing TX packets” (a person can mentally update an initiative state by simply evaluating a current state and making a judgement of an updated state (MPEP 2106.04(a))). iv. “updating, after transmitting the TX packet, the initiative state to indicate that the shared network adapter is no longer processing TX packets” (a person can mentally update an initiative state by simply evaluating a current state and making a judgement of an updated state (MPEP 2106.04(a))). If claim limitations, under their broadest reasonable interpretation, covers performance of the limitations as a mental process but for the recitation of generic computer components, then it falls within the mental process grouping of abstract ideas. Accordingly, the claim “recites” an abstract idea. In step 2A, prong 2 of the 101 analysis set forth in MPEP 2106, the examiner has determined that the following additional elements do not integrate this judicial exception into a practical application: v. “programming, by the shared network adapter, a network interface card (NIC) to transmit the TX packet” (generally links the use of the judicial exception to a particular technological environment or field of use (MPEP 2106.05(h))). Since the claim does not contain any other additional elements that are indicative of integration into a practical application, the claim is “directed” to an abstract idea. In step 2B of the 101 analysis set forth in the 2019 PEG, the examiner has determined through reanalysis of the following limitations considered in step 2A prong 2, that the claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. v. “programming, by the shared network adapter, a network interface card (NIC) to transmit the TX packet” (generally links the use of the judicial exception to a particular technological environment or field of use (MPEP 2106.05(h))). Considering the additional elements individually and in combination, and the claim as a whole, the additional elements do not provide significantly more than the abstract idea. Therefore, the claim is not patent eligible. Regarding claim 2, the additional element “checking whether any additional SBPEs corresponding to a new TX packet have been prepared by the host” does not render the claim patent eligible because under step 2A prong 1, it recites a judicial exception (mental process) (a person can mentally check whether SBPEs are prepared by simply observing the host and evaluating whether additional SBPEs have been prepared (MPEP 2106.04(a))). Further, the additional element “determining that no additional SBPEs have been prepared by the host” does not render the claim patent eligible because under step 2A prong 1, it recites a judicial exception (mental process) (a person can mentally determine whether SBPEs have been prepared or not by simply evaluating whether prepared SBPEs exist (MPEP 2106.04(a))). Further the additional element “in response, performing the updating of the initiative state to indicate that the shared network adapter is no longer processing TX packets” does not render the claim patent eligible because under step 2A prong 1, it recites a judicial exception (mental process) (a person can mentally update an initiative state by simply evaluating a current state and making a judgement of an updated state (MPEP 2106.04(a)). Regarding claim 3, the additional element “determining that no additional SBPEs have been prepared by the host comprises determining whether an SBPE index stored in the host memory has been increased” does not render the claim patent eligible because under step 2A prong 1, it recites a judicial exception (mental process) (a person can mentally check whether SBPEs are prepared by simply evaluating whether an index has increased (MPEP 2106.04(a))). Regarding claim 4, the additional element “before updating the initiative state to indicate that the shared network adapter is no longer processing TX packets: checking whether any additional SBPEs corresponding to new TX packets have been prepared by the host…determining that an additional SBPE has been prepared by the host” does not render the claim patent eligible because under step 2A prong 1, it recites a judicial exception (mental process) (a person can mentally check whether SBPEs are prepared by simply observing the host and evaluating whether additional SBPEs have been prepared (MPEP 2106.04(a))). Further, the additional element “upon determining that an additional SBPE has been prepared by the host, programming, by the shared network adapter, the NIC to transmit a new TX packet wherein the initiative state still indicates that the shared network adapter is currently processing TX packets” does not render the claim patent eligible because under step 2A prong 2, it does not integrate the judicial exception into a practical application (generally links the use of the judicial exception to a particular technological environment or field of use (MPEP 2106.05(h)), and under step 2B it does not amount to significantly more than the judicial exception (generally links the use of the judicial exception to a particular technological environment or field of use (MPEP 2106.05(h)). Further, the additional element “before updating the initiative state to indicate that the shared network adapter is no longer processing TX packets: checking whether any additional SBPEs corresponding to new TX packets have been prepared by the host… determining that no additional SBPEs have been prepared by the host” does not render the claim patent eligible because under step 2A prong 1, it recites a judicial exception (mental process) (a person can mentally check whether SBPEs are prepared by simply observing the host and evaluating whether additional SBPEs have been prepared (MPEP 2106.04(a))). Further the additional element “performing the updating of the initiative state to indicate that the shared network adapter is no longer processing TX packets” does not render the claim patent eligible because under step 2A prong 1, it recites a judicial exception (mental process) (a person can mentally update an initiative state by simply evaluating a current state and making a judgement of an updated state (MPEP 2106.04(a)). Regarding claim 5, the additional element “the host does not transmit an interrupt to the shared network adapter in order for the shared network adapter to transmit the new TX packet” does not render the claim patent eligible because under step 2A prong 2, it does not integrate the judicial exception into a practical application (generally links the use of the judicial exception to a particular technological environment or field of use (MPEP 2106.05(h)), and under step 2B it does not amount to significantly more than the judicial exception (generally links the use of the judicial exception to a particular technological environment or field of use (MPEP 2106.05(h)). Regarding claim 6, the additional element “storing an SBPE index in host memory in response to preparing the one or more SBPEs” does not render the claim patent eligible because under step 2A prong 2, it does not integrate the judicial exception into a practical application (insignificant extra-solution activity of mere data storage (MPEP 2106.05(g)), and under step 2B it does not amount to significantly more than the judicial exception (well-understood, routine, and conventional activity of storing data in memory, (MPEP 2106.05(d)(II)). Further, the additional element “passing the SBPE index to the shared network adapter in response to determining to transmit the interrupt to the shared network adapter” does not render the claim patent eligible because under step 2A prong 2, it does not integrate the judicial exception into a practical application (insignificant extra-solution activity of mere data output (MPEP 2106.05(g)), and under step 2B it does not amount to significantly more than the judicial exception (well-understood, routine, and conventional activity of transmitting data over a network, (MPEP 2106.05(d)(II)). Regarding claim 7, the additional element “fetching, by the shared network adapter, the one or more SBPEs from the host memory based on the SBPE index” does not render the claim patent eligible because under step 2A prong 2, it does not integrate the judicial exception into a practical application (insignificant extra-solution activity of mere data gathering (MPEP 2106.05(g)), and under step 2B it does not amount to significantly more than the judicial exception (well-understood, routine, and conventional activity of receiving data over a network (MPEP 2106.05(d)(II)). Regarding claims 8-20, they comprise limitations similar to those of claims 1-7, and are therefore rejected for similar rationale. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 4-9, 11-16, and 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over ELHADDAD et al. Pub. No.: US 2014/0359160 A1 (hereafter ELHADDAD), in view of JAMES et al. Patent No.: US 6,993,022 B1 (hereafter JAMES), in view of SRIVASTRAVA et al. Pub. No.: US 2022/0006883 A1 (hereafter SRIVASTAVA). Regarding claim 1, ELHADDAD teaches the invention substantially as claimed, including: A method comprising: preparing, by a host ([0028] FIG. 2 is a block diagram illustrating functional blocks of computing device 200)…a transmit (TX) packet ([0029] Applications 210A and 210B may include any type of application that may receive or transmit data over a network or other communications medium. For example, applications 210A and 210B may include user-mode programs, kernel-mode processes, virtual machines, or the like (i.e., virtual machine applications generate data to transmit and execute on device 200 which represents a virtual machine “host”). [Claim 16] The portion of the received data includes a plurality of data packets (i.e., data to be transmitted over a network comprises “packets”)); determining, based on an initiative state stored in host memory…to inform a shared network adapter of the TX packet ([0044] Network adapter driver 250 includes traffic classifier 310, queue status component 320, transfer manager component 330, reclamation component 340, and downlink interface 350. [0049] Transfer manager component 330 transfers data from the virtual adapters to the shared network adapter any time data arrives via traffic classifier 310 (i.e., data arrival represents informing of the network adapter driver) while queue status component 320 indicates that the shared network adapter can accept the received data. However, if queue status component 320 indicates that the shared network adapter does not have sufficient queuing resources to currently receive the data, transfer manager component 330 may queue the data for later transfer to the shared network adapter or, in conjunction with traffic classifier 310, may defer acceptance of the data (i.e., queue status is used to determine whether to transmit data to the network adapter driver 250, thereby “informing” the network adapter driver 250 of the TX data)); updating the imitative state to indicate the shared network adapter is currently processing TX packets ([0061] Transfer manager component 330 may transfer data to the shared network adapter until a queue of the shared network adapter has been filled. While this data is being transferred, the shared network adapter may provide status indications regarding the availability queuing resources (i.e., status indications represent the updated status of the queues while the shared network adapter handles the data to be transferred)); programming, by the shared network adapter, a network interface card (NIC) to transmit the TX packet ([0039] In the example of computing device 200, network adapter 260 (i.e., “network interface card”, according to [0001]) is adapted to interface computing device 200 to a wireless medium under the control of network adapter driver 250, e.g., by enabling transmission and reception of data to the wireless medium via an air interface (i.e., network adapter driver causes, or “programs” the network adaptor to transmit the data)); and updating, after transmitting the TX packet, the initiative state to indicate that the shared network adapter is no longer processing TX packets ([0046] For example, these status indications may be notifications of amounts of empty space in a queue of the shared network adapter (e.g., numbers of packets, bytes, bits, frames, etc. that the shared network adapter can currently accept for queuing (i.e., a status indication sent after transmission has completed indicates that the queue is empty and that packets are no longer queued for transmission)). While ELHADDAD discusses processing of transmit packets by shared network adapters, ELHADDAD does not explicitly teach that the transmit packets correspond to: one or more storage block page entries (SBPEs). However, in analogous art that similarly teaches generation of transmit packets, JAMES teaches transmit packets that correspond to: one or more storage block page entries (SBPEs) ([Column 9, Line 61-Column 10, Line 10] The table 46 includes expanded address values which are indexed by corresponding table index values. The table index value within a packet corresponds to a location in the table 46 which includes a corresponding expanded address value including 40 bits…The corresponding expanded address value represents a page table address value mapped into the address space of the target node…After obtaining this expanded address value from the table 46 and including it within the packet, the router 40 then transmits the packet on the appropriate bus directed to the appropriate node (i.e., transmit packet includes, and therefore “corresponds” to a page table address value of a storage block in the target node, representing a “storage block page entry”)). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have combined JAMES’s teaching of a transmit packet including page table address values of an address space of a target node, with ELHADDAD’s teaching of generating a transmit packet, to realize, with a reasonable expectation of success, a system that generates a transmit packet to be handled by a shared network adapter, as in ELHADDAD, which corresponds with page table address values of an address space of a target node, as in JAMES. A person having ordinary skill would have been motivated to make this combination so to ensure that a packet is directed appropriately (JAMES Column 9, Line 61-Column 10, Line 10). While ELHADDAD and JAMES discuss informing a shared network adaptor of incoming data packets, ELHADDAD and JAMES do not explicitly teach: transmit an interrupt to inform a shared network adapter of the TX packet However, in analogous art that similarly transmits data packets between host devices, SRIVASTRAVA teaches: transmit an interrupt to inform a shared network adapter of the TX packet ([0067] The unified adapter layer 110 determines a priority associated with the device data packet at 604. In an embodiment, the device data packets are prioritized in the order that the device data packets are received at the bridge 102. In an embodiment, the unified adapter layer 110 may receive an interrupt from a device 108A1, 108A2, 108B1, 108B2 and the unified adapter layer 110 may prioritize device data packets from the device 108A1, 108A2, 108B1, 108B2 that generated the interrupt over device data packets received from the other devices 108A1, 108A2, 108B1, 108B2. [Claim 16] Cause the machine to: receive an interrupt from the first device; and prioritize transmission of the first host data packet over transmission of the second host data packet to the host device based in part on the received interrupt (i.e., interrupts are transmitted to a unified adapter layer that at least informs the adapter layer of the priority of an incoming data packet)). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have combined SRIVASTRAVA’s teaching of transmitting an interrupt to inform a network adapter of a transmit packet, with ELHADDAD and JAMES’s teaching of generating a transmit packet for a shared network adapter, to realize, with a reasonable expectation of success, a system that generates a transmit packet for a network adapter, as in ELHADDAD and JAMES, and notifies the network adapter of the packet using an interrupt, as in SRIVASTRAVA. A person having ordinary skill would have been motivated to make this combination to more favorably handle packets based on priority indicated by the interrupt (SRIVASTRAVA [0067]). Regarding claim 2, ELHADDAD further teaches: before updating the initiative state to indicate that the shared network adapter is no longer processing TX packets: checking whether any additional SBPEs corresponding to a new TX packet have been prepared by the host; and determining that no additional SBPEs have been prepared by the host, and in response, performing the updating of the initiative state to indicate that the shared network adapter is no longer processing TX packets ([0046] For example, these status indications may be notifications of amounts of empty space in a queue of the shared network adapter (e.g., numbers of packets, bytes, bits, frames, etc. that the shared network adapter can currently accept for queuing (i.e., when no other additional transmit packets are queued for processing, the status indication will indicate that the queue is empty and the shared network adapter is no longer processing any packets)). Regarding claim 4, ELHADDAD further teaches: before updating the initiative state to indicate that the shared network adapter is no longer processing TX packets: checking whether any additional SBPEs corresponding to new TX packets have been prepared by the host; and upon determining that an additional SBPE has been prepared by the host, programming, by the shared network adapter, the NIC to transmit a new TX packet, wherein the initiative state still indicates that the shared network adapter is currently processing TX packets; checking, after transmitting the new TX packet, whether any additional SBPEs have been prepared by the host; and determining that no additional SBPEs have been prepared by the host, and in response, performing the updating of the initiative state to indicate that the shared network adapter is no longer processing TX packets ([0046] For example, these status indications may be notifications of amounts of empty space in a queue of the shared network adapter (e.g., numbers of packets, bytes, bits, frames, etc. that the shared network adapter can currently accept for queuing (i.e., when additional transmit packets are queued for processing, the shared network adapter driver forwards the packets for transmission by the shared network adapter until the queue is empty, whereupon the status indication will indicate that the queue is empty and the shared network adapter is no longer processing any packets)). Regarding claim 5, ELHADDAD further teaches: the host does not transmit an interrupt to the shared network adapter in order for the shared network adapter to transmit the new TX packet ([0049] Transfer manager component 330 transfers data from the virtual adapters to the shared network adapter any time data arrives via traffic classifier 310 (i.e., data arrival represents informing of the network adapter driver without transmission of an interrupt, because the packet is queued without interrupting the operation of the network adapter) while queue status component 320 indicates that the shared network adapter can accept the received data). Regarding claim 6, JAMES further teaches: storing an SBPE index in host memory in response to preparing the one or more SBPEs; and passing the SBPE index to the shared network adapter ([Column 9, Line 61-Column 10, Line 10] The table 46 includes expanded address values which are indexed by corresponding table index values (i.e., “SBPE indexes”). The table index value within a packet corresponds to a location in the table 46 which includes a corresponding expanded address value including 40 bits…The corresponding expanded address value represents a page table address value mapped into the address space of the target node…After obtaining this expanded address value from the table 46 and including it within the packet, the router 40 then transmits the packet on the appropriate bus directed to the appropriate node (i.e., transmit packet includes, and therefore “corresponds” to a page table address value of a storage block in the target node, representing a “storage block page entry”)) SRIVASTRAVA further teaches passing the [packet] to the shared network adapter in response to determining to transmit the interrupt to the shared network adapter ([0067] The unified adapter layer 110 determines a priority associated with the device data packet at 604. In an embodiment, the device data packets are prioritized in the order that the device data packets are received at the bridge 102. In an embodiment, the unified adapter layer 110 may receive an interrupt from a device 108A1, 108A2, 108B1, 108B2 and the unified adapter layer 110 may prioritize device data packets from the device 108A1, 108A2, 108B1, 108B2 that generated the interrupt over device data packets received from the other devices 108A1, 108A2, 108B1, 108B2. [Claim 16] Cause the machine to: receive an interrupt from the first device; and prioritize transmission of the first host data packet over transmission of the second host data packet to the host device based in part on the received interrupt). Regarding claim 7, JAMES further teaches: fetching, by the shared network adapter, the one or more SBPEs from the host memory based on the SBPE index ([Column 9, Line 61-Column 10, Line 10] The table 46 includes expanded address values which are indexed by corresponding table index values. The table index value within a packet corresponds to a location in the table 46 which includes a corresponding expanded address value including 40 bits…The corresponding expanded address value represents a page table address value mapped into the address space of the target node…After obtaining (i.e., “fetching” based on the index value) this expanded address value from the table 46 and including it within the packet, the router 40 then transmits the packet on the appropriate bus directed to the appropriate node (i.e., transmit packet includes, and therefore “corresponds” to a page table address value of a storage block in the target node, representing a “storage block page entry”)). Regarding claims 8-9, 11-16, and 18-20, they comprise limitations similar to claims 1-2, and 4-7, and are rejected for similar rationale. Claims 3, 10, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over ELHADDAD, in view of JAMES, in view of SRIVASTRAVA, as applied to claims 2, 9, and 16 above, and in further view of HIROTA Pub. No.: US 2016/0373346 A1 (hereafter HIROTA). Regarding claim 3, while ELHADDAD, JAMES, and SRIVASTRAVA discuss processing of packets, they do not explicitly teach: determining that no additional SBPEs have been prepared by the host comprises determining whether an SBPE index stored in the host memory has been increased. However, in analogous art that similarly teaches processing of packets, HIROTA teaches: determining that no additional SBPEs have been prepared by the host comprises determining whether an SBPE index stored in the host memory has been increased ([0101] Timing at which the processing unit 140 that is an allocation destination is changed is determined by counting the number of packets (i.e., “SBPEs”) that have been processed at that time by the processing unit 140. For example, a counter is provided that increments the count value by 1 when a packet having a certain flow ID has been transmitted to a certain processing unit 140 and decrements the count value by 1 when a packet in which the processing has been completed has been recovered from the processing unit 140. In addition, when the counter value becomes “0”, it is determined that the processing unit 140 that is the allocation destination may be changed (i.e., determining whether the counter has a zero value represents a determination of whether that counter has been increased to a non-zero value or not, and when zero, indicates that there are no additional packets of a processing flow that are waiting for processing)). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have combined HIROTA’s teaching of a counter associated with transmit packets that indicates whether packets of a processing flow are waiting for processing, with the combination of ELHADDAD, JAMES and SRIVASTRAVA’s teaching of generating packets for processing, to realize, with a reasonable expectation of success, a system that generates packets for processing, as in ELHADDAD and JAMES, which are tracked using a counter that indicates whether packet processing has completed, as in HIROTA. A person having ordinary skill would have been motivated to make this combination to increase processor utilization and balance load across processing units (HIROTA [0004]). Regarding claims 10, and 17, they comprise limitations similar to claim 3, and are therefore rejected for similar rationale. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL W AYERS whose telephone number is (571)272-6420. The examiner can normally be reached M-F 8:30-5 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Aimee Li can be reached at (571) 272-4169. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHAEL W AYERS/Primary Examiner, Art Unit 2195
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Prosecution Timeline

Oct 16, 2023
Application Filed
Mar 13, 2026
Non-Final Rejection — §101, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
70%
Grant Probability
99%
With Interview (+56.2%)
3y 4m
Median Time to Grant
Low
PTA Risk
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