Prosecution Insights
Last updated: May 29, 2026
Application No. 18/488,029

FREQUENCY DATA TRANSMISSION AND ENCRYPTION SYSTEM

Non-Final OA §103
Filed
Oct 16, 2023
Priority
Feb 04, 2011 — provisional 61/462,582 +3 more
Examiner
SANDHU, AMRITBIR K
Art Unit
2634
Tech Center
2600 — Communications
Assignee
Calsys Holdings LLC
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
580 granted / 701 resolved
+20.7% vs TC avg
Moderate +11% lift
Without
With
+10.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
9 currently pending
Career history
714
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
70.2%
+30.2% vs TC avg
§102
0.8%
-39.2% vs TC avg
§112
4.0%
-36.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 701 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement 2. The Information Disclosure Statement filed on 11/04/2025 has been partially considered. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: For claim 16, a. network interface device configured for signals… on lines 9,10; b. each optical component of the two or more optical components being configured…on lines 17,18. For claim 22, a. each first optical component of the two or more optical components being configured…on lines 14,15. b. the second optical component being configured to… on lines 24,25. For claim 26, a. each first optical component of the two or more optical components being configured…on lines 5-7; b. the second optical component being configured to… on lines 14,15. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. a. The computer system 1500 may include a network interface device 1580, for example, a modem or network router to allow the color mit component to transmit and receive data to and from a network 1585, see paragraph 164. b. The light bus system may provide light speed connectivity to the components including a CPU/processor 1510 that transmits instructions 1515 to direct the operations and function of the components connected to the light bus 115 in an embodiment of the present invention and an alphanumeric input device 1540, such as a keyboard and user interface (UI), may include a mouse to enable the user to create direct input into the computer system 1500. A search request by the user from the keyboard may instruct the reader 180 to read data using the reader driver 270 to initiate the scanner LED 274 to illuminate the color mits and send the search results to a display device 1520 that may send instructions 1515 to, for example, a printer to print the search results. The reader driver 270 may also transmit through the bus system to one or more video display devices such as a liquid crystal display (LCD), light emitting diode (LED) 274, or a cathode ray tube (CRT) to allow the user to see the results of an embodiment of the present invention, see figure 15 as reproduced below. PNG media_image1.png 662 616 media_image1.png Greyscale If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 16-21 are rejected under 35 USC 103 as being unpatentable over Morrow et al; (US 2005/0276604) in view of Tsaur et al; (US 8510271). Regarding claim 16, Morrow discloses a server system comprising one or more optical devices configured for use in the server system, (Multiprocessor architectures may be implemented to realize network processors, web servers, database servers, see paragraph 2) at least one optical device of the one or more optical devices comprising: a processor configured to process one or more computer-readable instructions ;(microprocessor 205 for processing the one or more computer-readable instructions, see figure 5) one or more i/o components coupled with the processor, (I/O devices 245 coupled with the microprocessor 205, see figure 5) wherein the one or more i/o components include: a memory component;(shared memory 235, see figure 5) a driver component including one or more of a mapping driver, a reader driver, or a writer driver, or a signal generation device component;( one transmitter to write to a designated one of optical buses 505 and multiple receivers to read from the other optical buses 505 and memory controller 230 is the sole client device capable of writing to optical bus 505B, while I/O controller 240 is the sole client device capable of writing to optical bus 505A, and so on for processors 205, see paragraph 36 and figure 5) and an optical bus coupling the processor with the one or more i/o components, (optical buses 505A and 505B coupled with the microprocessors 205a, see paragraph 39 and figure 5) wherein the optical bus comprises two or more optical components, (optical bus 210 include medium capable of transporting optical signals therein and the optical bus 210 is a waveguide laminated into circuit board 215, see paragraph 24 and optical coupler 510 either read data from optical buses 505 or write data to optical buses 505, see paragraph 36 and figure 5) each optical component of the two or more optical components being configured to do one or more of the following: generate a first optical signal;( transceiver 700 for converting data between the electrical and optical realm in a multiprocessor architecture using an optical bus, see paragraph 44) transport the first optical signal, (optical bus 210 include medium capable of transporting optical signals therein and the optical bus 210 is a waveguide laminated into circuit board 215, see paragraph 24) reflect the first optical signal,( optical bus 210 may include end mirrors to allow optical signals 610 and 615 to reflect back, see paragraph 42) process the first optical signal, identify a first frequency of the of the first optical signal, convert the first frequency to a first computer-readable instructions of the one or more computer-readable instructions, read the first optical signal, (optical coupler 510 either read data from optical buses 505 or write data to optical buses 505, see paragraph 36 and figure 5) convert the first optical signal to a second computer-readable instructions of the one or more computer-readable instructions, convert the one or more computer-readable instructions to the first optical signal, multiply the first optical signal with a second optical signal, combine the first optical signal to the second optical signal, subtract the first optical signal from the second optical signal, divide the first optical signal with the second optical signal, perform a logic operation on the first optical signal or the second optical signal, bend a wavelength of the first optical signal, half the wavelength of the first optical signal, filter the wavelength of the first optical signal, encrypt the first optical signal, encrypt the first frequency, decrypt the first optical signal, and decrypt the first frequency.(Only one of the claim limitation is required to be considered by the Examiner). However, Morrow does not explicitly disclose including one or more of Random Access Memory (RAM), a disk drive, a static memory, a Read Only Memory (ROM), a main memory, or a Hard disk memory (HDD), a network interface device configured for signals to be transmitted via a network, an input/output device component including one or more of a router, a sound card, a video card, or a video display device. In a related field of endeavor, Tsaur discloses including one or more of Random Access Memory (RAM),( Memory 620 can be a random access memory (RAM), see column 16, lines 3,4 and figure 6) a disk drive, a static memory, a Read Only Memory (ROM), a main memory, or a Hard disk memory (HDD), a network interface device configured for signals to be transmitted via a network; (network interface 654, see figure 6) an input/output device component including one or more of a router, a sound card, a video card, or a video display device ;(Graphics and display device 656, see figure 6). Thus, it would be obvious for one of the ordinary skilled in the art before the effective filling date of the invention to combine the network interface and display device of Tsaur with Morrow to support the display and the communication and the motivation is to display the output data and supporting optical and/or wireless communication interface. Regarding claim 17, Morrow discloses the server system of claim 16 wherein one or more of the first optical signal ;(optical transceiver 700 with optical source 740for generating continuous wave (CW), see paragraph 45) and the second optical signal has a transmission characteristic, the transmission characteristic including one or more of the following: a particular frequency, a frequency hopping method, a transmission speed, a transmission grouping, a transmission on/off pattern;(a first portion of the CW optical input is provided to E-O transmitter 725 as a carrier wave on which electrical data, received from one of processors 205 via electrical input port 730, is modulated with encoded data as (0101010), see paragraph 46) a reflective property, and a transmission sequence.(Only one of the claim limitation is required to be considered by the Examiner). Regarding claim 18, Morrow discloses the server system of claim 16 wherein the first optical signal represents a first data, wherein the second optical signal represents a second data different from the first data; (if optical bus 210 supports a WDMA protocols, then multiple O-E receivers 735 may be coupled to optical bus 210 for each wavelength and modulated with electrical data, received from one of processors 205 via electrical input port 730, is modulated (first and second optical signal corresponding to different wavelengths), see paragraphs 46 and 49 and figures 8 and 9). Regarding claim 19, Morrow does not explicitly disclose the server system of claim 16 wherein the one or more computer-readable instructions include one or more of an encryption method, a decryption method, an algorithm, a bytecode, a computer program, a java applet, HTML code, a graphics code, a routine, a key, a formula, an indicator, a pointer, or an index. In a related field of endeavor, Tsaur discloses the server system of claim 16 wherein the one or more computer-readable instructions include one or more of an encryption method;(computer system processor 610 coupled with the memory 620 with encryption software, column 16, line 21) a decryption method, an algorithm, a bytecode, a computer program, a java applet, HTML code, a graphics code, a routine, a key, a formula, an indicator, a pointer, or an index. (Only one of the claim limitation is required to be considered by the Examiner). Thus, it would be obvious for one of the ordinary skilled in the art before the effective filling date of the invention to combine the encryption software and/or hashing software of Tsaur with Morrow to scramble the data into an unreadable code and the motivation is to provide increased security for transmitted data. Regarding claim 20, Morrow does not explicitly disclose the server system of claim 16 wherein the encryption and the decryption include one or more of the following: hashing, symmetric cryptography, and asymmetric cryptography. In a related field of endeavor, Tsaur discloses the server system of claim 16 wherein the encryption and the decryption include one or more of the following: hashing, ;(computer system processor 610 coupled with the memory 620 with hashing software, column 16, line 21) symmetric cryptography, and asymmetric cryptography. Motivation same as claim 19. Regarding claim 21, Morrow discloses the server system of claim 16 wherein the first optical signal is propagated through one or more fiber optic strands; (optical bus 210 include medium capable of transporting optical signals therein and the optical bus 210 is a waveguide laminated into circuit board 215, see paragraph 24). Claims 22,24 and 25 are rejected under 35 USC 103 as being unpatentable over Morrow et al; (US 2005/0276604) in view of Tsaur et al; (US 8510271). Regarding claim 22, Morrow discloses an optical device configured for use in a server system, (Multiprocessor architectures may be implemented to realize network processors, web servers, database servers, see paragraph 2) the optical device comprising: a processor configured to process one or more computer-readable instructions ;(microprocessor 205 for processing the one or more computer-readable instructions, see figure 5) one or more i/o components coupled with the processor, (I/O devices 245 coupled with the microprocessor 205, see figure 5) wherein the one or more i/o components include: a memory component;(shared memory 235, see figure 5) a driver component including one or more of a mapping driver, a reader driver, or a writer driver, or a signal generation device component; ;( one transmitter to write to a designated one of optical buses 505 and multiple receivers to read from the other optical buses 505 and memory controller 230 is the sole client device capable of writing to optical bus 505B, while I/O controller 240 is the sole client device capable of writing to optical bus 505A, and so on for processors 205, see paragraph 36 and figure 5) and an optical bus coupling the processor with the one or more i/o components, wherein the optical bus comprises two or more first optical components, (optical bus 210 include medium capable of transporting optical signals therein and the optical bus 210 is a waveguide laminated into circuit board 215, see paragraph 24 and optical coupler 510 either read data from optical buses 505 or write data to optical buses 505, see paragraph 36 and figure 5) each first optical component of the two or more first optical components being configured to do one or more of the following: generate a first optical signal configured to be transmitted ;( transceiver 700 for converting data between the electrical and optical realm in a multiprocessor architecture using an optical bus, see paragraph 44) identify a first frequency of the first optical signal, convert the first frequency to a first computer-readable instructions of the one or more computer-readable instructions, read the first optical signal, (optical coupler 510 either read data from optical buses 505 or write data to optical buses 505, see paragraph 36 and figure 5) or convert the first optical signal to a second computer-readable instructions of the one or more computer-readable instructions, (Only one of the claim limitation is required ot be considered by the Examiner) wherein the optical bus comprises a second optical component, the second optical component being configured to do one or more of the following: convert the one or more computer-readable instructions to the first optical signal, reflect the first optical signal, ( optical bus 210 may include end mirrors to allow optical signals 610 and 615 to reflect back, see paragraph 42) process the first optical signal, perform a logic operation with the first optical signal, multiply the first optical signal with a second optical signal, combine the first optical signal to the second optical signal, subtract the first optical signal from the second optical signal, divide the first optical signal with the second optical signal, bend a wavelength of the first optical signal, half the wavelength of the first optical signal, filter the wavelength of the first optical signal, encrypt the first optical signal, encrypt the first frequency, decrypt the first optical signal, and decrypt the first frequency. (Only one of the claim limitation is required ot be considered by the Examiner). However, Morrow does not explicitly disclose including one or more of Random Access Memory (RAM), a disk drive, a static memory, a Read Only Memory (ROM), a main memory, or a Hard disk memory (HDD), an input/output device component including one or more of a router, a sound card, a video card, or a video display device. In a related field of endeavor, Tsaur discloses including one or more of Random Access Memory (RAM),( Memory 620 can be a random access memory (RAM), see column 16, lines 3,4 and figure 6) a disk drive, a static memory, a Read Only Memory (ROM), a main memory, or a Hard disk memory (HDD), an input/output device component including one or more of a router, a sound card, a video card, or a video display device. ;(Graphics and display device 656, see figure 6). Thus, it would be obvious for one of the ordinary skilled in the art before the effective filling date of the invention to combine the display device of Tsaur with Morrow to support the display and the communication and the motivation is to display the output data. Regarding claim 24, Morrow discloses the optical device of claim 22 wherein the optical bus is configured to transmit two or more frequencies, wherein the two or more frequencies are configured to propagate non-binary analog data; (if optical bus 210 supports a WDMA protocols, then multiple O-E receivers 735 may be coupled to optical bus 210 for each wavelength (frequency) and modulated with electrical data, (analog data) received from one of processors 205 via electrical input port 730, is modulated see paragraphs 46 and 49 and figures 8 and 9). Regarding claim 25, Morrow discloses the optical device of claim 22 wherein the first frequency is indicia of particular data that is independent of data transmitted by the first optical signal ;(a first portion of the CW optical input is provided to E-O transmitter 725 as a carrier wave (first wavelength or first frequency) on which electrical data, received from one of processors 205 via electrical input port 730, is modulated with encoded data as (0101010), see paragraph 46). Claim 23 is rejected under 35 USC 103 as being unpatentable over Morrow et al; (US 2005/0276604) in view of Tsaur et al; (US 8510271) and further in view of Butcher (US 2004/0017377). Regarding claim 23, the combination of Morrow and Tsaur does not explicitly disclose the optical device of claim 22 wherein the one or more computer-readable instructions include binary code. In a related field of endeavor, Butcher discloses the optical device of claim 22 wherein the one or more computer-readable instructions include binary code; (colored filled bitmap with the binary code representing the appropriate filled color register, see paragraph 96 and figure 13). Thus, it would be obvious for one of the ordinary skilled in the art before the effective filling date of the invention to combine the color bit map of Butcher with Morrow and Tsaur to provide one bit for each pixel of the display data and the motivation is to provide efficient structuring of the pixel data in the memory. Claims 26-33 are rejected under 35 USC 103 as being unpatentable over Morrow et al; (US 2005/0276604) view of Tsaur et al; (US 8510271). Regarding claim 26, Morrow discloses an optical device configured for use in a server system, (Multiprocessor architectures may be implemented to realize network processors, web servers, database servers, see paragraph 2) the optical device comprising: a processor configured to process one or more computer-readable instructions;(microprocessor 205 for processing the one or more computer-readable instructions, see figure 5) a memory component coupled with the processor;(shared memory 235 coupled with the microprocessor 205A, see figure 5) an optical bus coupling the,(optical buses 505A and 505B coupled with the microprocessors 205a and further coupled to the memory controller 230, see paragraph 39 and figure 5) wherein the optical bus comprises two or more first optical components, (optical bus 210 include medium capable of transporting optical signals therein and the optical bus 210 is a waveguide laminated into circuit board 215, see paragraph 24 and optical coupler 510 either read data from optical buses 505 or write data to optical buses 505, see paragraph 36 and figure 5) each first optical component of the two or more first optical components being configured to do one or more of the following: generate a first optical signal configured to be transmitted, (optical bus 210 include medium capable of transporting optical signals therein and the optical bus 210 is a waveguide laminated into circuit board 215, see paragraph 24) identify a first frequency of the first optical signal, convert the first frequency to a first computer-readable instructions of the one or more computer-readable instructions, read the first optical signal, (optical coupler 510 either read data from optical buses 505 or write data to optical buses 505, see paragraph 36 and figure 5) or convert the first optical signal to a second computer-readable instructions of the one or more computer-readable instructions, wherein the optical bus comprises a second optical component, (optical bus 210 may include end mirrors to allow optical signals 610 and 615 to reflect back, see paragraph 42) the second optical component being configured to do one or more of the following: convert the one or more computer-readable instructions to the first optical signal, reflect the first optical signal,( optical bus 210 may include end mirrors to allow optical signals 610 and 615 to reflect back, see paragraph 42) process the first optical signal, perform a logic operation with the first optical signal, multiply the first optical signal with a second optical signal, combine the first optical signal to the second optical signal, subtract the first optical signal from the second optical signal, divide the first optical signal with the second optical signal, bend a wavelength of the first optical signal, half the wavelength of the first optical signal, filter the wavelength of the first optical signal, encrypt the first optical signal, encrypt the first frequency, decrypt the first optical signal, and decrypt the first frequency. (Only one of the claim limitation is required to be considered by the Examiner). However, Morrow does not explicitly disclose coupling processor with the memory component. In a related field of endeavor, Tsaur discloses coupling processor with the memory component; (one or more processors 610 and memories 620 coupled together by a communications bus 605, see figure 6). Thus, it would be obvious for one of the ordinary skilled in the art before the effective filling date of the invention to combine direct coupling of the processor with the memory of Tsaur with Morrow to provide direct memory access between the devices coupled with the communication bus and the memory and the motivation is to provide high-speed data transfers directly between the devices and memory. Regarding claim 27, Morrow discloses the optical device of claim 26 wherein one or more of the first optical signal ;(optical transceiver 700 with optical source 740for generating continuous wave (CW), see paragraph 45) and the second optical signal has a transmission characteristic, the transmission characteristic including one or more of the following: a particular frequency, a frequency hopping method, a transmission speed, a transmission grouping, a transmission on/off pattern, ;(a first portion of the CW optical input is provided to E-O transmitter 725 as a carrier wave on which electrical data, received from one of processors 205 via electrical input port 730, is modulated with encoded data as (0101010), see paragraph 46) a reflective property, and a transmission sequence.(Only one of the claim limitation is required to be considered by the Examiner). Regarding claim 28, Morrow discloses the optical device of claim 26 wherein the first optical signal represents a first data, wherein the second optical signal represents a second data different from the first data ; (if optical bus 210 supports a WDMA protocols, then multiple O-E receivers 735 may be coupled to optical bus 210 for each wavelength and modulated with electrical data, received from one of processors 205 via electrical input port 730, is modulated (first and second optical signal corresponding to different wavelengths), see paragraphs 46 and 49 and figures 8 and 9). Regarding claim 29, Morrow does not explicitly disclose the optical device of claim 26 wherein the one or more computer-readable instructions include one or more of an encryption method, a decryption method, an algorithm, a bytecode, a computer program, a java applet, HTML code, a graphics code, a routine, a key, a formula, an indicator, a pointer, or an index. In a related field of endeavor, Tsaur discloses the optical device of claim 26 wherein the one or more computer-readable instructions include one or more of an encryption method ;(computer system processor 610 coupled with the memory 620 with encryption software, column 16, line 21) a decryption method, an algorithm, a bytecode, a computer program, a java applet, HTML code, a graphics code, a routine, a key, a formula, an indicator, a pointer, or an index. (Only one of the claim limitation is required to be considered by the Examiner). Thus, it would be obvious for one of the ordinary skilled in the art before the effective filling date of the invention to combine the encryption software and/or hashing software of Tsaur with Morrow to scramble the data into an unreadable code and the motivation is to provide increased security for transmitted data. Regarding claim 30, Morrow discloses The optical device of claim 26 wherein the optical bus is configured to transmit two or more frequencies, wherein the two or more frequencies are configured to propagate non-binary analog data; (if optical bus 210 supports a WDMA protocols, then multiple O-E receivers 735 may be coupled to optical bus 210 for each wavelength (frequency) and modulated with electrical data, (analog data) received from one of processors 205 via electrical input port 730, is modulated see paragraphs 46 and 49 and figures 8 and 9). Regarding claim 31, Morrow discloses the optical device of claim 26 wherein the first frequency is indicia of particular data that is independent of data transmitted by the first optical signal ;(a first portion of the CW optical input is provided to E-O transmitter 725 as a carrier wave (first wavelength or first frequency) on which electrical data, received from one of processors 205 via electrical input port 730, is modulated with encoded data as (0101010), see paragraph 46). Regarding claim 32, Morrow does not explicitly disclose the optical device of claim 26 wherein the encryption and the decryption includes one or more of the following: hashing, symmetric cryptography, and asymmetric cryptography. In a related field of endeavor, Tsaur discloses the optical device of claim 26 wherein the encryption and the decryption includes one or more of the following: hashing, ;(computer system processor 610 coupled with the memory 620 with hashing software, column 16, line 21) symmetric cryptography, and asymmetric cryptography. Motivation same as claim 29. Regarding claim 33, Morrow discloses the optical device of claim 26 wherein the first optical signals propagated through one or more fiber optic strands; (optical bus 210 include medium capable of transporting optical signals therein and the optical bus 210 is a waveguide laminated into circuit board 215, see paragraph 24). Conclusion 3. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure is reproduced below. a. Levy et al; (US 7366423) discloses a memory apparatus also includes an optical interface, and an optical-to-electrical signal converter is coupled to receive optical signals from the optical interface and provide electrical signals to the electrical device, see figure 6a. b. Steckl et al; (US 7087281) discloses DTF optical memory making use of the property of dielectric thin film interference to create multi-color pixels and serve as a multi-level optical memory device, see figure 1. c. Hino et al; (EP1467505 A1) discloses an illumination light source to apply light and an information-transmitting unit to transmit optical information, see figure 1. Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMRITBIR K SANDHU whose telephone number is (571)270-1894. The examiner can normally be reached M-F 9am to 5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kenneth Vanderpuye can be reached at 571-272-3078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AMRITBIR K SANDHU/Primary Examiner, Art Unit 2634
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Prosecution Timeline

Oct 16, 2023
Application Filed
Nov 10, 2025
Non-Final Rejection mailed — §103
Dec 27, 2025
Interview Requested
Jan 05, 2026
Examiner Interview Summary
Jan 05, 2026
Response Filed
Jan 05, 2026
Applicant Interview (Telephonic)

Precedent Cases

Applications granted by this same examiner with similar technology

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Self-Compensating Polarization Modulator
2y 10m to grant Granted May 26, 2026
Patent 12640761
OPTICAL SIGNAL TRANSMISSION DEVICE AND METHOD BASED ON DIGITAL PREDISTORTION IN SYMBOL DOMAIN
2y 9m to grant Granted May 26, 2026
Patent 12640818
OPTICAL SIGNAL DETECTORS COMPRISING OPTICAL SIGNAL SENSORS AND LOGARITHMIC AMPLIFIERS, SYSTEMS COMPRISING THE SAME, AND METHODS OF USE THEREFOR
2y 6m to grant Granted May 26, 2026
Patent 12615090
SYSTEMS AND METHODS FOR ENABLING AN OPTICS BASED COMPUTE SYSTEM ASSOCIATED WITH TRANSMISSION AND RECEPTION
2y 10m to grant Granted Apr 28, 2026
Patent 12609769
MONITORING OPTICAL SIGNAL ARRIVAL ADJUSTMENT DEVICE, OPTICAL COMMUNICATION TRANSMISSION PATH, OPTICAL COMMUNICATION SYSTEM, AND OPTICAL COMMUNICATION TRANSMISSION PATH MONITORING METHOD
3y 1m to grant Granted Apr 21, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
94%
With Interview (+10.8%)
2y 3m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 701 resolved cases by this examiner. Grant probability derived from career allowance rate.

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