DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 13-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 13 recites “wherein at least one of the lower electrode or the upper electrode has comb-shaped portions connected in parallel, the comb-shaped portions are extended from the first end / the second end of the substrate to the second end / the first end along the top surface of the substrate.” Claims 14-18 depend on claim 13.
Above recitation requires clarification. It is unclear as to how the comb-shaped portions are extending and/or as to how the comb-shaped portions are relative to the electrodes and/or the substrate.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 7, 10-11 and 13-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tsukada et al.
Regarding claim 1, Tsukada teaches the printed chip resistor (see at least paragraph 0029
and figs. 1-5), comprising:
a substrate (5);
a resistor layer (3) disposed on a top surface of the substrate;
a lower electrode (1A); and
an upper electrode (1B), wherein along a direction perpendicular to the top
surface, the lower electrode (1A) is disposed between the substrate (5) and the resistor
layer (3), and the resistor layer (3) is disposed between the upper electrode (1B) and the
lower electrode (1A),
wherein at least one of the lower electrode or the upper electrode (1B) has comb-shaped portions (finger like portions shown in fig. 5) connected in parallel (parallel to the upper electrode 1b), and the comb-shaped portions are extended from one end of the substrate toward an end of another one of the lower electrode or the upper electrode along the top surface of the substrate (Since no limitation exists to the direction of the comb-shaped portions in relations to the electrode [lower or upper], the finger like portions of Tsukada teaches the “extended”, extending from the “S2” to “T2” direction or from “1B” to “1A”. See fig. 5.).
Regarding claims 2 and 3, Tsukada teaches the printed chip resistor, wherein the effective sectional area S2 of the resistive layer covered the overlapping area between the upper electrode 1B and the lower electrode 1A (see paragraph 0025).
Regarding claims 4 and 7, Tsukada teaches the printed chip resistor, wherein the upper
electrode (1B) and the lower electrode (1A) are respectively located at two ends of the substrate
(see fig. 2).
Regarding claim 10, Tsukada teaches the method for producing a printed chip resistor,
comprising:
forming a lower electrode (1A) on a top surface of a substrate (5);
forming a resistor layer (3) on the lower electrode (1A); and
forming an upper electrode (1B) on the resistor layer to form a resistor body of
the printed chip resistor (see at least paragraph 0029), wherein along a direction perpendicular
to the top surface, at least one portion of the upper electrode overlaps at least one portion of the
lower electrode (the effective sectional area S2 of the resistive layer 3 between the upper
electrode 1B and the lower electrode 1A; paragraph 0025,
wherein at least one of the lower electrode or the upper electrode (1B) has comb-shaped portions (finger like portions shown in fig. 5) connected in parallel (parallel to the upper electrode 1b), and the comb-shaped portions are extended from one end of the substrate toward an end of another one of the lower electrode or the upper electrode along the top surface of the substrate (Since no limitation exists to the direction of the comb-shaped portions in relations to the electrode [lower or upper], the finger like portions of Tsukada teaches the “extended”, extending from the “S2” to “T2” direction or from “1B” to “1A”. See fig. 5.).
Regarding claim 11, Tsukada teaches the trimming of the upper electrode and/or the
lower electrode (resistance is adjusted by trimming [T2] away the chip resistor having the three-
layered structure; see paragraph 0030 and fig. 3).
Regarding claim 13, Tsukada teaches the printed chip resistor (see at least paragraph
0029 and figs. 1-5), comprising:
a substrate (5);
a lower electrode (1A), disposed on a top surface of the substrate, and the lower electrode
is located at a first end of the substrate (left side; see fig. 2);
an upper electrode (1B), disposed on the top surface pf the substrate and the lower electrode, and the upper electrode is located at a second end of the substrate (right side), wherein the first end is different from the second end; and
a resistor layer (3), disposed between the lower electrode and the upper
electrode, wherein the upper electrode and the lower electrode are electrically insulated to each other,
along a direction perpendicular to the top surface, a projective area of the resistor layer (resistive layer 3 projects; see figs. land 2) covers an overlapping area where a projective area of the upper electrode overlaps a projective area of the lower electrode,
wherein at least one of the lower electrode or the upper electrode (1B) has comb-shaped portions (finger like portions shown in fig. 5) connected in parallel (parallel to the upper electrode 1b), and the comb-shaped portions are extended from one end of the substrate toward an end of another one of the lower electrode or the upper electrode along the top surface of the substrate (Since no limitation exists to the direction of the comb-shaped portions in relations to the electrode [lower or upper], the finger like portions of Tsukada teaches the “extended”, extending from the “S2” to “T2” direction or from “1B” to “1A”. See fig. 5.).
Regarding claim 14, Tsukada teaches the first end and the second end being opposite
sides of the top surface of the substrate (Tsukada teaches the “extended”, extending from the “S2” to “T2” direction or from “1B” to “1A”. See fig. 5.).
Regarding claim 15 and 16, Tsukada teaches the projective area of the resistive layer
having a larger surface than the overlapping area of the upper electrode and the lower electrode
(see figs. 1 and 2).
Regarding claim 17, Tsukada teaches the upper electrode (1B) and the resistive layer (3)
both being in direct contact with the top surface of the substrate (see fig. 2).
Regarding claim 18, Tsukada teaches the printing chip resistor, wherein the upper
electrode (1B) and the resistor layer (3) respectively includes:
a base portion, directly disposed on the top surface of the substrate (see fig. 2); and
an extension portion, along the direction perpendicular to the top surface, a projective
area of the extension portion of the resistor layer (3), a projective area of the
extension portion of the upper electrode (1B) and the projective area of the lower electrode (1A)
are overlapping each other.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 5-6 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Tsukada.
Regarding claims 5-6 and 8, Tsukada teaches the claimed invention except for a length of the lower electrode being not greater than (4/5) x L1, wherein L1 represents a length of the first side; and a length of the lower electrode being not greater than (4/5) x L2, wherein L2 represents
a length of the second side. Further, Tsukada teaches the claimed invention except for the length of the lower electrode being not less than (1/3) x L1.
Tsukada, however, teaches the resistance value of for the chip resistor being determined by the effective sectional area of the resistive film layered between the upper and lower electrodes (S2; see figs. 1-3). That is, by controlling the effective sectional area the resistance value can be adjusted (e.g. set the resistance before fine tuning by trimming). Further, the overvoltage breakage caused by the concentration current at the resistive body is reduced (see at least col. 3, lines 19-39, lines 47-53 and col. 5, lines 15-33).
It would have been obvious to one skilled in the art before effective filing date of the claimed invention to have controlled the size of the lower electrode as taught by Tsukada, since the controlling the size of the lower electrode and controlling the overlap allows for adjusting the initial resistance of the resistive device before fine tuning, and also prevent the resistive device from premature breakage due to concentrated current.
Claims 9 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Tsukada in view of Urano.
Regarding claims 9 and 12, Tsukada teaches the claimed invention except for the printed chip resistor, further comprising: a protective layer, disposed on the upper electrode, and the protective layer completely covers the resistor layer; two back electrodes, respectively disposed at two ends on a bottom surface of the substrate; and two terminal electrodes, respectively disposed at two ends of the substrate, wherein one of the two terminal electrodes is electrically connected to one of the two back electrodes and the lower electrode, and another one of the two terminal electrodes is electrically connected to another one of the back electrodes and the upper electrode.
Urano teaches the printed chip resistor and the method of producing the printed chip resistor comprising:
a protective layer (epoxy resin layer 7 for the purpose protecting the at least resistive layer, see col. 6, lines 5-19), disposed on the upper electrode (portion of the upper electrode 6), and the protective layer completely covers the resistor layer (fully over the resistive layer 5);
two back electrodes (the electrode 8 for face-down mounting of the chip, see col. 6, lines 5-19), respectively disposed at two ends on a bottom surface of the substrate; and
two terminal electrodes (comprising of at least a side electrode 9 and plating layers 10- 13, the terminals allow for face-down mounting of the chip resistor, see col. 6, lines 5-19), respectively disposed at two ends of the substrate, wherein one of the two terminal electrodes (9) is electrically connected to one of the two back electrodes (8) and the lower electrode (4), and another one of the two terminal electrodes (another side electrode 9) is electrically connected to another one of the back electrodes (8) and the upper electrode (6).
It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to combine the teachings of Urano with Tsukada, since the protective layer taught by Urano protects the chip resistor device of Tsukada. Further, the back electrodes and the terminals taught by Urano allows for the versatility of the chip resistor of Tsukada for face-up or face-down mounting.
Response to Arguments
Applicant's arguments filed July 2, 2026 have been fully considered but they are not persuasive.
Applicant argues Tsukada fails to teach the amended claim 1, specific to “the comb-shaped portions are extended from one end of the substrate towards an end of another one of the lower electrode or the upper electrode along the top surface of the substrate.”
The examiner respectfully disagrees.
Tsukada teaches the comb-portions (see fig. 5), wherein the comb-portion extends from one end of the substrate towards another or the upper electrode along the top surface of the substrate (from 1B to 1A or from S2 to T2, T3).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYUNG S LEE whose telephone number is (571)272-1994. The examiner can normally be reached 7AM-3PM M-F.
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/KYUNG S LEE/Primary Examiner, Art Unit 2831
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