Prosecution Insights
Last updated: April 19, 2026
Application No. 18/489,472

SEMICONDUCTOR DEVICES AND MANUFACTURING METHODS THEREOF

Non-Final OA §103
Filed
Oct 18, 2023
Examiner
AHMED, MEHEK
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
100%
Grant Probability
Favorable
1-2
OA Rounds
3y 7m
To Grant
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allow Rate
12 granted / 12 resolved
+32.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
14 currently pending
Career history
26
Total Applications
across all art units

Statute-Specific Performance

§103
50.7%
+10.7% vs TC avg
§102
31.9%
-8.1% vs TC avg
§112
15.9%
-24.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 12 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 10/18/2023 has been considered by the examiner and made of record in the application file. Priority Acknowledgement is made of applicant’s claim for priority under 35 U.S.C 119(a)-(d) or (f), 365(a) or (b), or 386(a) based upon application KR10-2023-0059258 filed in REPUBLIC OF KOREA on 05/08/2023. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections – 35 USC § 103 The following is a quotation of 35 U.S.C. § 103 which forms the basis for all obviousness rejections set forth in this office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 5-6, and 16 are rejected under 35 U.S.C § 103 as being unpatentable over Noble et. al. US Patent Pub. No. 6689660B1, hereinafter “Noble” in view of Kang et. al. US Patent Pub. No. 6128213A, hereinafter “Kang.” [AltContent: arrow][AltContent: arrow][AltContent: rect][AltContent: arrow][AltContent: rect][AltContent: arrow][AltContent: rect][AltContent: arrow][AltContent: rect][AltContent: arrow][AltContent: arrow][AltContent: rect][AltContent: rect][AltContent: rect] PNG media_image1.png 591 697 media_image1.png Greyscale Regarding claim 1, Noble teaches a manufacturing method for a semiconductor device (fabrication process shown in FIG. 5A-5M), comprising: forming first (first word line #206 in FIG. 2) and second word lines (second word line #207) in a substrate (placed within substrate #210 in FIG. 2); forming a first separation groove (a trench #220 is formed as a separation groove) between the first word line (first word line #206 in FIG. 2) and the second word line (second word line #207 in FIG. 2), wherein the first separation groove includes a first insulating layer (isolation trench #220 is filled with silicon dioxide #224 which is a first insulating layer in column 4, lines 61-64); and forming first (first bit line #202 in FIG. 2) and second bit lines (second bit line #204 in FIG. 2) on the substrate (substrate #210 in FIG. 2). FIG. 2 of Noble does not teach wherein respective ends of the first and second word lines are connected to each other. However, FIG. 10 of Kang does teach wherein respective ends of the first and second word lines are connected to each other (a first word line SWL1 is connected to a second SWL2 through the SWL driver). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to consider providing a manufacturing method for a semiconductor device that involves forming first and second word lines in a substrate, forming a first separation groove between the first word line and the second word line, wherein the first separation groove includes a first insulating layer; and forming first and second bit lines on the substrate as taught in Noble and respective ends of the first and second word lines are connected to each other as taught in Kang. A person of ordinary skill in the art would know that combining these two structures in the semiconductor device for high-density semiconductor memory arrays for uniform word line biasing and electrical insulation. The separation groove with an insulating layer as taught in Noble isolates adjacent word lines which reduces leakage current and suppresses parasitic couples and having ends of word lines being connected to one another as taught by Kang helps reduce word line resistance and minimizes voltage drop along elongated word lines. One of ordinary skill would additionally know that the combination applies known semiconductor structures for a memory device and known arrangements of word lines and bit lines for device reliability and performance. Thus, Kang cures the deficiencies of Noble. Regarding claim 2, Noble in view of Kang teaches a manufacturing method of claim 1 (Noble, fabrication process shown in FIG. 5A-5M), wherein the forming of the first (first bit line #202 in FIG. 2) and second bit lines (second bit line #204 in FIG. 2) comprises: stacking a conductive layer on the substrate (Noble, n+ material #212 is a conductive channel thus a conductive layer on the substrate allowing current flow through the device an on the substrate #210); forming a second separation groove (Noble, second trenches in the layers of semiconducting materials such as trenches #221 in FIG. 2) by primary etching the conductive layer (Noble, etching portion of first layer to form trenches described in claim 22); and forming the first bit line (Noble, first bit line #202 in FIG. 2) and the second bit line (Noble, second bit line #204 in FIG. 2) separated from each other by the second separation groove (Noble, trenches #221) by secondary etching the conductive layer (Noble, directionally etching the second layer in claim 22), wherein the first separation groove (Noble, trenches #220) and the second separation groove (Noble, trenches #221) are formed by a same process (Noble, both trenches #220 and #221 are formed by directionally etching the third layer, second layer, and first layer to form the first and second trenches), wherein the second separation groove (trenches #221) is at least partially filled with the first insulating layer (filled with a layer of layer #542 of thermal oxide silicon oxide), wherein the conductive layer is separated into a first portion (left side is n+ material #212) and a second portion (right side is n+ material #212) by the second separation groove (by the trench #222), and wherein the second separation groove extends into the substrate (trenches #222 which is the second trench extends into substrate #210). Regarding claim 5, Noble in view of Kang teaches manufacturing method of claim 1, wherein the first separation groove (trenches #220) separates the first word line (first word line is #206) and the second word line (second word line is #207), and wherein the first separation groove (trenches #220) overlaps the second word line (is being overlapped by the second word line #207). Regarding claim 6, Noble in view of Kang teaches manufacturing method of claim 1, wherein the first separation groove (Noble, a trench #220 is formed as a separation groove) overlap a connection between the first word line (Noble, first word line #206 in FIG. 2) and the second word line (Noble, second word line #207 in FIG. 2). Regarding claim 16, the manufacturing method for a semiconductor device, comprising: forming first (first word line #206 in FIG. 2) and second word lines (second word line #207) in a substrate (placed within substrate #210 in FIG. 2); forming a first separation groove (a trench #220 is formed as a separation groove), wherein the first word line (first word line #206 in FIG. 2) and the second word line (second word line #207 in FIG. 2) are electrically separated by the first separation groove and the first separation groove is at least filled by a first insulating layer (isolation trench #220 electrically isolated and is a separation groove is filled with silicon dioxide #224 which is a first insulating layer in column 4, lines 61-64); and forming first (first bit line #202 in FIG. 2) and second bit lines (second bit line #204 in FIG. 2) on the substrate (substrate #210). FIG. 2 of Noble does not teach wherein respective ends of the first and second word lines are connected to each other. However, FIG. 10 of Kang does teach wherein respective ends of the first and second word lines are connected to each other (a first word line SWL1 is connected to a second word line SWL2 through the SWL driver). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to consider providing a manufacturing method for a semiconductor device that involves forming first and second word lines in a substrate, forming a first separation groove between the first word line and the second word line, wherein the first separation groove includes a first insulating layer; and forming first and second bit lines on the substrate as taught in Noble and respective ends of the first and second word lines are connected to each other as taught in Kang. A person of ordinary skill in the art would know that combining these two structures in the semiconductor device for high-density semiconductor memory arrays for uniform word line biasing and electrical insulation. The electrically insulating separation groove with an insulating layer as taught in Noble electrically isolates adjacent word lines which reduces leakage current and suppresses parasitic couples and having ends of word lines being connected to one another as taught by Kang helps reduce word line resistance and minimizes voltage drop along elongated word lines. One of ordinary skill would additionally know that the combination applies known semiconductor structures for a memory device and known arrangements of word lines and bit lines for device reliability and performance. Thus, Kang cures the deficiencies of Noble. Allowable Subject Matter Claims 3-4, 7-15, and 17-20 are allowed. The following is a statement of reasons for the indication of allowable subject matter. Regarding claim 3, Noble in view of Kang teaches manufacturing method of claim 2, further comprising: removing a portion of the conductive layer (Noble, etching of the third layer in claim 22) that is in a first region (Noble, that is in the first region of transistor #130 in FIG. 2) where the first separation groove is to be formed before forming the first separation groove (Noble, the first trenches #220 is formed before forming the first trench); and forming a second insulating layer (Noble, SiO2 #224 is grown & filled at the base of the trenches #220 in column 5, lines 23-41) in the first region, wherein the forming of the first (Noble, trenches #220) and second separation (Noble, trenches #221) grooves But Noble and Kang do not appear to explicitly disclose, that the first and second separation grooves includes etching the second insulating layer. The claimed process sequence such as the first and second separation grooves includes etching the second insulating layer are not taught by Noble and Kang. The prior art may disclose individual concepts such as memory device that involves removing a portion of a conductive layer, first region, a formation of the first separation groove, second insulating layer, and forming the first and second separation grooves. However, no references teach the specific order combination with removing a portion of a conductive layer, first region, a formation of the first separation groove, second insulating layer, and forming the first and second separation grooves and then etching away the second insulating layer. Noble and Kang fails to teach or suggest the entire combination as arranged in the claim and the specific process is not rendered obvious by the cited teachings. Additionally, there was no prior art that one of ordinary skill in the art would use alone or would find obvious to combine with the invention of Noble and Kang to reach all of the limitations of the claim. Moreover, both Noble and Kang do not teach etching away of a second insulating layer like silicon oxide #224 within the first and second separation grooves. The cited prior arts do not disclose or suggest performing etching away a second insulating layer. For these reasons, the claimed subject matter as a whole would not have been obvious to one of ordinary skill in the art at the time of filing. Therefore, claim 3 contains allowable subject matter. Dependent claim 4 depend directly or indirectly from claim 3 and, thus, further define and/or limit the subject matter recited therein. Therefore, dependent claim 4 also contains allowable subject matter. Regarding claim 7, Noble in view of Kang teaches manufacturing method of claim 1. But Noble and Kang do not appear to explicitly disclose, that forming third and fourth word lines in the substrate separated from the first and second word lines, and connected to each other at respective ends; and forming a second separation groove separating the third word line and the fourth word line. The claimed process sequence such as the formation of the third and fourth word line in the substrate are separated from the first and second lines and using the second separation groove to separate the third and fourth word lines are not taught by Noble and Kang. The prior art may disclose individual concepts such as memory device that involves removing a portion of a conductive layer, first region, a formation of the first separation groove, second insulating layer, and forming the first and second separation grooves, a first word line, a second word line and a third word line. However, no references teach the specific order combination with forming both third and fourth word line in the substrate separated from the first and second word lines. Noble and Kang fails to teach or suggest the entire combination as arranged in the claim and the specific process is not rendered obvious by the cited teachings. Additionally, there was no prior art that one of ordinary skill in the art would use alone or would find obvious to combine with the invention of Noble and Kang to reach all of the limitations of the claim. Moreover, both Noble and Kang do not teach forming third and fourth word lines in the substrate separated from the first and second word lines, and connected to each other at respective ends, and forming a second separation groove separating the third word line and the fourth word line. The cited prior arts do not disclose or suggest performing forming the third and fourth word line in the substrate and connecting them along with having the second trench also separating a third and fourth word line. For these reasons, the claimed subject matter as a whole of having both third and fourth word lines and connecting said word lines along with having second trench that separates the third and fourth word lines would not have been obvious to one of ordinary skill in the art at the time of filing. Therefore, claim 7 contains allowable subject matter. Dependent claims 8-10 depend directly or indirectly from claim 7 and, thus, further define and/or limit the subject matter recited therein. Therefore, dependent claims 8-10 also contains allowable subject matter. Regarding claim 11, Noble in view of Kang teaches he manufacturing method of claim 1. However, Noble in view of Kang teaches does not teach forming third and fourth word lines in the substrate separated from the first and second word lines, and connected to each other at respective ends, wherein the first separation groove overlaps a connection between the third word line and the fourth word line. The claimed process sequence such as the formation of the third and fourth word line in the substrate are separated from the first and second lines and using first separation groove overlaps a connection between the third word line and the fourth word line are not taught by Noble and Kang. The prior art may disclose individual concepts such as memory device that involves removing a portion of a conductive layer, first region, a formation of the first separation groove, second insulating layer, and forming the first and second separation grooves, a first word line, a second word line and a third word line. However, no references teach the specific order combination with forming both third and fourth word lines in the substrate separated from the first and second word lines and first separation groove overlaps a connection between the third word line and the fourth word line. Noble and Kang fails to teach or suggest the entire combination as arranged in the claim and the specific process is not rendered obvious by the cited teachings. Additionally, there was no prior art that one of ordinary skill in the art would use alone or would find obvious to combine with the invention of Noble and Kang to reach all of the limitations of the claim. Moreover, both Noble and Kang do not teach forming third and fourth word lines in the substrate separated from the first and second word lines, and connected to each other at respective ends, and forming a first separation groove which overlaps a connection between the third word line and the fourth word line. The cited prior arts do not disclose or suggest performing forming the third and fourth word line in the substrate and first separation groove having overlapping a connection between the third word line and the fourth word line. For these reasons, the claimed subject matter as a whole that includes this overlapping connection between the third and fourth word lines would not have been obvious to one of ordinary skill in the art at the time of filing. Therefore, claim 11 contains allowable subject matter. Regarding claim 12, , Noble in view of Kang teaches manufacturing method of claim 1. However, Noble in view of Kang teaches does not teach forming third and fourth word lines in the substrate separated from the first and second word lines, and connected to each other at respective ends; and forming a third separation groove separated from the first separation groove and overlapping a connection between the third word line and the fourth word line. The claimed process sequence such as the forming third and fourth word lines in the substrate separated from the first and second word lines, and connected to each other at respective ends, and forming a third separation groove separated from the first separation groove and overlapping a connection between the third word line and the fourth word line are not taught by Noble and Kang. The prior art may disclose individual concepts such as memory device that involves removing a portion of a conductive layer, first region, a formation of the first separation groove, second insulating layer, and forming the first and second separation grooves. However, no references teach the specific order combination with forming third and fourth word lines in the substrate separated from the first and second word lines, and connected to each other at respective ends, and forming a third separation groove separated from the first separation groove and overlapping a connection between the third word line and the fourth word line. Noble and Kang fails to teach or suggest the entire combination as arranged in the claim and the specific process is not rendered obvious by the cited teachings. Additionally, there was no prior art that one of ordinary skill in the art would use alone or would find obvious to combine with the invention of Noble and Kang to reach all of the limitations of the claim. Moreover, both Noble and Kang do not teach forming third and fourth word lines in the substrate separated from the first and second word lines, and connected to each other at respective ends, and forming a third separation groove separated from the first separation groove and overlapping a connection between the third word line and the fourth word line. The cited prior arts do not disclose or suggest performing any configuration and physical electrical arrangement with the third and fourth word lines and a third separation groove that is separated from the first separation groove and that overlaps the connection between the third and fourth wordline. For these reasons, the claimed subject matter as a whole that includes this overlapping connection between the third and fourth word lines would not have been obvious to one of ordinary skill in the art at the time of filing. Therefore, claim 12 contains allowable subject matter. Regarding claim 13, Noble in view of Kang teaches manufacturing method of claim 1, further comprising: forming a first connection plug (Noble, storage connector #132 in FIG. 2) connected to the first word line (Noble, first word line is #206). However, Noble in view of Kang does not teach a second connection plug connect to the first bit line. The claimed process sequence such as the second connection plug connecting to the first bit line is not taught by Noble and Kang. The prior art may disclose individual concepts such as memory device that involves removing a portion of a conductive layer, first region, a formation of the first separation groove, second insulating layer, and forming the first and second separation grooves. However, no references teach the specific order combination with a second connection plug connected to the first bit line. Noble and Kang fails to teach or suggest the entire combination as arranged in the claim and the specific process is not rendered obvious by the cited teachings. Additionally, there was no prior art that one of ordinary skill in the art would use alone or would find obvious to combine with the invention of Noble and Kang to reach all of the limitations of the claim. Moreover, both Noble and Kang do not teach a second connection plug being connected to the first bit line. The cited prior arts do not disclose or suggest nor does it explicitly state implementing a second connection plug to be connected to a first bit line. For these reasons, the claimed subject matter as a whole would not have been obvious to one of ordinary skill in the art at the time of filing. Therefore, claim 13 contains allowable subject matter. Dependent claims 14-15 depend directly or indirectly from claim 13 and, thus, further define and/or limit the subject matter recited therein. Therefore, dependent claims 14-15 also contains allowable subject matter. Regarding claim 17, Noble in view of Kang teaches manufacturing method of claim 16. However, Noble in view of Kang does not teach forming third and fourth word lines in the substrate separated from the first and second word lines, and electrically connected to each other at respective ends; and forming a second separation groove that electrically separates the third word line and the fourth word line. The claimed process sequence such as the formation of third and fourth word lines in the substrate separated from the first and second word lines, and electrically connected to each other at respective ends, and forming a second separation groove that electrically separates the third word line and the fourth word line are not taught by Noble and Kang. The prior art may disclose individual concepts such as memory device that involves removing a portion of a conductive layer, first region, a formation of the first separation groove, second insulating layer, and forming the first and second separation grooves. However, no references teach the specific order combination with forming third and fourth word lines in the substrate separated from the first and second word lines, and electrically connected to each other at respective ends, and forming a second separation groove that electrically separates the third word line and the fourth word line. Noble and Kang fails to teach or suggest the entire combination as arranged in the claim and the specific process is not rendered obvious by the cited teachings. Additionally, there was no prior art that one of ordinary skill in the art would use alone or would find obvious to combine with the invention of Noble and Kang to reach all of the limitations of the claim. Moreover, both Noble and Kang do not teach the formation of third and fourth word lines in the substrate separated from the first and second word lines, and electrically connected to each other at respective ends, and forming a second separation groove that electrically separates the third word line and the fourth word line. The cited prior arts do not disclose or suggest performing any formation of third and fourth lines that are both separated by the first and second word line and having a second separation groove that separates the third and fourth word line. For these reasons, the claimed subject matter as a whole would not have been obvious to one of ordinary skill in the art at the time of filing. Therefore, claim 17 contains allowable subject matter. Dependent claim 18 depend directly or indirectly from claim 17 and, thus, further define and/or limit the subject matter recited therein. Therefore, dependent claim 18 also contains allowable subject matter. Regarding claim 19, Noble in view of Kang teaches a manufacturing method for a semiconductor device (fabrication process shown in FIG. 5A-5M), comprising: forming first (first word line #206 in FIG. 2) and second word lines (second word line #207) in a substrate (placed within substrate #210 in FIG. 2); forming a first separation groove (a trench #220 is formed as a separation groove) between the first word line (first word line #206 in FIG. 2) and the second word line (second word line #207 in FIG. 2), wherein the first separation groove is at least filled by a first insulating layer (isolation trench #220 is filled with silicon dioxide #224 which is a first insulating layer in column 4, lines 61-64); forming first (first bit line #202 in FIG. 2) and second bit lines (second bit line #204 in FIG. 2) on the substrate (substrate #210 in FIG. 2). However, Noble in view of Kang does not teach forming third and fourth word lines in the substrate separated from the first and second word lines, and electrically connected to each other at respective ends; and forming a second separation groove between the third word line and the fourth word line. The claimed process sequence such as the formation of third and fourth word lines in the substrate separated from the first and second word lines, and electrically connected to each other at respective ends, and forming a second separation groove between the third word line and the fourth word line are not taught by Noble and Kang. The prior art may disclose individual concepts such as memory device that involves removing a portion of a conductive layer, first region, a formation of the first separation groove, second insulating layer, and forming the first and second separation grooves. However, no references teach the specific order combination with removing a portion of a conductive layer, first region, a formation of the first separation groove, second insulating layer, and forming the first and second separation grooves and then etching away the second insulating layer. Noble and Kang fails to teach or suggest the entire combination as arranged in the claim and the specific process is not rendered obvious by the cited teachings. Additionally, there was no prior art that one of ordinary skill in the art would use alone or would find obvious to combine with the invention of Noble and Kang to reach all of the limitations of the claim. Moreover, both Noble and Kang do not teach the formation of third and fourth word lines in the substrate separated from the first and second word lines, and electrically connected to each other at respective ends, and forming a second separation groove between the third word line and the fourth word line. The cited prior arts do not disclose or suggest configuring an arrangement that involves third and fourth word lines in the substrate separated from the first and second word lines, and electrically connected to each other at respective ends, and forming a second separation groove between the third word line and the fourth word line. For these reasons, the claimed subject matter as a whole would not have been obvious to one of ordinary skill in the art at the time of filing. Therefore, claim 19 contains allowable subject matter. Dependent claim 20 depend directly or indirectly from claim 19 and, thus, further define and/or limit the subject matter recited therein. Therefore, dependent claim 20 also contains allowable subject matter. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MEHEK AHMED whose telephone number is (571)-272-4155. The examiner can normally be reached from 9:00 AM – 7:00 PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached on (571) 270-1402 The fax phone number for the organization where this application or proceeding is assigned is (571) 270-1402. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MEHEK AHMED/ Examiner, Art Unit 2812 /William B Partridge/ Supervisory Patent Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Oct 18, 2023
Application Filed
Feb 19, 2026
Non-Final Rejection — §103
Mar 26, 2026
Applicant Interview (Telephonic)
Mar 27, 2026
Examiner Interview Summary

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Expected OA Rounds
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Grant Probability
99%
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3y 7m
Median Time to Grant
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