DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings received on 10/19/2023 have been accepted by the examiner.
Information Disclosure Statement
Acknowledgment is made of applicant's Information Disclosure Statement (IDS) Form PTO-1449, filed 10/19/2023. The information disclosed therein was considered.
Election/Restrictions
Newly submitted claims 21-30 directed to an invention that is independent or distinct from the invention originally claimed for the following reasons:
Inventions I and the newly added claims 21-27 are related as process of making and product made. The inventions are distinct if either or both of the following can be shown: (1) that the process as claimed can be used to make another and materially different product or (2) that the product as claimed can be made by another and materially different process (MPEP § 806.05(f)). In the instant case invention, the newly added claims 21-27 have separate utility such as the limitation “reverse biasing the first MIS structure to induce a first flat band voltage shift in the first MIS structure; forward biasing the second MIS structure to induce a second flat band voltage shift in the second MIS structure, wherein an absolute value of the second flat band voltage shift is greater than an absolute value of the first flat band voltage shift”, requires a device that is capable of operating first flat band voltage shift in reverser biasing and a second flat band voltage in forward biasing. In case of invention I, it can be made with a different process that does not requires for the flat band voltages shifts in forward and reverse biasing.
In regarding to the newly added claims 28-30, are related as process of making and product made. The inventions are distinct if either or both of the following can be shown: (1) that the process as claimed can be used to make another and materially different product or (2) that the product as claimed can be made by another and materially different process (MPEP § 806.05(f)). In the instant case invention, the newly added claims 28-30 have separate utility such as the limitation “and performing breakdown processes to one or more of the first to third MIS structure, so that the insulating layers of the first to third MIS structures have different numbers of breakdown paths therein, respectively.” And “Wherein the first to third insulating layers have substantially the same thickness and the same material”, can only be made with material that requires a third MIS structures having same thickness and the same material as the first and second MIS structures. Wherein invention I, can be made with two MIS structures having different thickness and material.
Since applicant has received an action on the merits for the originally presented invention, this invention has been constructively elected by original presentation for prosecution on the merits. Accordingly, claims 21-30 withdrawn from consideration as being directed to a non-elected invention. See 37 CFR 1.142(b) and MPEP § 821.03.
To preserve a right to petition, the reply to this action must distinctly and specifically point out supposed errors in the restriction requirement. Otherwise, the election shall be treated as a final election without traverse. Traversal must be timely. Failure to timely traverse the requirement will result in the loss of right to petition under 37 CFR 1.144. If claims are subsequently added, applicant must indicate which of the subsequently added claims are readable upon the elected invention.
Should applicant traverse on the ground that the inventions are not patentably distinct, applicant should submit evidence or identify such evidence now of record showing the inventions to be obvious variants or clearly admit on the record that this is the case. In either instance, if the examiner finds one of the inventions unpatentable over the prior art, the evidence or admission may be used in a rejection under 35 U.S.C. 103 or pre-AIA 35 U.S.C. 103(a) of the other invention.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 8-10 is/are rejected under 35 U.S.C. 102a(1) as being anticipated by Yeh et al (US20060073642).
Regarding claim 1: Yeh discloses a method, comprising: forming a first metal-insulator-semiconductor (MIS) structure (a first memory cell along a first word line in a memory array 270 in FIG. 21) and a second MIS structure (a second memory cell, on the first word line or on the same bit line as the first memory cell, in a memory array 270 in FIG. 21) wherein each of the first and second MIS structures comprises a semiconductor layer (12 in FIG. 1 or 15 in FIG. 2 or 18 in FIG. 3), an insulating layer (11 in FIG. 1 or 14 in FIG. 2 or 17 in FIG. 3; [0087 & 0097] discloses example dielectric materials, wherein bottom electrode are formed on an insulating substrate) over the semiconductor layer, and a metal electrode layer ([0030, 0088] disclose that any one of the electrodes 10 or 12 may be a metal;) over the insulating layer;
performing a first breakdown process to the first MIS structure (memory array 270 in FIG. 21, wherein in each cell stores multiple bits per cell as is disclosed in [0111], the first memory cell is programmed to a 01 state, for example, in FIG. 34);
performing a second breakdown process to the second MIS structure (memory array 270 in FIG. 21, wherein in each cell stores multiple bits per cell as is disclosed in [0111], the second memory cell is programmed to 11 state, for example; note that although the claim does not claim any differentiation between “first breakdown process” and “second breakdown process” other than by using a different name, Yeh discloses that each cell is programmed by using progressive breakdown, see [0012, 0015-0017]; the first cell may be programmed by using different progressive amounts of stress for example, see programming in [0033-0040], such that the two cells have a different progression or degree of breakdown, and hence, a different process);
performing a first read operation by supplying a reading voltage pulse (a read pulse of Vr=1.3V is applied to the word line when selecting the first cell as illustrate din FIG. 30A-B) to the metal electrode layer of the first MIS structure and detecting a first read current flowing through the first MIS structure ([0108-0109] disclose the read current is compared with reference currents, and the results are decoded as disclosed in FIG. 19 or FIG. 20; see 272 and 276 in FIG. 21 as well, [0110]); and
performing a second read operation by supplying the reading voltage pulse (the read pulse of Vr=1.3V is applied to the second cell as illustrate din FIG. 30A-B; could be to the same first word line or to a different word line, depending on the location of the second memory cell) to the metal electrode layer of the second MIS structure and detecting a second read current flowing through the second MIS structure ([0108-0109] disclose the read current is compared with reference currents, and the results are decoded as disclosed in FIG. 19 or FIG. 20; see 272 and 276 in FIG. 21 as well, [0110]), wherein the second read current is greater than the first read current (note that the read current for a cell in state 11 is higher than the read current for the cell in state 01, as seen in FIG. 34).
Regarding claim 8, Yeh discloses wherein the first breakdown process comprises reverse biasing the semiconductor layer (FIG 30D; [0128] reverse bias).
Regarding claim 9, Yeh discloses wherein the second breakdown process comprises forward biasing the semiconductor layer (FIG 27B; [0121] forward bias)
Regarding claim 10, Yeh discloses wherein the insulating layer is a single continuous layer having a bottom surface and a top surface in contact with the semiconductor layer and the metal electrode layer, respectively (11 in FIG. 1 or 14 in FIG. 2 or 17 in FIG. 3; [0087 & 0097] discloses diffusions types 15/18 on bottom of 14/17 and electrodes on top (10,13,16)).
Allowable Subject Matter
Claim 2-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Bandyopadhyay et al (US20140241031 FIG 1; [0032] discloses limiting current through memory cell 10 to a second current limit greater than the first current limit, and memory element 16 switching to a third type of conductivity, wherein third read current is higher than second read current flowing through memory cell 10 upon application of read voltage).
Lee et al (US20230223062 FIG 1 & 2; [0032] discloses read current Tred being greater than a reference current Iref).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUNA A TECHANE whose telephone number is (571)272-7856. The examiner can normally be reached 571-272-7856.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at 571-272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MUNA A TECHANE/Primary Examiner, Art Unit 2827
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