Prosecution Insights
Last updated: April 19, 2026
Application No. 18/491,176

AMPLIFIER

Non-Final OA §102
Filed
Oct 20, 2023
Examiner
LIENG, MALANE
Art Unit
2843
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sumitomo Electric Industries, Ltd.
OA Round
1 (Non-Final)
96%
Grant Probability
Favorable
1-2
OA Rounds
3y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 96% — above average
96%
Career Allow Rate
22 granted / 23 resolved
+27.7% vs TC avg
Moderate +6% lift
Without
With
+6.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
20 currently pending
Career history
43
Total Applications
across all art units

Statute-Specific Performance

§103
39.3%
-0.7% vs TC avg
§102
39.3%
-0.7% vs TC avg
§112
19.7%
-20.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 23 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Root (US 8593219 B1), hereafter referred to as “Root”. Regarding claims 1-3, in the embodiment of Figs. 2 and 5, Root discloses: An amplifier (Figs. 2 and 5, inverted/non-inverting Doherty topology) comprising: a first amplifier (Peaking amplifier device 236,536) amplifying a first signal (RF input signal 202,502 is divided by splitter 204,504, first signal is applied to Peaking Amplifier 236,536); a first matching circuit having (Figs, 2, 3, and 5, single/double/triple inductor-capacitor matching sections in Fig. 3, 340,334,350, impedance transform circuit 238,538, functions as output matching circuits) a first end electrically connected to an output node of the first amplifier (Figs. 2,3,5, connected to 236,536), and a second end electrically connected to a first intermediate node (Fig. 5, intermediate node can be found in frequency-adjustable phase delay circuit 520); and a first transmission line (Fig. 5, adjustable phase offset transmission line 585) having a first end electrically connected to the first intermediate node (Fig. 5, 585 is connected to 520), and a second end electrically connected to a first output node (power combine point 552) , wherein at a center frequency of an operating band (column 7, lines 51-56, phase matching transmission lines are used to offset a design-centering fixed frequency), a first reactance component of an impedance seen from the first output node toward the first transmission line (Fig. 5, impedance inverter 550, column 6, lines 19-26, frequency adjustable phase delay circuits (e.g. 550 connected to combine point 552) reactance can be adjusted) is smaller than a second reactance component of an impedance seen from the first intermediate node toward the first matching circuit (column 17, lines 36-43, the electrical length and reactance of phase delay circuit 600 (such as frequency adjustable phase delay 520) can be adjusted, e.g. to be smaller than the intermediate node towards the matching circuit, as per claim 2), and at the center frequency, a first characteristic impedance of the first transmission line (585) is 0.5 to 2 times an absolute value of a first impedance seen from the second end of the first matching circuit toward the first matching circuit when the first end and the second end of the first matching circuit are terminated to a reference impedance (column 16, lines 14-48, transmission lines, phase offset circuits 206, 280, 281, 583, 584, and 585 and impedance inverter 550 may comprise variable length transmission lines to reach desirable operating conditions, similar to the Frequency-adjustable phase delay circuits that are used for retuning of impedance transformations at the input or output of corresponding amplifier devices, as per claim 3). Allowable Subject Matter Claims 4-10 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 4: the cited prior art of record, either singly or in proper combination, does not teach or make obvious, along with the other claimed features, “wherein at the center frequency, a third reactance component of an impedance seen from the second output node toward the second transmission line is smaller than a fourth reactance component of an impedance seen from the second intermediate node toward the second matching circuit” Claims 5-10 are objected to as being dependent on claim 4. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MALANE LIENG whose telephone number is (571)272-5739. The examiner can normally be reached Monday-Friday 6:30 - 4:00 CST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Baltzell can be reached at (571) 272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MALANE LIENG/ Examiner, Art Unit 2843 /ANDREA LINDGREN BALTZELL/ Supervisory Patent Examiner, Art Unit 2843
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Prosecution Timeline

Oct 20, 2023
Application Filed
Feb 05, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603620
Class-D Amplifier
2y 5m to grant Granted Apr 14, 2026
Patent 12592670
EFFICIENT COMMON MODE SUPPRESSION FOR TRANSMISSION SYSTEMS
2y 5m to grant Granted Mar 31, 2026
Patent 12587149
STABILITY IN POWER AMPLIFIERS UNDER HIGH IN-BAND VOLTAGE STANDING WAVE RATIO CONDITION
2y 5m to grant Granted Mar 24, 2026
Patent 12587143
POWER AMPLIFIER STABILITY ENHANCEMENT AT EXTREME CONDITIONS
2y 5m to grant Granted Mar 24, 2026
Patent 12587146
POWER AMPLIFIER DEVICES WITH IN-PACKAGE MATCHING CIRCUITS THAT PROVIDE PSEUDO INVERSE CLASS F OPERATION
2y 5m to grant Granted Mar 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
96%
Grant Probability
99%
With Interview (+6.3%)
3y 4m
Median Time to Grant
Low
PTA Risk
Based on 23 resolved cases by this examiner. Grant probability derived from career allow rate.

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