Prosecution Insights
Last updated: July 17, 2026
Application No. 18/491,704

BRINGING QUANTUM COMPUTE CAPABILITIES TO CLASSICAL COMPUTING CHIPSET

Non-Final OA §101§102§103§112
Filed
Oct 20, 2023
Examiner
NGUYEN, NHAT HUY T
Art Unit
4100
Tech Center
4100
Assignee
Qualcomm Incorporated
OA Round
1 (Non-Final)
54%
Grant Probability
Moderate
1-2
OA Rounds
9m
Est. Remaining
77%
With Interview

Examiner Intelligence

Grants 54% of resolved cases
54%
Career Allowance Rate
191 granted / 356 resolved
-6.3% vs TC avg
Strong +23% interview lift
Without
With
+23.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
24 currently pending
Career history
405
Total Applications
across all art units

Statute-Specific Performance

§101
1.5%
-38.5% vs TC avg
§103
83.2%
+43.2% vs TC avg
§102
13.2%
-26.8% vs TC avg
§112
1.5%
-38.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 356 resolved cases

Office Action

§101 §102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 Claims 1-30 are pending for examination. Claims 1, 13, 22 and 30 are independent Claims. Claims 1-3, 5-7, 11, 13, 15-17, 20, 22, 24-26 and 29-30 are rejected under 35 U.S.C. §101(a)(1). Claims 4, 8-10, 12, 14, 18-19, 21, 23 and 27-8 are rejected under 35 U.S.C. §103. Claim Rejections - 35 USC § 112 Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Such claim limitation(s) is/are: "means for executing processes on a remote quantum computing system" in claim 30. The limitation is construed as QPU core which is a classical CPU as in paragraph 0059 of the Applicants’ Specification. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-3, 5-7, 11, 13, 15-17, 20, 22, 24-26 and 29-30 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cao (U.S. 2021/0064350 hereinafter Cao). As Claim 1, Cao teaches a quantum computing apparatus, comprising: a classical processing unit (Cao (¶0039 last 3 lines), “The local computer 402 (classical processing unit) may provide (e.g., transmit over a network) the first assembly code 428 to the first remote computing device 430”); and a quantum processing unit coupled to the classical processing unit (Cao (¶0041 line 1-4), “in response to receiving the first assembly code 428, the classical execution hardware 432 of the first remote hardware system 430 (a quantum processing unit) may spin up a process which is referred to herein as the first code executor 434”) and to a remote quantum computing system to enable execution of processes on the remote quantum computing system (Cao (¶0042 line 1-9), “For example, if the first code executor 434 determines that a sequence of instructions is marked as "quantum" ( e.g. a sequence of instructions defining a quantum circuit), then the first code executor 434 may provide the sequence of instructions to a first quantum transpiler 438 (a remote quantum computing system) (which may be another process running on the same CPU 452, or a process running on a different CPU on the first remote hardware system 430).”). As Claim 2, besides Claim 1, Cao teaches in which the quantum processing unit comprises: a central processing unit (CPU) interface coupled to the classical processing unit (Cao (¶0039 last 3 lines), “The local computer 402 may provide (e.g., transmit over a network) the first assembly code 428 to the first remote computing device 430”); at least one memory coupled to the CPU interface (Cao (¶0039 last 3 lines), “The local computer 402 may provide (e.g., transmit over a network) the first assembly code 428 (memory) to the first remote computing device 430”); and a quantum processing unit core coupled to the CPU interface, the at least one memory, and the remote quantum computing system (Cao (¶0042 line 1-9), “For example, if the first code executor 434 determines that a sequence of instructions is marked as "quantum" ( e.g. a sequence of instructions defining a quantum circuit), then the first code executor 434 may provide the sequence of instructions (memory) to a first quantum transpiler 438 (a remote quantum computing system) (which may be another process running on the same CPU 452, or a process running on a different CPU on the first remote hardware system 430).”). As Claim 3, besides Claim 2, Cao teaches in which the quantum processing unit core is configured to select a task for execution by the remote quantum computing system in response to receiving a query from the classical processing unit via the CPU interface (Cao (¶0042 last 3 lines), “For example, the first result may be a single bit indicating True or False so that the first code executor 434 may decide which conditional branch to enter next”). As Claim 5, besides Claim 3, Cao teaches in which the query from the classical processing unit comprises requesting beamforming weights and the task for execution by the remote quantum computing system comprises singular value decomposition (Cao (¶0062 line 8-10, fig. 2B), “quantum-mechanical superposition of all possible states (candidate states) with equal weights, based on the initial Hamiltonian 260”). As Claim 6, besides Claim 1, Cao teaches in which the quantum processing unit is configured to encode a query from the classical processing unit by preparing a superposition state of qubits, the superposition state comprising weights calculated by the quantum processing unit (Cao (¶0062 line 8-10, fig. 2B), “quantum-mechanical superposition of all possible states (candidate states) with equal weights, based on the initial Hamiltonian 260”). As Claim 7, besides Claim 6, Cao teaches in which the quantum processing unit is configured to receive, from the remote quantum computing system, at least one of Fourier transform results or linear system equation results based on the superposition state (Cao (¶0062 line 8-10, fig. 2B), “quantum-mechanical superposition of all possible states (candidate states) with equal weights, based on the initial Hamiltonian 260”). As Claim 11, besides Claim 1, Cao teaches in which the quantum processing unit is accessible from a software development kit (SDK) (Cao (¶0004), “programming languages and interfaces (such as pyquil, qiskit, cirq, and Q#)”). As Claim 13, 15-17, the Claims is rejected for the same reasons as Claim 1, 5-7, respectively. As Claim 20, besides Claim 13, Cao teaches further comprising: processing any specific argument passing specifications for the selected remote quantum computing system, the specifications including application programming interfaces (APls) exported by the remote quantum computing system for interface with the remote quantum computing system (Cao (¶0004), “programming languages and interfaces (such as pyquil, qiskit, cirq, and Q#)”); defining execution of processes on the remote quantum computing system; and driving the execution of processes on the remote quantum computing system (Cao (¶0033 line 1-6), “The compiler front-end 408 may also include a syntax/semantic analyzer (parser), which may generate a syntax tree, in which tree nodes corresponding to quantum instructions may be marked as "quantum," such as by carrying forward any "classical" and/or "quantum" labels from the tokens from which the syntax tree was generated”). As Claims 22, 24-26 and 29, the Claims are rejected for the same reasons as Claim 13, 15-17 and 20, respectively. As Claim 30, the Claim is rejected for the same reasons as Claim 1. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4, 9-10, 14, 19, 23 and 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cao in view of Limberg et al. (U.S. 2021/0097419 hereinafter Limberg). As Claim 4, besides Claim 3, Cao may not explicitly disclose in which the quantum processing unit core is configured to select the task for execution by the remote quantum computing system based at least in part on a latency associated with communicating with the remote quantum computing system, and a level of computation performed by the remote quantum computing system to complete the task. Limberg teaches: in which the quantum processing unit core is configured to select the task for execution by the remote quantum computing system (Limberg (¶0059 line 1-6), “can select at least one quantum platform comprising such quantum hardware and/or quantum software that can execute one or more components of a quantum application based on one or more defined run criteria of the one or more components and/or the at least one quantum platform.”) based at least in part on a latency associated with communicating with the remote quantum computing system (Limberg (¶0059), “quantum platform queue times ( e.g., relatively short or long amount of time before execution of a quantum job can begin);”), and a level of computation performed by the remote quantum computing system to complete the task (Limberg (¶0059), “quantum platform cost (e.g., computational cost-some quantum platforms can cost more or less to run certain transactions”). Cao discloses a system/method for executing a quantum computer via classic computer interface. Limberg disclose a system/method for selecting remote quantum system(s) for execution. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify remote quantum system of Cao instead be a remote quantum system(s) taught by Limberg, with a reasonable expectation of success. The motivation would be to “enable routing of one or more components ( e.g., discrete element(s) and/or component(s)) of a quantum application and/or calculation to one or more quantum platforms comprising quantum hardware and/or quantum software best suited and/or most applicable to execute each component(s) based on one or more certain run criteria ( e.g., defined run criterion or criteria)” (Limberg (¶0020 last 7 lines)). As Claim 9, besides Claim 1, Cao may not explicitly disclose in which the quantum processing unit is configured to select the remote quantum computing system from a plurality of remote quantum computing systems based at least in part on a fidelity and a number of qubits of the remote quantum computing system and a query received from the classical processing unit. Limberg teaches: in which the quantum processing unit is configured to select the remote quantum computing system from a plurality of remote quantum computing systems based at least in part on a fidelity (Limberg (¶0059), “fidelity of quantum hardware of a quantum platform ( e.g., fidelity of one or more qubits of a quantum device)”) and a number of qubits of the remote quantum computing system (Limberg (¶0059), “number of qubits on each quantum platform and how they are interconnected”) and a query received from the classical processing unit (Limberg (¶0059 line 6-11), “determina tion component 110 can select at least one quantum platform comprising such quantum hardware and/or quantum software that can execute one or more components of a quantum application based on one or more defined run criteria including,”). Cao discloses a system/method for executing a quantum computer via classic computer interface. Limberg disclose a system/method for selecting remote quantum system(s) for execution. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify remote quantum system of Cao instead be a remote quantum system(s) taught by Limberg, with a reasonable expectation of success. The motivation would be to “enable routing of one or more components ( e.g., discrete element(s) and/or component(s)) of a quantum application and/or calculation to one or more quantum platforms comprising quantum hardware and/or quantum software best suited and/or most applicable to execute each component(s) based on one or more certain run criteria ( e.g., defined run criterion or criteria)” (Limberg (¶0020 last 7 lines)). As Claim 10, besides Claim 9, Cao in view of Limberg teaches in which the quantum processing unit is configured: to process any specific argument passing specifications for the selected remote quantum computing system, the specifications including application programming interfaces (APls) exported by the remote quantum computing system for interface with the remote quantum computing system (Cao (¶0004), “programming languages and interfaces (such as pyquil, qiskit, cirq, and Q#)”); to define the execution of processes on the remote quantum computing system (Cao (¶0033 line 1-6), “The compiler front-end 408 may also include a syntax/semantic analyzer (parser), which may generate a syntax tree, in which tree nodes corresponding to quantum instructions may be marked as "quantum," such as by carrying forward any "classical" and/or "quantum" labels from the tokens from which the syntax tree was generated”); and to drive the execution of processes on the remote quantum computing system (Cao (¶0041 last 7 lines), “For example, in general, the first code executor 434 may provide instructions in the assembly code 428 marked as "quantum" to the quantum execution hardware 436 for execution, and may provide instructions marked as "classical" (or not marked as "quantum") to the first classical execution hardware 432 ( e.g., first CPU) for execution.”). As Claim 14, the Claim is rejected for the same reasons as Claim 4. As Claim 19, the Claim is rejected for the same reasons as Claim 9. As Claim 23, the Claim is rejected for the same reasons as Claim 4. As Claim 28, the Claim is rejected for the same reasons as Claim 9. Claim(s) 8, 18 and 27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cao in view of Munoz-Coreas et al. ("Quantum Circuit Design of T-count Optimized Integer Multiplier" hereinafter Munoz-Coreas). As Claim 8, besides Claim 1, Cao does not explicitly disclose: in which the quantum processing unit is configured to map a classical oracle to a quantum oracle by converting classical gates to reversible classical gates; converting the reversible classical gates to quantum gates; and erasing garbage gates using a controlled NOT (CNOT) gate. Munoz-Coreas teaches: in which the quantum processing unit is configured to map a classical oracle to a quantum oracle by converting classical gates to reversible classical gates (Munoz-Coreas (2.5 Methodology to Remove Garbage Outputs from Quantum Integer Multiplication Circuit Designs, Step 2), “At locations |Pi> and |Yi> apply a CNOT gate such that the location \> is unchanged while location |Yi> is transformed to the value in location |Pi>”)); converting the reversible classical gates to quantum gates (Munoz-Coreas (2.5 Methodology to Remove Garbage Outputs from Quantum Integer Multiplication Circuit Designs, fig. 3), “Generation of the garbageless quantum multiplication circuit: Steps 1-3.”)); and erasing garbage gates using a controlled NOT (CNOT) gate (Munoz-Coreas (2.5 Methodology to Remove Garbage Outputs from Quantum Integer Multiplication Circuit Designs, fig. 3), “Generation of the garbageless quantum multiplication circuit: Steps 1-3.”)). Cao discloses a system/method for executing a quantum computer via classic computer interface. Munoz-Coreas discloses a system/method for eliminate garbage output. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify remote quantum system of Cao instead be a garbage output removal operation by Munoz-Coreas, with a reasonable expectation of success. The motivation would be to minimize circuit overhead in a quantum system (Munoz-Coreas (1. Introduction, last 2 lines of second paragraph)). As Claim 18, the Claim is rejected for the same reasons as Claim 8. As Claim 24, the Claim is rejected for the same reasons as Claim 8. Claim(s) 12 and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cao in view of Radin et al. (U.S. 2022/0284337 hereinafter Radin). As Claim 12, besides Claim 1, Cao may not explicitly disclose in which the quantum processing unit is configured: to optimize a cost function that is converted to a VQE (Variational Quantum Eigen-solver) optimization; to receive an evaluation of the cost function from the remote quantum computing system; to execute a classical step of the VQE, including a gradient descent process based on the evaluation; and the executing the classical step and the receiving the evaluation iteratively occurring in order to converge to a solution of the VQE optimization. Radin teaches: in which the quantum processing unit is configured: to optimize a cost function that is converted to a VQE (Variational Quantum Eigen-solver) optimization (Radin (¶0039 last 6 lines), “minimize the cost function in each iteration until a predetermined convergence value is reached. Using the disclosed technology, the number of iterations is dramatically reduced from conventional VQE methods,”); to receive an evaluation of the cost function from the remote quantum computing system (Radin (¶0039 line 4-6, fig. 5 step 510), “In step 510, on the quantum computer, a quantum circuit is prepared corresponding to the parameterized additional initial trial state of step 500”); to execute a classical step of the VQE, including a gradient descent process based on the evaluation (Radin (¶0037 last 3 lines), “The optimization is carried out by a classical optimizer which leverages a quantum computer to evaluate the cost function and calculate its gradient at each optimization step”); and the executing the classical step and the receiving the evaluation iteratively occurring in order to converge to a solution of the VQE optimization (Radin (¶0037 last 3 lines), “The optimization is carried out by a classical optimizer which leverages a quantum computer to evaluate the cost function and calculate its gradient at each optimization step”). Cao discloses a system/method for executing a quantum computer via classic computer interface. Radin discloses a system/method for VQE optimization. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify remote quantum system of Cao instead be VQE optimization by Munoz-Coreas, with a reasonable expectation of success. The motivation would be to “for providing solutions in quantum chemistry using near-term quantum computers” (Radin (¶0034 line 2-3)). As Claim 21, the Claim is rejected for the same reasons as Claim 12. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Gambetta et al. (U.S. 2021/0334079) disclose system/method for adaptive execution for quantum circuits. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NHAT HUY T NGUYEN whose telephone number is (571)270-7333. The examiner can normally be reached M-F: 12:00-8:00 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Viker Lamardo can be reached at 571-270-5871. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NHAT HUY T NGUYEN/Primary Examiner, Art Unit 2147
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Prosecution Timeline

Oct 20, 2023
Application Filed
Jun 29, 2026
Non-Final Rejection mailed — §101, §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
54%
Grant Probability
77%
With Interview (+23.3%)
3y 6m (~9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 356 resolved cases by this examiner. Grant probability derived from career allowance rate.

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