DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claim 1-2, 5, and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hwang et al. (US publication 2015/0207038 A1), hereinafter referred to as Hwang038.
Regarding claim 1, Hwang038 teaches a vertical-type light-emitting diode (fig. 4a-4b and related text), comprising: a semiconductor stack layer (130/150, [0071-0074]) having an upper surface (top surface of 150) and a lower surface (bottom surface of 130) opposite to each other, wherein the semiconductor stack layer comprises a first semiconductor layer (130/152, [0071-0074]), a light-emitting layer (154, [0071-0074]) and a second semiconductor layer (156, [0071-0074]) stacked in sequence along a direction from the lower surface to the upper surface (fig. 4a-4b); a first electrode (184B/184C, [0119]) located at the lower surface of the semiconductor stack layer and connected to the first semiconductor layer (fig. 4a-4b); a second electrode (160, [0086-0087]) located at the upper surface of the semiconductor stack layer and connected to the second semiconductor layer (fig. 4a-4b); a protruding protective electrode (182, [0091]) connected to the second electrode; wherein an upper surface of the protruding protective electrode is higher than an upper surface of the second electrode (fig. 4a-4b).
Regarding claim 2, Hwang038 teaches wherein a first distance from the upper surface of the protruding protective electrode to the upper surface of the semiconductor stack layer is greater than a second distance from the upper surface of the second electrode to the upper surface of the semiconductor stack layer (fig. 4a-4b).
Regarding claim 5, Hwang038 teaches wherein a material of the protruding protective electrode comprises at least one selected from a group consisting of Au, Pt, Ti, Ni, Ge, Be, Zn, Al, and Cr ([0099]).
Regarding claim 11, Hwang038 teaches a light-emitting device, which adopts the vertical-type light-emitting diode according to claim 1 (fig. 4a-4b).
Claim 1, 6-7, and 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cha et al. (US publication 2013/0112944 A1), hereinafter referred to as Cha944.
Regarding claim 1, Cha944 teaches a vertical-type light-emitting diode (fig. 6 and related text), comprising: a semiconductor stack layer (15/26, [0033-0039]) having an upper surface (top surface of 26) and a lower surface (bottom surface of 15) opposite to each other, wherein the semiconductor stack layer comprises a first semiconductor layer (15/20, [0033-0039]), a light-emitting layer (23, [0033-0039]) and a second semiconductor layer (25, [0033-0039]) stacked in sequence along a direction from the lower surface to the upper surface (fig. 6); a first electrode (60, [0045]) located at the lower surface of the semiconductor stack layer and connected to the first semiconductor layer (fig. 6); a second electrode (30/35/40, [0040-0042]) located at the upper surface of the semiconductor stack layer and connected to the second semiconductor layer (fig. 6); a protruding protective electrode (65, [0045]) connected to the second electrode; wherein an upper surface of the protruding protective electrode is higher than an upper surface of the second electrode (fig. 6).
Regarding claim 6, Cha944 teaches wherein the second electrode comprises a pad electrode (30) and a finger electrode (35), and the pad electrode is connected to the finger electrode (fig. 6).
Regarding claim 7, Cha944 teaches wherein the protruding protective electrode has a first width, the pad electrode has a second width, and the first width is less than the second width (fig. 6).
Regarding claim 9, Cha944 teaches wherein the upper surface of the semiconductor stack layer has a groove, and the pad electrode is disposed within the groove (fig. 6).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 3 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Hwang038, as applied to claim 1 or 2 above.
Regarding claim 3, Hwang038 discloses all the limitations of claim 2 as discussed above on which this claim depends.
Hwang038 does not explicitly teach wherein the first distance is at least 1000 angstroms greater than the second distance. However, Hwang038 teaches the first distance is greater than the second distance and these values depend on the thickness of the protruding protective electrode and the second electrode and it is well-known in the art that a width/thickness of a semiconducting or insulation or conductive layer depends on a process technology, overall size of the device, and is a result-effective variable as electrical properties (conductivity, current, resistance, doping, insulation, withstanding breakdown, etc.) depend on the width/thickness of a semiconducting or insulation or conductive layer. So, a width/thickness of a semiconducting or insulation or conductive layer is a parameter that one must consider and decide upon and is something that can be optimized through routine experimentation.
Furthermore, it has been held where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. (MPEP §2144.05 II/III).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the teachings of Hwang038 so that wherein the first distance is at least 1000 angstroms greater than the second distance for the purpose of optimizing device performance and overall size of the device.
Regarding claim 4, Hwang038 discloses all the limitations of claim 1 as discussed above on which this claim depends.
Hwang038 does not explicitly teach wherein the protruding protective electrode has a height ranging from 1000 angstroms to 5 microns. However, it is well-known in the art that a width/thickness of a semiconducting or insulation or conductive layer depends on a process technology, overall size of the device, and is a result-effective variable as electrical properties (conductivity, current, resistance, doping, insulation, withstanding breakdown, etc.) depend on the width/thickness of a semiconducting or insulation or conductive layer. So, a width/thickness of a semiconducting or insulation or conductive layer is a parameter that one must consider and decide upon and is something that can be optimized through routine experimentation.
Furthermore, it has been held where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. (MPEP §2144.05 II/III).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the teachings of Hwang038 so that wherein the protruding protective electrode has a height ranging from 1000 angstroms to 5 microns for the purpose of optimizing device performance and overall size of the device.
Claim 8 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Cha944, as applied to claim 1 or 6 or 7 or 9 above.
Regarding claim 8, Cha944 discloses all the limitations of claim 7 as discussed above on which this claim depends.
Cha944 does not explicitly teach wherein the second width is at least 85% wider than the first width. However, Cha944 teaches wherein the second width is wider than the first width and these values depend on the thickness/width of the protruding protective electrode and the pad electrode and it is well-known in the art that a width/thickness of a semiconducting or insulation or conductive layer depends on a process technology, overall size of the device, and is a result-effective variable as electrical properties (conductivity, current, resistance, doping, insulation, withstanding breakdown, etc.) depend on the width/thickness of a semiconducting or insulation or conductive layer. So, a width/thickness of a semiconducting or insulation or conductive layer is a parameter that one must consider and decide upon and is something that can be optimized through routine experimentation.
Furthermore, it has been held where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. (MPEP §2144.05 II/III).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the teachings of Cha944 so that wherein the second width is at least 85% wider than the first width for the purpose of optimizing device performance and overall size of the device.
Regarding claim 10, Cha944 discloses all the limitations of claim 9 as discussed above on which this claim depends.
Cha944 does not explicitly teach wherein a depth of the groove ranges from 1000 angstroms to 5 microns. However, Cha944 teaches a depth of the groove depends on the height of the light emitting nanorods (26, fig. 6) and it is well-known in the art that a width/thickness of a semiconducting or insulation or conductive layer depends on a process technology, overall size of the device, and is a result-effective variable as electrical properties (conductivity, current, resistance, doping, insulation, withstanding breakdown, etc.) depend on the width/thickness of a semiconducting or insulation or conductive layer. So, a width/thickness of a semiconducting or insulation or conductive layer is a parameter that one must consider and decide upon and is something that can be optimized through routine experimentation and by doing so a depth of the groove will be determined and optimized.
Furthermore, it has been held where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. (MPEP §2144.05 II/III).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the teachings of Cha944 so that wherein a depth of the groove ranges from 1000 angstroms to 5 microns for the purpose of optimizing device performance and overall size of the device.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mohammed R Alam whose telephone number is 469-295-9205 and can normally be reached between 8:00am-6:00pm (M-F) or by e-mail via Mohammed.Alam1@uspto.gov.
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/MOHAMMED R ALAM/Primary Examiner, Art Unit 2897