DETAILED ACTION
Claims 1, 3-10 and 12-19 are pending in this application.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 10/21/25 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3, 10, 12 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Muthiah et al. (U.S. PGPub No. 2021/0081316) in view of Bhat et al. (U.S. PGPub No. 2021/0132817) in view of Fai et al. (U.S. PGPub No. 2012/0224425).
Claim 1
Muthiah (2021/0081316) teaches:
An apparatus, comprising: a controller associated with a memory device, wherein the controller is configured to cause the apparatus to: FIG. 1A and P. 0035 Controller 102 and NVM die 104
receive a write command to write data to a memory system; P. 0051 A host can send the storage system 100 a write command, along with a hint
write the data to a first set of memory cells of the memory system using a first write operation based at least in part on receiving the write command, wherein the first set of memory cells store three or fewer bits of information in a single memory cell, […] P. 0038 memory cells of the non-volatile memory die 104 may be SLC, MLC or TLC
identify whether to transfer the data to a second set of memory cells that store more bits of information in a single memory cell than the first set of memory cells based at least in part on one or more parameters associated with the data, […] P. 0055 hints provided from the host are tagged to the data; P. 0051 the storage system 100 can use the hint to pick the best available memory location to write the data; P. 0060 if the original hint suggested that the data is temporary, the storage system 100 may have moved the data to a single-level cell (SLC)
transfer the data to the second set of memory cells of the memory system using a second write operation based at least in part on identifying that the data is to be transferred, P. 0057 controller 102 can use the hint associated with the data to assist in the garbage collection [second write]; P. 0037 non-volatile memory controller can also perform garbage collection when a block is full; P. 0060 the new hint for data evaluated for garbage collection can suggest that the data be moved to a multi-level cell (MLC)
Muthiah does not explicitly teach transferring data to the second set of memory cells based on a temperature satisfying a threshold.
Bhat (2021/0132817) teaches:
write the data to a first set of memory cells of the memory system using a first write operation based at least in part on receiving the write command, wherein the first set of memory cells store three or fewer bits of information in a single memory cell, and wherein the first set of memory cells are at a temperature during a first write operation; […] P. 0056 controller 502 may communicate with one or more temperature sensors 520, 522 to determine the temperature of the cells 504, 508
identify whether to transfer the data to a second set of memory cells that store more bits of information in a single memory cell than the first set of memory cells based at least in part on one or more parameters associated with the data, the one or more parameters associated with the data comprising the temperature; and […] P. 0052 controller 123 may transfer data from SLC cells 116 to QLC cells 117 at different transfer rates depending on the temperature of the cells 117; P. 0053 disable transferring the data when the temperature reaches a maximum write temperature
wherein transferring the data to the second set of memory cells of the memory system is based at least in part on the temperature of the data exceeding a temperature threshold. P. 0052 controller 123 may transfer data from SLC cells 116 to QLC cells 117 at different transfer rates depending on the temperature of the cells 117; P. 0053 disable transferring the data when the temperature reaches a maximum write temperature
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with transferring data to the second set of memory cells based on a temperature satisfying a threshold taught by Bhat.
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with transferring data to the second set of memory cells based on a temperature satisfying a threshold taught by Bhat.
The motivation being to preserve data integrity (See Bhat P. 0022)
The systems of Muthiah and Bhat do not explicitly teach writing the temperature to memory.
Fai (2012/0224425) teaches:
write the temperature to the memory system; P. 0034 The NVM 112 can store metadata 126 including temperature information 128 that indicates a temperature of one or more memory cells (e.g., a block of memory cells) at the time the memory cells were programmed
identify whether to transfer the data to a second set of memory cells that store more bits of information in a single memory cell than the first set of memory cells based at least in part on one or more parameters associated with the data, the one or more parameters associated with the data comprising the temperature; and P. 0052 and FIGs. 3A-B temperature information can be used to determine whether to switch memory cells between SLC mode and MLC mode
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah and Bhat with writing the temperature to memory taught by Fai.
The motivation being to in order to increase the integrity of data stored in the NVM (see Fai P. 0010)
The systems of Muthiah, Bhat and Fai are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Bhat to obtain the invention as recited in claims 1-9.
Claim 2
Muthiah does not explicitly teach transferring data to the second set of memory cells based on a temperature satisfying a threshold.
Bhat (2021/0132817) teaches:
The motivation being to preserve data integrity (See Bhat P. 0022)
The systems of Muthiah and Bhat are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Bhat to obtain the invention as recited in claim 2.
Claim 3
Muthiah (2021/0081316) teaches:
The apparatus of claim 1, wherein the controller is further configured to cause the apparatus to: receive, as part of the write command, a flag indicating that the data is a first type, the one or more parameters associated with the data comprising the flag, P. 0021 the hint characterizes the data by indicating one or more of the following: whether or not the data will be updated frequently, a file type for the data; P. 0018 the hint is received from the host
wherein transferring the data to the second set of memory cells of the memory system is based at least in part on receiving the flag indicating that the data is the first type. P. 0023 the hint is used in performing garbage collection to determine whether to move the data to a single-level cell or a multi-level cell
Claim 10
Muthiah (2021/0081316) teaches:
A non-transitory computer-readable medium storing code, the code comprising instructions executable by a processor to: P. 0043 a module may take the form of a portion of a program code executable by a processor
receive a write command to write data to a memory system; FIG. 1A and P. 0035 Controller 102 and NVM die 104; P. 0051 A host can send the storage system 100 a write command, along with a hint
write the data to a first set of memory cells of the memory system using a first write operation based at least in part on receiving the write command, wherein the first set of memory cells store three or fewer bits of information in a single memory cell, […] P. 0038 memory cells of the non-volatile memory die 104 may be SLC, MLC or TLC
[…] identify whether to transfer the data to a second set of memory cells that store more bits of information in a single memory cell than the first set of memory cells based at least in part on one or more parameters associated with the data, […] P. 0055 hints provided from the host are tagged to the data; P. 0051 the storage system 100 can use the hint to pick the best available memory location to write the data; P. 0060 if the original hint suggested that the data is temporary, the storage system 100 may have moved the data to a single-level cell (SLC)
transfer the data to the second set of memory cells of the memory system using a second write operation based at least in part on identifying that the data is to be transferred. P. 0057 controller 102 can use the hint associated with the data to assist in the garbage collection [second write]; P. 0037 non-volatile memory controller can also perform garbage collection when a block is full; P. 0060 the new hint for data evaluated for garbage collection can suggest that the data be moved to a multi-level cell (MLC)
Muthiah does not explicitly teach transferring data to the second set of memory cells based on a temperature satisfying a threshold.
Bhat (2021/0132817) teaches:
write the data to a first set of memory cells of the memory system using a first write operation based at least in part on receiving the write command, wherein the first set of memory cells store three or fewer bits of information in a single memory cell, and wherein the first set of memory cells are at a temperature during the first write operation; […] P. 0056 controller 502 may communicate with one or more temperature sensors 520, 522 to determine the temperature of the cells 504, 508
[…] identify whether to transfer the data to a second set of memory cells that store more bits of information in a single memory cell than the first set of memory cells based at least in part on one or more parameters associated with the data, the one or more parameters associated with the data comprising the temperature; P. 0052 controller 123 may transfer data from SLC cells 116 to QLC cells 117 at different transfer rates depending on the temperature of the cells 117; P. 0053 disable transferring the data when the temperature reaches a maximum write temperature
wherein transferring the data to the second set of memory cells of the memory system is based at least in part on the temperature of the data exceeding a temperature threshold. P. 0052 controller 123 may transfer data from SLC cells 116 to QLC cells 117 at different transfer rates depending on the temperature of the cells 117; P. 0053 disable transferring the data when the temperature reaches a maximum write temperature
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with transferring data to the second set of memory cells based on a temperature satisfying a threshold taught by Bhat.
The motivation being to preserve data integrity (See Bhat P. 0022)
The systems of Muthiah and Bhat do not explicitly teach writing the temperature to memory.
Fai (2012/0224425) teaches:
[…] write the temperature to the memory system; P. 0034 The NVM 112 can store metadata 126 including temperature information 128 that indicates a temperature of one or more memory cells (e.g., a block of memory cells) at the time the memory cells were programmed
identify whether to transfer the data to a second set of memory cells that store more bits of information in a single memory cell than the first set of memory cells based at least in part on one or more parameters associated with the data, the one or more parameters associated with the data comprising the temperature; P. 0052 and FIGs. 3A-B temperature information can be used to determine whether to switch memory cells between SLC mode and MLC mode
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah and Bhat with writing the temperature to memory taught by Fai.
The motivation being to in order to increase the integrity of data stored in the NVM (see Fai P. 0010)
The systems of Muthiah, Bhat and Fai are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Bhat to obtain the invention as recited in claims 10-18.
Claim 12
Muthiah (2021/0081316) teaches:
The non-transitory computer-readable medium of claim 10, wherein the instructions are further executable by the processor to: receive, as part of the write command, a flag indicating that the data is a first type, the one or more parameters associated with the data comprising the flag, P. 0021 the hint characterizes the data by indicating one or more of the following: whether or not the data will be updated frequently, a file type for the data; P. 0018 the hint is received from the host
wherein transferring the data to the second set of memory cells of the memory system is based at least in part on receiving the flag indicating that the data is the first type. P. 0023 the hint is used in performing garbage collection to determine whether to move the data to a single-level cell or a multi-level cell
Claim 19
Muthiah (2021/0081316) teaches:
A method, comprising: receiving a write command to write data to a memory system; P. 0051 A host can send the storage system 100 a write command, along with a hint
writing the data to a first set of memory cells of the memory system using a first write operation based at least in part on receiving the write command, wherein the first set of memory cells store three or fewer bits of information in a single memory cell […] P. 0038 memory cells of the non-volatile memory die 104 may be SLC, MLC or TLC
identifying whether to transfer the data to a second set of memory cells that store more bits of information in a single memory cell than the first set of memory cells based at least in part on one or more parameters associated with the data […] P. 0055 hints provided from the host are tagged to the data; P. 0051 the storage system 100 can use the hint to pick the best available memory location to write the data; P. 0060 if the original hint suggested that the data is temporary, the storage system 100 may have moved the data to a single-level cell (SLC)
transferring the data to the second set of memory cells of the memory system using a second write operation based at least in part on identifying that the data is to be transferred. P. 0057 controller 102 can use the hint associated with the data to assist in the garbage collection [second write]; P. 0037 non-volatile memory controller can also perform garbage collection when a block is full; P. 0060 the new hint for data evaluated for garbage collection can suggest that the data be moved to a multi-level cell (MLC)
Muthiah does not explicitly teach transferring data to the second set of memory cells based on a temperature satisfying a threshold.
Bhat (2021/0132817) teaches:
writing the data to a first set of memory cells of the memory system using a first write operation based at least in part on receiving the write command, wherein the first set of memory cells store three or fewer bits of information in a single memory cell, and wherein the first set of memory cells are at a temperature during the first write operation; […] P. 0056 controller 502 may communicate with one or more temperature sensors 520, 522 to determine the temperature of the cells 504, 508
[…] identifying whether to transfer the data to a second set of memory cells that store more bits of information in a single memory cell than the first set of memory cells based at least in part on one or more parameters associated with the data, the one or more parameters associated with the data comprising the temperature; and […] P. 0052 controller 123 may transfer data from SLC cells 116 to QLC cells 117 at different transfer rates depending on the temperature of the cells 117; P. 0053 disable transferring the data when the temperature reaches a maximum write temperature
wherein transferring the data to the second set of memory cells of the memory system is based at least in part on the temperature of the data exceeding a temperature threshold. P. 0052 controller 123 may transfer data from SLC cells 116 to QLC cells 117 at different transfer rates depending on the temperature of the cells 117; P. 0053 disable transferring the data when the temperature reaches a maximum write temperature
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with transferring data to the second set of memory cells based on a temperature satisfying a threshold taught by Bhat.
The motivation being to preserve data integrity (See Bhat P. 0022)
The systems of Muthiah and Bhat do not explicitly teach writing the temperature to memory.
Fai (2012/0224425) teaches:
[…] writing the temperature to the memory system; P. 0034 The NVM 112 can store metadata 126 including temperature information 128 that indicates a temperature of one or more memory cells (e.g., a block of memory cells) at the time the memory cells were programmed
identifying whether to transfer the data to a second set of memory cells that store more bits of information in a single memory cell than the first set of memory cells based at least in part on one or more parameters associated with the data, the one or more parameters associated with the data comprising the temperature; and P. 0052 and FIGs. 3A-B temperature information can be used to determine whether to switch memory cells between SLC mode and MLC mode
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah and Bhat with writing the temperature to memory taught by Fai.
The motivation being to in order to increase the integrity of data stored in the NVM (see Fai P. 0010)
The systems of Muthiah, Bhat and Fai are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah and Bhat with Fai to obtain the invention as recited in claims 19-20.
Claim(s) 4, 7, 13 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Muthiah et al. (U.S. PGPub No. 2021/0081316) in view of Bhat et al. (U.S. PGPub No. 2021/0132817) in view of Fai (2012/0224425) in view of Martin et al. (U.S. Patent No. 10809931).
Claim 4
Muthiah does not explicitly teach parameters of the data being associated with a first type and region of memory.
Martin (10809931) teaches:
The apparatus of claim 1, wherein the controller is further configured to cause the apparatus to: identify that the data is associated with a first region of the memory system, Col. 89 lines 9-37 PDs are flash-based physical storage devices, such as MLCs and SLCs; Col. 62 line 30-39 Each IO type has a preferred media type (e.g. SLC, MLC) for storing its data
wherein the first region of the memory system stores a first type of data and Col. 62 line 30-39 Each IO type has a preferred media type (e.g. SLC, MLC) for storing its data the one or more parameters associated with the data comprises an indication of the first region, Col. 46 line 32 – Col. 47 line 13 each record of the transaction log may include a Row Type. Row types may include: 4. IO Type—This field may denote the I/O type used
wherein transferring the data to the second set of memory cells of the memory system is based at least in part on writing the data to the first region associated with the first type of data. FIG. 39 and Col. 78 line 52 – Col. 79 line 15 chunks of an extent stored in a storage tier that does not have the preferred media type are determined, for each of the chunks identified, relocate the chunk to a storage tier having the preferred media type
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with parameters of the data being associated with a first type and region of memory taught by Martin.
The motivation being to select data portions for movement to PDs that provide the best performance (see Martin Col. 58 line 48 – Col. 59 line 9)
The systems of Muthiah and Martin are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Martin to obtain the invention as recited in claim 4.
Claim 7
Muthiah does not explicitly teach an indication of a quantity threshold for a type of data, and identifying that a quantity of data of a particular type has exceeded a threshold.
Martin (10809931) teaches:
The apparatus of claim 1, wherein the controller is further configured to cause the apparatus to: receive an indication of a data storage configuration of the memory system, wherein the data storage configuration indicates a data quantity threshold for storing a second type of data to the memory system, the one or more parameters associated with the data comprising the data storage configuration; and Col. 89 lines 9-37 PDs are flash-based physical storage devices, such as MLCs and SLCs; Col. 88 line 46-65 all PDs of the different flash media types have a capacity threshold; Col. 62 line 30-39 Each IO type has a preferred media type (e.g. SLC, MLC) for storing its data
identify that a quantity of data stored to the memory system is of the second type and Col. 46 line 32 – Col. 47 line 13 each record of the transaction log may include a Row Type. Row types may include: 4. IO Type—This field may denote the I/O type used
that the quantity of data stored satisfies the data quantity threshold, Col. 89 lines 9-37 the used capacity of each PD should not exceed 95% of the flash PD's total storage capacity. If so, a capacity violation may be determined
wherein transferring the data to the second set of memory cells of the memory system is based at least in part on identifying that the data quantity threshold is satisfied. Col. 90 lines 47-55 candidate extents from the source flash PD having the capacity violation are moved to a target flash PD, until the source flash PD no longer has a capacity violation; Col. 86 line 54 – Col. 87 line 10 an underutilized flash PD that is either MLC or SLC media types is selected as a target device; Col. 62 line 30-39 Each IO type has a preferred media type (e.g. SLC, MLC) for storing its data; Col. 62 lines 40-50 I/O types may be ranked first based on the G and D rating, G being ranked higher than D
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with an indication of a quantity threshold for a type of data, and identifying that a quantity of data of a particular type has exceeded a threshold taught by Martin.
The motivation being to select data portions for movement to PDs that provide the best performance (see Martin Col. 58 line 48 – Col. 59 line 9)
The systems of Muthiah and Martin are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Martin to obtain the invention as recited in claim 7.
Claim 13
Muthiah does not explicitly teach parameters of the data being associated with a first type and region of memory.
Martin (10809931) teaches:
The non-transitory computer-readable medium of claim 10, wherein the instructions are further executable by the processor to: identify that the data is associated with a first region of the memory system, Col. 89 lines 9-37 PDs are flash-based physical storage devices, such as MLCs and SLCs; Col. 62 line 30-39 Each IO type has a preferred media type (e.g. SLC, MLC) for storing its data
wherein the first region of the memory system stores a first type of data Col. 62 line 30-39 Each IO type has a preferred media type (e.g. SLC, MLC) for storing its data and the one or more parameters associated with the data comprises an indication of the first region, Col. 46 line 32 – Col. 47 line 13 each record of the transaction log may include a Row Type. Row types may include: 4. IO Type—This field may denote the I/O type used
wherein transferring the data to the second set of memory cells of the memory system is based at least in part on writing the data to the first region associated with the first type of data. FIG. 39 and Col. 78 line 52 – Col. 79 line 15 chunks of an extent stored in a storage tier that does not have the preferred media type are determined, for each of the chunks identified, relocate the chunk to a storage tier having the preferred media type
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with parameters of the data being associated with a first type and region of memory taught by Martin.
The motivation being to select data portions for movement to PDs that provide the best performance (see Martin Col. 58 line 48 – Col. 59 line 9)
The systems of Muthiah and Martin are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Martin to obtain the invention as recited in claim 13.
Claim 16
Muthiah does not explicitly teach an indication of a quantity threshold for a type of data, and identifying that a quantity of data of a particular type has exceeded a threshold.
Martin (10809931) teaches:
The non-transitory computer-readable medium of claim 10, wherein the instructions are further executable by the processor to: receive an indication of a data storage configuration of the memory system, wherein the data storage configuration indicates a data quantity threshold for storing a second type of data to the memory system, the one or more parameters associated with the data comprising the data storage configuration; and Col. 89 lines 9-37 PDs are flash-based physical storage devices, such as MLCs and SLCs; Col. 88 line 46-65 all PDs of the different flash media types have a capacity threshold; Col. 62 line 30-39 Each IO type has a preferred media type (e.g. SLC, MLC) for storing its data
identify that a quantity of data stored to the memory system is of the second type and Col. 46 line 32 – Col. 47 line 13 each record of the transaction log may include a Row Type. Row types may include: 4. IO Type—This field may denote the I/O type used
that the quantity of data stored satisfies the data quantity threshold, Col. 89 lines 9-37 the used capacity of each PD should not exceed 95% of the flash PD's total storage capacity. If so, a capacity violation may be determined
wherein transferring the data to the second set of memory cells of the memory system is based at least in part on identifying that the data quantity threshold is satisfied. Col. 90 lines 47-55 candidate extents from the source flash PD having the capacity violation are moved to a target flash PD, until the source flash PD no longer has a capacity violation; Col. 86 line 54 – Col. 87 line 10 an underutilized flash PD that is either MLC or SLC media types is selected as a target device; Col. 62 line 30-39 Each IO type has a preferred media type (e.g. SLC, MLC) for storing its data; Col. 62 lines 40-50 I/O types may be ranked first based on the G and D rating, G being ranked higher than D
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with an indication of a quantity threshold for a type of data, and identifying that a quantity of data of a particular type has exceeded a threshold taught by Martin.
The motivation being to select data portions for movement to PDs that provide the best performance (see Martin Col. 58 line 48 – Col. 59 line 9)
The systems of Muthiah and Martin are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Martin to obtain the invention as recited in claim 16.
Claim(s) 5 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Muthiah et al. (U.S. PGPub No. 2021/0081316) in view of Bhat et al. (U.S. PGPub No. 2021/0132817) in view of Fai (2012/0224425) in view of Horn et al. (U.S. PGPub No. 2017/0090754).
Claim 5
Muthiah does not explicitly teach identifying data accessed after a start-up time period elapses, and transferring the data to a second set of memory cells based on the identification.
Horn (2017/0090754) teaches:
The apparatus of claim 1, wherein the controller is further configured to cause the apparatus to: receive an indication of a duration of time associated with performing a start- up procedure, the one or more parameters associated with the data comprising the indication of the duration; and P. 0037 predetermined period of time following the startup period; P. 0053 learned information 22 indicates that the data will be or has been used within a predetermined period of time from a startup period
identify, during the start-up procedure, that the data is accessed after the duration of time indicated, P. 0075 and FIGs. 10A in block 1002, controller 120 receives a read or write command from host 101; P. 0079 in block 1004, it is determined that host 101 or DSD 106 is within a predetermined amount of time from a startup period; P. 0050 controller 120 stores the received data in as user data 24 in NVM 128
wherein transferring the data to the second set of memory cells of the memory system is based at least in part on identifying that the data is accessed after the duration of time indicated. P. 0028 controller 120 can use this information 22 [analogous to a hint taught by Muthiah] to select how the data is accessed [combine with Muthiah, which uses hints to perform garbage collection]
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with identifying data accessed after a start-up time period elapses, and transferring the data to a second set of memory cells based on the identification taught by Horn.
The motivation being to improve the performance of the data storage device DSD (see Horn P. 0024)
The systems of Muthiah and Horn are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Horn to obtain the invention as recited in claim 5.
Claim 14
Muthiah does not explicitly teach identifying data accessed after a start-up time period elapses, and transferring the data to a second set of memory cells based on the identification.
Horn (2017/0090754) teaches:
The non-transitory computer-readable medium of claim 10, wherein the instructions are further executable by the processor to: receive an indication of a duration of time associated with performing a start- up procedure, the one or more parameters associated with the data comprising the indication of the duration; and P. 0037 predetermined period of time following the startup period; P. 0053 learned information 22 indicates that the data will be or has been used within a predetermined period of time from a startup period
identify, during the start-up procedure, that the data is accessed after the duration of time indicated, P. 0075 and FIGs. 10A in block 1002, controller 120 receives a read or write command from host 101; P. 0079 in block 1004, it is determined that host 101 or DSD 106 is within a predetermined amount of time from a startup period; P. 0050 controller 120 stores the received data in as user data 24 in NVM 128
wherein transferring the data to the second set of memory cells of the memory system is based at least in part on identifying that the data is accessed after the duration of time indicated. P. 0028 controller 120 can use this information 22 [analogous to a hint taught by Muthiah] to select how the data is accessed [combine with Muthiah, which uses hints to perform garbage collection]
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with identifying data accessed after a start-up time period elapses, and transferring the data to a second set of memory cells based on the identification taught by Horn.
The motivation being to improve the performance of the data storage device DSD (see Horn P. 0024)
The systems of Muthiah and Horn are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Horn to obtain the invention as recited in claim 14.
Claim(s) 6 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Muthiah et al. (U.S. PGPub No. 2021/0081316) in view of Bhat et al. (U.S. PGPub No. 2021/0132817) in view of Fai (2012/0224425) in view of Neufeld et al. (U.S. PGPub No 2020/0004671).
Claim 6
Muthiah does not explicitly teach identifying that data is stored in a region that is not associated with start-up.
Neufeld (2020/0004671) teaches:
The apparatus of claim 1, wherein the controller is further configured to cause the apparatus to: identify that the data is stored to a first region of the memory system that is different than a second region associated with performing a start-up procedure, FIG. 7 and P. 0046 system data area 601 [second region] is configured as a high endurance SLC section and stores boot data; P. 0047 memory space 604 [first region] includes a high density MLC section 611 and a high endurance SLC section 613
wherein, transferring the data to the second set of memory cells of the memory system is based at least in part on identifying that the data is stored to the first region. P. 0047 the memory system may initially write user data to memory space 604 [first region] into the SLC section 613 [first set of cells], then transfer the user data into the high density MLC section 611 [second set of cells]
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with identifying that data is stored in a region that is not associated with start-up taught by Neufeld.
The motivation being to store important data in a high endurance section of non-volatile memory (see Neufeld P. 0046)
The systems of Muthiah and Neufeld are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Neufeld to obtain the invention as recited in claim 6.
Claim 15
Muthiah does not explicitly teach identifying that data is stored in a region that is not associated with start-up.
Neufeld (2020/0004671) teaches:
The non-transitory computer-readable medium of claim 10, wherein the instructions are further executable by the processor to: identify that the data is stored to a first region of the memory system that is different than a second region associated with performing a start-up procedure, FIG. 7 and P. 0046 system data area 601 [second region] is configured as a high endurance SLC section and stores boot data; P. 0047 memory space 604 [first region] includes a high density MLC section 611 and a high endurance SLC section 613
wherein, transferring the data to the second set of memory cells of the memory system is based at least in part on identifying that the data is stored to the first region. P. 0047 the memory system may initially write user data to memory space 604 [first region] into the SLC section 613 [first set of cells], then transfer the user data into the high density MLC section 611 [second set of cells]
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with identifying that data is stored in a region that is not associated with start-up taught by Neufeld.
The motivation being to store important data in a high endurance section of non-volatile memory (see Neufeld P. 0046)
The systems of Muthiah and Neufeld are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Neufeld to obtain the invention as recited in claim 15.
Claim(s) 8 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Muthiah et al. (U.S. PGPub No. 2021/0081316) in view of Bhat et al. (U.S. PGPub No. 2021/0132817) in view of Fai (2012/0224425) in view of Prudviraj Gunda et al. (U.S. PGPub No. 2022/0413758)
Claim 8
Muthiah does not explicitly teach identifying an idle time, and transferring data to the second set of cells during idle time.
Prudviraj Gunda (2022/0413758) teaches:
The apparatus of claim 1, wherein the controller is further configured to cause the apparatus to: identify an idle time associated with inactivity of the memory system, wherein transferring the data to the second set of memory cells of the memory system is based at least in part on identifying the idle time. P. 0050 determining that the data storage device 102 and/or the memory device 104 remains in the idle condition, a prioritized relocation algorithm is performed at block 532; P. 0023 relocation circuitry 142 may be configured to perform SLC-QLC compactions; P. 0039 prioritization of the relocation operations is based on other criteria, such as data type
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with identifying an idle time, and transferring data to the second set of cells during idle time taught by Prudviraj Gunda.
The motivation being achieve improvement in performance of the memory device (see Prudviraj Gunda P. 0056)
The systems of Muthiah and Prudviraj Gunda are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Prudviraj Gunda to obtain the invention as recited in claim 8.
Claim 17
Muthiah does not explicitly teach identifying an idle time, and transferring data to the second set of cells during idle time.
Prudviraj Gunda (2022/0413758) teaches:
The non-transitory computer-readable medium of claim 10, wherein the instructions are further executable by the processor to: identify an idle time associated with inactivity of the memory system, wherein transferring the data to the second set of memory cells of the memory system is based at least in part on identifying the idle time. P. 0050 determining that the data storage device 102 and/or the memory device 104 remains in the idle condition, a prioritized relocation algorithm is performed at block 532; P. 0023 relocation circuitry 142 may be configured to perform SLC-QLC compactions; P. 0039 prioritization of the relocation operations is based on other criteria, such as data type
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with identifying an idle time, and transferring data to the second set of cells during idle time taught by Prudviraj Gunda.
The motivation being achieve improvement in performance of the memory device (see Prudviraj Gunda P. 0056)
The systems of Muthiah and Prudviraj Gunda are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Prudviraj Gunda to obtain the invention as recited in claim 17.
Claim(s) 9 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Muthiah et al. (U.S. PGPub No. 2021/0081316) in view of Bhat et al. (U.S. PGPub No. 2021/0132817) in view of Fai (2012/0224425) in view of Rom et al. (U.S. PGPub No. 2020/0185027)
Claim 9
Muthiah does not explicitly teach the first set of cells being TLC and the second set of cells being QLC.
Rom (2020/0185027) teaches:
The apparatus of claim 1, wherein the first set of memory cells comprise triple-level cells and the second set of memory cells comprise quad-level cells. P. 0073 weights are read from a first set of NAND elements, which are TLC elements, then updated. At block 908, an on-chip copy stores the updated weights in a second set of NAND elements, which are QLC elements
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with the first set of cells being TLC and the second set of cells being QLC taught by Rom.
The motivation being to reduce overhead (see Rom P. 0071)
The systems of Muthiah and Rom are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Rom to obtain the invention as recited in claim 9.
Claim 18
Muthiah does not explicitly teach the first set of cells being TLC and the second set of cells being QLC.
Rom (2020/0185027) teaches:
The non-transitory computer-readable medium of claim 10, wherein the first set of memory cells comprise triple-level cells and the second set of memory cells comprise quad-level cells. P. 0073 weights are read from a first set of NAND elements, which are TLC elements, then updated. At block 908, an on-chip copy stores the updated weights in a second set of NAND elements, which are QLC elements
It would have been obvious to a person with ordinary skill in the art at the effective filing date of the application to include the invention of Muthiah with the first set of cells being TLC and the second set of cells being QLC taught by Rom.
The motivation being to reduce overhead (see Rom P. 0071)
The systems of Muthiah and Rom are analogous because they are from the “same field of endeavor” and from the same “problem solving area.” Namely, they are both from the field of memory systems.
Therefore it would have been obvious to combine Muthiah with Rom to obtain the invention as recited in claim 18.
Response to Arguments
Applicant's arguments filed 9/9/2025 have been fully considered but they are not persuasive.
The applicant states “the features of Bhat are not the same as those recited in amended independent claim 1. For example, disabling the transfer of data when a temperature reaches a maximum write temperature threshold, as described in Bhat, does not teach or suggest that "transferring the data to the second set of memory cells of the memory system is based at least in part on the temperature of the data exceeding a temperature threshold," as recited in amended independent claim 1 (emphasis added). That is, although Bhat describes reaching a maximum write temperature threshold, Bhat does not describe "transferring the data . .. based at least in part on the temperature of the data exceeding a temperature threshold," as recited in amended independent claim 1 (emphasis added). Rather, Bhat describes refraining from transferring data when a temperature reaches a maximum write temperature threshold. Thus, Bhat does not teach or suggest that "transferring the data to the second set of memory cells of the memory system is based at least in part on the temperature of the data exceeding a temperature threshold," as recited in amended independent claim 1 (emphasis added).”
The examiner notes the claim language states the transferring of data to the second set of memory cells is "based at least in part on" the temperature satisfying a threshold, which under the broadest reasonable interpretation is treated as any relation (direct or indirect) between transfer of data to second cells and the temperature threshold. As mentioned in the applicant's arguments, Bhat adjusts the transfer rate of data to denser memory cells based on the temperature of cells, and ceases transferring when the temperature exceeds a maximum. It would be obvious to a person of ordinary skill in the art that in Bhat, data written to SLC blocks (mapped to first set of memory cells) would eventually be transferred to QLC cells (mapped to second set of memory cells), and that the movement of a particular piece of data from SLC to QLC blocks is affected by the rate of transfer. Since Bhat teaches in cited P. 0052 increasing the transfer rate when the temperature at a higher transfer rate when cells 117 rise above a temperature threshold, an increased transfer rate would result in a particular piece of data being moved to QLC blocks sooner than at a lower transfer rate. While the temperature rising above the threshold doesn't directly result in data being transferred from SLC to QLC blocks, the claim does not require the transfer to be directly responsive to a temperature exceeding a threshold. Bhat P. 0053 was cited to show that transfers between SLC and QLC may be stopped when a different temperature threshold (the maximum write temperature) is exceeded, to show that individual data transfer operations may also be affected by memory cell temperature.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Bhat et al. (U.S. PGPub No. 2022/0206920) teaches moving data from MLC memory to SLC memory based on a temperature threshold.
Cohen et al. (U.S. PGPub No. 2016/0085455) storing boot data in non-volatile memory, and identifying commands sent in a time period immediately after the memory receives power as boot data, and storing boot data in SLC memory.
Yu et al. (U.S. PGPub No. 2011/0197017) teaches checking a data transfer request type while processing the request, and copying data in SLC to MLC when the capacity of the SLC reaches a predefined percentage.
Sunata et al. (U.S. PGPub No. 2017/0060425) teaches a temperature control unit which constantly stores a temperature coefficient of each memory chip, where data may be moved from an SLC area to a MLC area when programmed under an abnormal temperature environment.
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/STEPHANIE WU/Primary Examiner, Art Unit 2133
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