DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claim 21 is under 35 U.S.C. 102(a)(1) as being anticipated over Privitera (US 20120001679 A1).
Regarding independent claim 21, Privitera discloses, a method of manufacturing an electric circuit (see Figs. 3-4 and Fig. 5a), the method comprising the steps of
providing a substrate (see dielectric layer 22 in Fig. 4) with a first side and a second side that is opposite to the first side (see annotated Fig. 4);
providing a signal conductor (see vias 23 as seen in Fig. 4) on the first side of the substrate (see Fig. 4 and disclosed in para 0045 “Vias 23 extend through the intermediate dielectric layer 22 and couple the first metal regions 14 to the ends of the first portion 11”);
providing a first resistor structure (see first portion 11 of resistor 10 in Fig. 4) on the first side of the substrate (see Fig. 4), wherein the first resistor structure (11) contacts the signal conductor;
providing a first contacting structure (see another one of vias 23 and one of metal regions 14 as annotated Fig. 4) on the first side of the substrate (see Fig. 4 and disclosed in para 0045 “Vias 23 extend through the intermediate dielectric layer 22 and couple the first metal regions 14 to the ends of the first portion 11”), wherein the first contacting structure is electrically connected to the first resistor structure (see Fig. 4 and disclosed in para 0045 “Vias 23 extend through the intermediate dielectric layer 22 and couple the first metal regions 14 to the ends of the first portion 11”) by a first electric connection (see 23 and 14), such that the first contacting structure is electrically connected to the signal conductor via the first resistor structure (see Fig. 4), wherein the first electric connection is at least partially provided on the second side of the substrate (see Fig. 4);
applying a test signal to the first resistor structure (see Fig. 5a) via a measurement circuit (see electronic circuit portion 31 and trimming circuit 32 in Fig. 5a) contacting the first contacting structure and the signal conductor (see Fig. 5a);
determining at least one characteristic property of the first resistor structure based on the test signal (disclosed in para 0053 “Sensor 35 measures one of the electrical parameters of the electronic circuit portion 31, whose value depends on the resistance value of the functional resistor 11 […] the electrical circuit portion 31 may comprise a resistance meter, which measures the resistance of the functional resistor 11 and supplies a signal corresponding to the trimming circuit 32, for a more accurate adjustment, or may comprise a piece of equipment that measures one of the electrical parameters of the device 30, whose value depends on the resistance value of the functional resistor 11”); and
trimming the first resistor structure until the at least one characteristic property has a predefined nominal value or differs from a predefined nominal value by less than a predefined threshold (disclosed in para 0072 “it may be possible to manufacture the resistor 10 with an approximate resistance value and with an approximately zero temperature coefficient. The exact resistance value may be trimmed […] by heating the crossing area 13 […] the trimming thus serves to achieve a particularly precise resistance value and/or to dynamically modify the resistance of the resistor 10”).
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Response to Amendment
The amendment of 09/17/2026 is acknowledged.
Response to Arguments
Applicant's arguments, see remarks, filed on 09/17/2026have been fully considered but the Applicant’s arguments are not persuasive.
Firstly, under a broadest reasonable interpretation (BRI), the term “substrate” of the claim must be given its plain meaning. In this case, the definition of the term “substrate” is a supporting material on which a circuit is formed or fabricated. Hence, as seen in Fig. 4, layer 22 of Privitera is construed as a substrate since layer 22 is a supporting material on which circuit with resistor 10 is formed on. In other words, Previtera names layer 20 in Fig. 4 is a substrate but layer/substrate 20 does not exclude layer 22 be another substrate.
Secondly, as seen in annotated Fig. 4 of Previtera, layer/substrate 22 comprises first side/top side and second side/bottom side, wherein the second side is opposite to the first side. Furthermore, first side/top side has a bottom surface and a top surface of the first side/top side, wherein the second side/bottom side has also a bottom surface and a top surface of the second side/top side. As annotated Fig. 4 of Previtera, the signal conductor 23 is attached on the bottom surface of the top side/first side of layer/substrate 22, the first resistor structure 11 is attached on the top surface of the top side/first side of layer/substrate 22, and the first electric connection 23 and 14, wherein the portion 14 of the first electric connection is attached on the top surface of the bottom side/second side of layer/substrate 22. Hence, Previtera discloses, “the first electric connection is at least partially provided on the second side of the substrate”.
The remarks provide a conclusion requesting allowance. However, the claims are presently rejected as set forth and explained above.
Allowable Subject Matter
Claims 1-20 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 1, Previtera does not explicitly disclose, wherein a reference mass layer is provided on the second side of the substrate, and wherein the first electric connection is electrically isolated from the reference mass layer during the trimming of the first resistor structure. No additional evidence was found to reasonably render a case of obviousness against the claimed invention.
Claims 2-20 are also allowed as being dependent upon claim 1.
Conclusion
THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
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/VY T NGUYEN/Examiner, Art Unit 3761
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