DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) was submitted on 12/05/2023. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-12, and 19-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated over Privitera (US 20120001679 A1).
Regarding independent claim 1, Privitera discloses, a method of manufacturing an electric circuit (see Figs. 3-4 and Fig. 5a), the method comprising the steps of
providing a substrate (see dielectric layer 22 in Fig. 4) with a first side and a second side that is opposite to the first side (see annotated Fig. 4);
providing a signal conductor (see vias 23 as seen in Fig. 4) on the first side of the substrate (see Fig. 4 and disclosed in para 0045 “Vias 23 extend through the intermediate dielectric layer 22 and couple the first metal regions 14 to the ends of the first portion 11”);
providing a first resistor structure (see first portion 11 of resistor 10 in Fig. 4) on the first side of the substrate (see Fig. 4), wherein the first resistor structure (11) contacts the signal conductor;
providing a first contacting structure (see another one of vias 23 and one of metal regions 14 as annotated Fig. 4) on the first side of the substrate (see Fig. 4 and disclosed in para 0045 “Vias 23 extend through the intermediate dielectric layer 22 and couple the first metal regions 14 to the ends of the first portion 11”), wherein the first contacting structure is electrically connected to the first resistor structure (see Fig. 4 and disclosed in para 0045 “Vias 23 extend through the intermediate dielectric layer 22 and couple the first metal regions 14 to the ends of the first portion 11”) by a first electric connection (see 23 and 14), such that the first contacting structure is electrically connected to the signal conductor via the first resistor structure (see Fig. 4), wherein the first electric connection is at least partially provided on the second side of the substrate (see Fig. 4);
applying a test signal to the first resistor structure (see Fig. 5a) via a measurement circuit (see electronic circuit portion 31 and trimming circuit 32 in Fig. 5a) contacting the first contacting structure and the signal conductor (see Fig. 5a);
determining at least one characteristic property of the first resistor structure based on the test signal (disclosed in para 0053 “Sensor 35 measures one of the electrical parameters of the electronic circuit portion 31, whose value depends on the resistance value of the functional resistor 11 […] the electrical circuit portion 31 may comprise a resistance meter, which measures the resistance of the functional resistor 11 and supplies a signal corresponding to the trimming circuit 32, for a more accurate adjustment, or may comprise a piece of equipment that measures one of the electrical parameters of the device 30, whose value depends on the resistance value of the functional resistor 11”); and
trimming the first resistor structure until the at least one characteristic property has a predefined nominal value or differs from a predefined nominal value by less than a predefined threshold (disclosed in para 0072 “it may be possible to manufacture the resistor 10 with an approximate resistance value and with an approximately zero temperature coefficient. The exact resistance value may be trimmed […] by heating the crossing area 13 […] the trimming thus serves to achieve a particularly precise resistance value and/or to dynamically modify the resistance of the resistor 10”).
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Regarding claim 2, Privitera discloses the method of claim 1, and wherein the at least one characteristic property comprises a resistance (disclosed in para 0053 “Sensor 35 measures one of the electrical parameters of the electronic circuit portion 31, whose value depends on the resistance value of the functional resistor 11 […] the electrical circuit portion 31 may comprise a resistance meter, which measures the resistance of the functional resistor 11 and supplies a signal corresponding to the trimming circuit 32, for a more accurate adjustment, or may comprise a piece of equipment that measures one of the electrical parameters of the device 30, whose value depends on the resistance value of the functional resistor 11”);.
Regarding claim 3, Privitera discloses the method of claim 1, and wherein the first electric connection (see another one of vias 23 and one of metal regions 14 as annotated Fig. 4) comprises at least one vertical interconnect access (see Fig 4), via, that interconnects the first side of the substrate with the second side of the substrate through the substrate (see Fig. 4).
Regarding claim 4, Privitera discloses the method of claim 1, and wherein the first resistor structure is trimmed by a laser (disclosed in para 0010 “In this resistor, the precise value of the resistance is obtained via laser trimming or electrical trimming so as to cause a phase change in one of the two portions”).
Regarding claim 5, Privitera discloses the method of claim 1, and wherein the first resistor structure (10) has a first end and a second end that is opposite to the first end, wherein the first resistor structure tapers from the first end towards the second end (see annotated Fig. 11).
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Regarding claim 6, Privitera discloses the method of claim 5, wherein the first end is connected to the first contacting structure, and wherein the second end is directly connected to the signal conductor (see annotated Fig. 11).
Regarding claim 7, Privitera discloses the method of claim 6, wherein the first resistor structure is trimmed in an area around the first end, such that a width of the first end is reduced (see annotated Fig. 11).
Regarding claim 8, Privitera discloses the method of claim 5, wherein the first resistor structure is trimmed symmetrically with respect to an axis of the first resistor structure extending between the first end and the second end (see annotated Fig. 11).
Regarding claim 9, Privitera discloses the method of claim 1, wherein the first resistor structure has a first end and a second end that is opposite to the first end, wherein the first resistor structure has a constant width between the first end and the second end (see annotated Fig. 3).
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Regarding claim 10, Privitera discloses the method of claim 1, wherein a layer thickness of the signal conductor is larger than a layer thickness of the first resistor structure (see Fig. 4).
Regarding claim 11, Privitera discloses the method of claim 1, wherein the first resistor structure is composed of a different material or different materials compared to the signal conductor (disclosed in para 0045 “The vias 23 may be formed by an appropriate barrier layer (for example, of Ti or TiN), and are filled, for example, with tungsten. The resistor 10 has a constant thickness, comprised, for example, in the 20 to 200-nm range, according to the resistance desired, and for example is of a calcogenide or calcogenic alloy comprising Ge, Sb and Te, such as Ge.sub.2Sb.sub.2Te.sub.5 (also referred to as GST)”).
Regarding claim 12, Privitera discloses the method of claim 1, wherein the signal conductor comprises or consists of gold, and/or wherein the first resistor structure comprises or consists of nickel and/or chrome (disclosed in para 0084 “even though an embodiment has been described with reference to phase-change materials, it is applicable also to other materials, such as polysilicon or other metal alloys commonly used for the production of thin-film resistors, such as SiCr, NiCr, TaN, SiTa”).
Regarding claim 19, Privitera discloses the method of claim 1,further comprising the steps of providing a second resistor structure (see second portion 12 of resistor 10 in Figs. 3-4) on the first side of the substrate (see Fig. 4), wherein the second resistor structure contacts the signal conductor (see annotated Fig. 4, wherein 12 is in electrical contact with 23 and 14); providing a second contacting structure (vias of metal region 15 and metal region 15) on the first side of the substrate (see Figs. 3-4 and disclosed I para 0045 “Similar vias (not illustrated in FIG. 4) couple the second metal regions 15 (not visible in FIG. 4 either) to the ends of the second portion 12”), wherein the second contacting structure is electrically connected to the second resistor structure by a second electric connection (see Figs. 3-4 and para 0045), such that the second contacting structure is electrically connected to signal conductor via the second resistor structure (see Fig. 5a), wherein the second electric connection is at least partially provided on a second side of the substrate (see Figs. 3-4 and disclosed I para 0045 “Similar vias (not illustrated in FIG. 4) couple the second metal regions 15 (not visible in FIG. 4 either) to the ends of the second portion 12”); applying a test signal to the second resistor structure (see Fig. 5a) via a measurement circuit contacting the second contacting structure and the signal conductor (see electronic circuit portion 31 and trimming circuit 32 in Fig. 5a); determining at least one characteristic property of the second resistor structure based on the test signal and trimming the second resistor structure until the at least one characteristic property has a nominal value or differs from the nominal value by less than a predefined threshold (disclosed in para 0052-0053 “Trimming circuit 32 may thus be coupled to the trimming resistor 12 only during trimming for modifying the resistance of the functional resistor 11 and verifying that the correct resistance value has been attained […] Sensor 35 measures one of the electrical parameters of the electronic circuit portion 31, whose value depends on the resistance value of the functional resistor 11 […] the electrical circuit portion 31 may comprise a resistance meter, which measures the resistance of the functional resistor 11 and supplies a signal corresponding to the trimming circuit 32, for a more accurate adjustment, or may comprise a piece of equipment that measures one of the electrical parameters of the device 30, whose value depends on the resistance value of the functional resistor 11” and disclosed in para 0072 “it may be possible to manufacture the resistor 10 with an approximate resistance value and with an approximately zero temperature coefficient. The exact resistance value may be trimmed […] by heating the crossing area 13 […] the trimming thus serves to achieve a particularly precise resistance value and/or to dynamically modify the resistance of the resistor 10”).
Regarding claim 20, Privitera discloses a test and/or measurement instrument (see Fig. 5a), comprising an electric circuit (see Fig. 5a) manufactured according to the method of claim 1 (see cited claim 1 above).
Allowable Subject Matter
Claim 13 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 13, Privitera discloses the method of claim 1, however, Previtera does not explicitly disclose, wherein a reference mass layer is provided on the second side of the substrate, and wherein the first electric connection is electrically isolated from the reference mass layer during the trimming of the first resistor structure. No additional evidence was found to reasonably render a case of obviousness against the claimed invention.
Claims 14-18 are also objected to as being dependent upon claim 13.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VY T NGUYEN whose telephone number is (571) 272-6015. The examiner can normally be reached Monday-Friday approx. 9:00 am-5:00 pm ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ibrahime Abraham can be reached on (571) 270-5569. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/VY T NGUYEN/Examiner, Art Unit 3761
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