DETAILED ACTION
Status of the Application
This office action is a final rejection in response to the filing of the applicant’s response to the non-final rejection filed on 03/30/2026. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
2. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claims 14-15,17-19, 21 and 22 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liu et al, US Patent Application Publication (US 2019/0386517 A1).
Regarding Claim 14, Liu et al discloses a method (see Figs 1-9) comprising:
sensing current (202) from a switching converter (106,110) (see Figs 1-9, abstract and par. [0041]-[0043],[0045],[0048]-[0052], [0054],[0061],[0070],[0074],[0078]), wherein the sensed current is associated with an amplitude shift keying (ASK) signal (see ASK in par. [0041]);
generating a scaled down current of the sensed current (see scale down in par. [0053],claim 6-7);
generating a voltage signal using the scaled down current, wherein the voltage signal is a scaled down voltage of the ASK signal (see ASK in par. [0041]); and
demodulating (204) the ASK signal using the scaled down voltage (see Figs 1-9 and demodulation in par. [0009]-[0011],[0015],[0018]-[0022],[0041]-[0044]).
Regarding Claim 15, Liu et al discloses the method of claim 14, wherein sensing current from the switching converter (106,110) comprises sensing current from a switching converter (106,110) in a poller or a listener of a near field communication (NFC) power transfer system (see Figs 1-9, abstract and par. [0041]-[0043],[0045],[0048]-[0052], [0054],[0061],[0070],[0074],[0078]).
Regarding Claim 17, Liu et al discloses the method of claim 14, wherein sensing current from the switching converter (106,110) comprises copying the sensed current from a switch node (common node, par. [0046]) of the switching converter (106,110), wherein the switch node corresponds to a low-side metal-oxide-semiconductor field-effect transistor (MOSFET) (S1-S4) that is turned on in the switching converter (106,110) (see Figs 1-9 and par. [0038],[0047],[0052]).
Regarding Claim 18, Liu et al discloses the method of claim 14, wherein generating the voltage signal comprises detecting an envelope of the scaled down current to generate the scaled down voltage (see scale down in par. [0053],claim 6-7 and Figs 1-9).
Regarding Claim 19, Liu et al discloses the method of claim 14, wherein the method further comprises using at least one replica MOSFET (SS2, SS4) to scale down the sensed current (See Figs 1-9 and par. [0051],[0054],[0057]-[0058]).
Regarding Claim 21, Liu et al discloses the method of claim 17, wherein:
the switch node (common node, par. [0046]) corresponding to the low-side MOSFET (S1-S4) that is turned on in the switching converter (106,110) comprises a first switch node and a second switch node (see nodes in Fig 3); and copying the sensed current from the switch node of the switching converter (106,110) further comprises selecting between a voltage of the first switch node and a voltage of the second switch node (see Figs 1-9 and par. [0038],[0047],[0052]).
Regarding Claim 22, Liu et al discloses the method of claim 18, wherein detecting an envelope of the scaled down current to generate the scaled down voltage further comprises:
replicating the scaled down current (see scale down in par. [0053],claim 6-7 and Figs 1-9); and detecting an envelope of the replicated scaled down current (see scale down in par. [0053],claim 6-7 and Figs 1-9).
Response to Arguments
5. Applicant's arguments filed on 03/30/2026 have been fully considered but they are not persuasive.
The applicant argued in pages 7-8 of 9 (applicant’s remarks) that:
“Applicant respectfully requests reconsideration of the rejection of the claims. Although Liu discloses a scaled-down current signal (p.[0053]) and separately discloses a peak voltage signal Vpeak (p.[0055]), Liu does not teach the claimed step of "generating a voltage signal using the scaled down current." In particular, Liu expressly states that Vpeak is generated by adding a phase difference to the peak current signal Ipeak. Thus, Liu's Vpeak is a phase-derived voltage estimate rather than a voltage signal generated from the scaled-down current itself as recited in claim 14.
Accordingly, the cited portions of Liu do not disclose the claimed generation of a scaled-down voltage of the ASK signal using the scaled-down current.”;
In response to applicant’s arguments, the examiner respectfully disagrees since Lie et al discloses as part of the wireless power transfer system (100), also includes a power transmitter (110) that further includes sensing apparatus (202), demodulator (204) and control circuit (206) (par. [0042]), par. [0053] discloses the use of “generating a scaled down current of the sensed current”,
“[0053] In some embodiments, the main switching element may comprise M transistor cells connected in parallel. The sense switch may comprise m transistor cells connected in parallel. In some embodiments, M is greater than m. As a result, the sense switch may scale down the current flowing through the main switching element by a ratio of M to m. In some embodiments, M is equal 3,000 and m is equal to 1. It should be noted that the ratio of 3,000 to 1 is merely an example. This ratio is selected purely for demonstration purposes and is not intended to limit the various embodiments of the present disclosure.”
par. [0054] discloses that the sensing apparatus (202) comprises current sense processor 302, a peak detector 304 and a filter 306.
“[0054] The sensing apparatus 202 comprises a current sense processor 302, a peak detector 304 and a filter 306. The current sense processor 302 receives the currents flowing through the sense switches (e.g., senses switches SS1 and SS2). The current sense processor 302 may comprise an amplifier, a switch and a sense resistor. The amplifier, the switch and the sense resistor form a current-mirror configuration. Through the current-mirror configuration, the voltage across the sense resistor is proportional to the current flowing through the main switching element. The sense switch current-sensing technique is well known, and hence is not discussed in further detail.”
“[0055] The peak detector 304 receives the sensed current generated by the current sense processor 302. The peak detector 304 generates a peak current signal Ipeak by following the input voltage until its peak point is reached and holding the peak value as the input voltage decreases. Furthermore, the peak detector 304 is capable of calculating the peak voltage Vpeak by adding a suitable phase difference (e.g., 90 degrees) into the peak current signal. The circuit of the peak detector 304 will be described below with respect to FIG. 4.”
The current sensing apparatus (202) clearly discloses the limitation “generating a voltage signal using the scaled down current” by generating Vpeak,
Vpeak is generated (304) by using the scaled down current of the sensed current from current sensed processor (302),
In addition, par. [0061] disclosing that Vpeak is generated by the sensing apparatus 202,
“[0061] FIG. 5 illustrates a block diagram of a first implementation of the demodulation apparatus in accordance with various embodiments of the present disclosure. The demodulation apparatus 204 comprises a demodulation channel 504 coupled between a multiplexer 502 and a signal selector 506. As shown in FIG. 5, the peak current signal Ipeak, the average current signal Iavg and the peak voltage signal Vpeak generated by the sensing apparatus 202 are fed into the multiplexer 502. The demodulation channel 504 selectively processes one of the peak current signal Ipeak, the average current signal Iavg and the peak voltage signal Vpeak. In other words, the three signals Ipeak, Iavg and Vpeak share the demodulation channel 504. At different time instants, the demodulation channel 504 may demodulate different signals. As such, the output of the demodulation channel 504 generates a plurality of digital signals (the digital signals demodulated from Ipeak, Iavg and Vpeak). The plurality of digital signals is fed into the signal selector 506.”,
the broad claim language as currently recited says “generating a voltage signal using the scaled down current”, the claim just requires that a voltage signal is generated by having the scaled down current a participation in that generation of the voltage signal, the claim language does not exclude or restricts the generation of Vpeak, also does not provides a particular or clear requirement for the generation of the voltage signal, the mere use of the relationship of voltage and current by the word “using” is vague, therefore using the broadest reasonable interpretation, the applicant’s argument is not persuasive because it relies on a n unduly narrow interpretation of the claimed term. Using the broadest reasonable interpretation consistent with the specification, the limitation “generating a voltage signal using the scaled down current.” is met by the cited prior art of record (Liu et al) therefore meets the limitation.
Examiner Note
6. The examiner cites particular columns and lines numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Conclusion
7. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Please see the cited prior art in the PTO-892 form attached.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALFONSO PEREZ BORROTO whose telephone number is (571) 270-1714. The examiner can normally be reached on M-F (9am-4pm).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Taelor Kim can be reached on (571) 270-7166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALFONSO PEREZ BORROTO/
Primary Examiner, Art Unit 2836
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