Fig. Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 2-8, 10-14, 16 and 17are objected to because of the following informalities:
In the preamble of claims 2-8, line 1 in each claim, “The circuit” should read as --The envelope tracking bias circuit--, respectively.
In the preamble of claims 10-14, 16 and 17, line 1 in each claim, “The method” should read as --The bias current generation method--, respectively.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 15-17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 15, lines 7-8 recites the limitation “generating a bias current by implementing one of a direct envelope bias mode and an average envelope bias mode based on the determined bandwidth frequency”. It is unclear whether the bias current is generated by a direct envelope bias and an average envelope bias mode based on the determined bandwidth frequency separately, or if the bias current is generated by implementing a direct envelope bias mode and an average envelope bias mode together based on the same determined bandwidth frequency. Therefore, the claim has an indefinite scope.
Claims 16-17 are rejected due to their dependency on the rejected independent claims 1 and 9.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 8, 9 and 14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Khesback et al (US 10454428 B2), hereafter referred to as “Khesback”.
Regarding claims 1 and 9, in the embodiment of Fig. 6, Khesback discloses:
A bias current generation method (per claim 9) in an envelope tracking bias circuit (Figs. 2 and 6, power amplifier system 150) configured to output a bias current (Fig. 6, bias signals BIAS1 and BIAS2 can include a bias current per column 12 lines 43-45), the circuit comprising:
an envelope detector (root mean square (RMS) detector 171) configured to detect an envelope signal of a radio frequency (RF) signal (column 3 lines 33-44, the disclosure of the envelope tracking system includes detecting the envelope signal corresponding to an envelope of the radio frequency signal);
an envelope bandwidth detector (signal bandwidth detection circuit 163, includes 1717 and envelope bandwidth to voltage converter 172) configured to detect a frequency band of the envelope signal (column 1 lines 56-60, signal bandwidth detection circuit is configured to generate a detected bandwidth signal); and
a bias output circuit (bias controller 153) configured to:
generate a first bias current (bias signal BIAS1) based on an average magnitude of the envelope signal when the frequency band of the envelope signal is greater than or equal to a predetermined frequency (Fig. 7, column 14, lines 19-29, current changes in relation to the envelope signal such as the bias current through NFET 203, furthermore, column 2 line 66 through column 3 line 4, the mode control circuit decreases a bias current of the error amplifier when the radio frequency signal bandwidth is greater than the first threshold but less than the second threshold) and
generate a second bias current (bias signal BIAS2) based on the envelope signal when the frequency band of the envelope signal is lower than the predetermined frequency.
Regarding claims 8 and 14, in the embodiment of Fig. 6, Khesback discloses:
the envelope detector (171) is configured to detect the envelope signal from the RF signal or a power supply voltage of the power amplifier that is controlled based on an envelope of the RF signal (column 1 lines 50-56, the envelope tracker is configured to generate the power amplifier supply voltage based on an envelope signal corresponding to the envelope of the radio frequency signal).
Allowable Subject Matter
Claims 2-7, and 10-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claims 2 and 10:
the cited prior art of record, Khesback et al, either singly or in proper combination, does not teach or make obvious, along with the other claimed features, “a limiter configured to convert the envelope signal into a pulse signal (as per claim 10); and
a counter configured to count a number of pulses of the pulse signal for a time corresponding to a pulse width of an enable counter signal,”
Regarding claim 5:
the cited prior art of record, Khesback et al, either singly or in proper combination, does not teach or make obvious, along with the other claimed features, “an average envelope signal processor configured to generate a signal corresponding to the average magnitude of the envelope signal by detecting an envelope of the envelope signal; and
a direct envelope signal processor configured to amplify the envelope signal and generate a signal corresponding to the envelope signal,
wherein the average envelope signal processor or the direct envelope signal processor is configured to operate based on the frequency band of the envelope signal.”
Regarding claim 6:
the cited prior art of record, Khesback et al, either singly or in proper combination, does not teach or make obvious, along with the other claimed features, “an envelope current generator configured to generate an envelope current corresponding to the average magnitude of the envelope signal or the envelope signal;
a current source configured to supply a reference current based on the envelope current; and
a bias circuit configured to generate the bias current based on the reference current.”
Regarding claim 12:
the cited prior art of record, Khesback et al, either singly or in proper combination, does not teach or make obvious, along with the other claimed features, “generating a first envelope current corresponding to the average magnitude of the envelope signal; and
generating the bias current based on the direct current and the first envelope current,” and “generating a second envelope current based on the amplified signal of the envelope signal; and
generating the bias current using the direct current and the second envelope current.”
Claims 3, 4, 7, 11, and 13 are objected to as being dependent on objected claims 2, 6, 10, and 12.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MALANE LIENG whose telephone number is (571)272-5739. The examiner can normally be reached Monday-Friday 6:30 - 4:00 CST.
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/MALANE LIENG/Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843