Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
The amendment filed on 12/15/2025 has been entered. Claims 1-20 are pending. Claims 1 and 15 have been amended. No claim is added or cancelled.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 6, 9-17, and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mamidwar et al. (US 20130235887) hereinafter Mamidwar in view of NEUGEBOREN et al. (US 20220174341) hereinafter NEUGEBOREN and further in view of Azenkot et al. (US 20020154620) hereinafter Azenkot.
Regarding claim 1, Mamidwar teaches a method, comprising: obtaining source data from a data source (i.e. the statistical multiplexer 106 receives program packets from input sources 1 `n`. The program packets may be MPEG2 TS packets, or any other type of packet, [0066]), the source data corresponding to a source clock (i.e. 100 ms of packets, 20 ms of packets, 30 ms of video data, 5 s of audio data, or any other number or timing of packets or audio/visual content, [0064] and the packets with corresponding clocks 1740, 1742, 1744, [0133]), and stored in a data buffer (i.e. The buffers 1730, 1732, and 1734 hold the packets, [0133] and the source 102 may implement a buffer feedback 504. The buffer feedback 504 informs the distributor 108 about buffer depths in the transmit buffers 502. When the buffers run empty, or at other times, the distributor 108 may insert compensation packets, e.g., before MPs, [0063]); performing a clock adjustment to a determined clock (i.e. the distributor 1710 may adjust the clock speed to synchronize the communication channels. The distributor 1710 may increase the clock speed for slower communication channels. Further, the distributor 1710 may decrease the clock speed for faster communication channels, [0142]), where the determined clock is associated with a data stream that is output from the data buffer, and the clock adjustment to equalize the source clock and the determined clock (i.e. the clock 1740 may be slightly faster than clock 1742. As such, the buffer 1730 may fill up faster than the buffer 1732. The modulator 1720 may be configured to monitor the buffer depth (e.g. the fullness of the buffer) and send a signal to the distributor 1710 indicating that the buffer depth has exceeded a predefined buffer level. The distributor may then adjust processing to synchronize the channels, [0134]).
However, Mamidwar does not explicitly disclose identifying a symbol clock associated with a buffer device; obtaining the data stream by the buffer device; in response to a drift in the determined clock relative to the symbol clock, adjusting an amount of null packets in the data stream to maintain a particular number of elements in the buffer device; in response to the particular number of elements in the buffer device satisfying a threshold in the buffer device, adjusting an amount of null packets in the data stream to synchronize the determined clock and the symbol clock.
However, NEUGEBOREN teaches identifying a symbol clock associated with a buffer device (i.e. the clock 110 of the RPD that includes a buffer, [0021]); obtaining the data stream by the buffer device (i.e. the RPD receives the video packets sent from the video core in a dejitter buffer of a processing device, [0019]); in response to a drift in the determined clock (clock 108) relative to the symbol clock (clock 110), adjusting an amount of null packets in the data stream to maintain a particular number of elements in the buffer device (i.e. the clock 108 of the video core 102 and the clock 110 of the RPD 104 are not synchronized and may therefore drift relative to each other, the packets output from the dejitter buffer 116 are forwarded to the module 118 which both adds null packets when needed, and drops packets when needed, in order to maintain the proper constant bit rate of the data received from the dejitter buffer 116. Further, after packets are added/dropped as needed, a PCR module 119 re-stamps the data packets with updated PCRs due to the removal/insertion of MPEG packets before forwarding the re-stamped packets to the PHY device 120, [0021]); and in response to the particular number of elements in the buffer device satisfying a threshold in the buffer device, adjusting an amount of null packets in the data stream to synchronize the determined clock and the symbol clock (i.e. handling mode of the RPD 104 is set to “sync.” At decision step 136, it is determined if the buffer status crosses a first threshold, as previously described. If the answer is “no” then the method proceeds to step 138 where the RPD 104 handles the video stream in “sync” mode, and then to step 140 where it is determined whether the data exits the buffer 116 at a fixed rate, and to step 142 where null packets are added to maintain a fixed bitrate entering the PHY 120, if needed, [0031] and sync (synchronous) mode, the RPD (or RMD) and its video core are synchronized in time to the same reference clock, [0117]).
Based on Mamidwar in view of NEUGEBOREN, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of NEUGEBOREN to the system of Mamidwar in order to accurately preserving timing information associated with video data transmitted in distributed access architectures, (NEUGEBOREN, [0010]).
However, Mamidwar in view of NEUGEBOREN do not explicitly disclose wherein the symbol clock includes a quadrature amplitude modulation (QAM) modulator symbol clock associated with the buffer device.
However, Azenkot teaches wherein the symbol clock includes a quadrature amplitude modulation (QAM) modulator symbol clock associated with the buffer device (i.e. symbol clock that have a quadrature amplitude modulation (QAM) modulator, [0195] and symbol clock associated with a Buffer, [0243]).
Based on Mamidwar in view of NEUGEBOREN further in view of Azenkot, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Azenkot to the system of Mamidwar and NEUGEBOREN in order to avoid noise problems have been so intractable, that they led to the ultimate failure of the system to fully live up to its promised potential, (Azenkot, [0001]).
Regarding claim 2, Mamidwar teaches correcting one or more clock reference values disposed in individual data packets in the data stream, responsive to the adjusting of the null packets in the data stream (i.e. The MP generation signal 1502 may be a command message, signal line, or other input that causes the receiving modulator to generate a MP for insertion into the packet stream, e.g., at chunk boundaries. The MP may include any desired synchronization information, including time stamps, time codes, group numbers, channel numbers, and the like. The modulator may generate the synchronization information, or the distributor 108 may provide the synchronization information to the modulator along with the MP generation signal, [0086]).
Regarding claim 3, Mamidwar does not explicitly disclose the one or more clock reference values are corrected by a frequency offset estimation determined using at least the particular number of elements in the buffer device and characteristics of the null packets in the data stream, over a time interval.
However, NEUGEBOREN teaches the one or more clock reference values are corrected by a frequency offset estimation determined using at least the particular number of elements in the buffer device and characteristics of the null packets in the data stream, over a time interval (i.e. selectively re-stamps Program Clock Reference (PCR) values to the packets in async mode and selectively use an offset value to restamp the PCR values, claims 3 and 4 and changing from async mode to sync mode using the determined amount of synchronization and a determined offset of a fullness of a jitter buffer in the device from a predetermined amount of fullness, claim 19). Therefore, the limitations of claim 3 are rejected in the analysis of claim 2 above, and the claim is rejected on that basis.
Regarding claim 6, Mamidwar teaches the one or more clock reference values are corrected by a delta clock reference value determined using at least characteristics of the null packets in the data stream (i.e. in the worst case, two channels in a bonded channel group may have a clock difference of 400 ppm. As shown in the example in FIG. 5, the timing different from channel 1 to channel 2 is 200 ppm, and the timing difference between channel 1 and channel `m` is 400 ppm. The timing difference of 400 ppm may amount to as much as one 188 byte MPEG2 TS packet every 2500 outgoing packets. Accordingly, the source 102 may insert a compensation packet (which may have NULL content) on channel `m` every 2500 packets to cover the extra outgoing packet, and also insert a compensation packet on channel 2 every 5000 packets for the same reason, [0061]-[0062].
Regarding claim 9, Mamidwar teaches the clock adjustment is determined to be performed in response to an amount of the source data in the data buffer satisfying a buffer data threshold amount (i.e. the clock 1740 may be slightly faster than clock 1742. As such, the buffer 1730 may fill up faster than the buffer 1732. The modulator 1720 may be configured to monitor the buffer depth (e.g. the fullness of the buffer) and send a signal to the distributor 1710 indicating that the buffer depth has exceeded a predefined buffer level. The distributor may then adjust processing to synchronize the channels, [0134] and in this manner, the signals 1760, 1762, 1764 may operate as a feedback signal from the modulator for synchronizing the communication channels, [0136]).
Regarding claim 10, Mamidwar teaches the clock adjustment further comprises: monitoring an input buffer rate associated with the source data stored in the data buffer (i.e. buffer 1730, 1732, and 1734. The buffers 1730, 1732, and 1734 hold the packets and/or communication units provided to the communication channel until they can be transmitted to the receiving device 1748. In addition, each channel 1720, 1722, 1724 are driven by corresponding clocks 1740, 1742, 1744. Each clock 1740, 1742, 1744 may be independent and, therefore, may vary slightly due to manufacturing variability or even system design, [0133] and the clock 1740 may be slightly faster than clock 1742. As such, the buffer 1730 may fill up faster than the buffer 1732. The modulator 1720 may be configured to monitor the buffer depth (e.g. the fullness of the buffer) and send a signal to the distributor 1710 indicating that the buffer depth has exceeded a predefined buffer level. The distributor may then adjust processing to synchronize the channels, [0134]; monitoring an output buffer rate associated with the data stream output from the data buffer, ([0133]-0134); and adjusting the determined clock to cause an amount of source data in the data buffer to converge to a predetermined threshold, where the input buffer rate and the output buffer rate are equalized (i.e. the distributor 1710 may adjust the clock speed to synchronize the communication channels. The distributor 1710 may increase the clock speed for slower communication channels. Further, the distributor 1710 may decrease the clock speed for faster communication channels, [0142]).
Regarding claim 11, Mamidwar does not explicitly disclose a change to the particular number of elements in the buffer device is caused by a difference between the symbol clock and the determined clock.
However, NEUGEBOREN teaches a change to the particular number of elements in the buffer device is caused by a difference between the symbol clock and the determined clock (i.e. a suitable first threshold could be a maximum average change (plus or minus) in a fullness status of the buffer from a predefined standard operating level. The RPD 104 may therefore measure the fullness state of the buffer, in some embodiments optionally averaging it or otherwise applying a filter to eliminate temporary spikes of network jitter, and if the measured value crosses a predefined first threshold of change, the stream is assumed to be out of sync, [0026] and out of sync means the clock 108 of the video core 102 and the clock 110 of the RPD 104 are not synchronized and may therefore drift relative to each other, [000021]). Therefore, the limitations of claim 11 are rejected in the analysis of claim 1 above, and the claim is rejected on that basis.
Regarding claim 12, Mamidwar does not explicitly disclose the data source is a video server, a video core, or a CCAP core with video broadcast functionality integrated in a distributed access architecture (DAA) in Hybrid-Fiber Cable (HFC) network and the source data is moving picture experts group (MPEG) data.
However, NEUGEBOREN teaches the data source is a video server, a video core, or a CCAP core with video broadcast functionality integrated in a distributed access architecture (DAA) in Hybrid-Fiber Cable (HFC) network and the source data is moving picture experts group (MPEG) data (i.e. the subject matter of this application generally relates to the delivery of video content using distributed access architectures (DAA) of a hybrid CATV network, [0002] and in Distributed Access Architectures for delivery of video content, two modes of video handling may be used—synchronous mode and asynchronous mode. Typically, network devices have hardware capable of operating in either mode, with software that enables configuration by a video core of itself and connected downstream devices into either alternate one of these modes when setting up video channels. In sync (synchronous) mode, the RPD (or RMD) and its video core are synchronized in time to the same reference clock. In this sync mode the RPD is required merely to detect lost video packets using the Layer 2 Tunneling Protocol v. 3 (L2TPv3) sequence number monitoring, and insert MPEG null packets for each missing packet, [0017]). Therefore, the limitations of claim 12 are rejected in the analysis of claim 1 above, and the claim is rejected on that basis.
Regarding claim 13, Mamidwar does not explicitly disclose in response to the particular number of elements in the buffer device satisfying an upper threshold amount in the buffer device, dropping one or more of the null packets from the data stream.
However, NEUGEBOREN teaches in response to the particular number of elements in the buffer device satisfying an upper threshold amount in the buffer device, dropping one or more of the null packets from the data stream (i.e. If, at step 136, it is determined that the buffer state exceeds the first threshold, the method then proceeds to step 144 where the RPD handing mode is set to “async.” Then at step 146 null packets are deleted and at step 148 PCR stamps for the packets are adjusted due to removed packets, [0032]). Therefore, the limitations of claim 13 are rejected in the analysis of claim 1 above, and the claim is rejected on that basis.
Regarding claim 14, Mamidwar does not explicitly disclose in response to the particular number of elements in the buffer device satisfying a lower threshold amount in the buffer device, inserting one or more of the null packets into the data stream.
However, NEUGEBOREN teaches in response to the particular number of elements in the buffer device satisfying a lower threshold amount in the buffer device, inserting one or more of the null packets into the data stream (i.e. If, at step 136, it is determined that the buffer state exceeds the first threshold, the method then proceeds to step 144 where the RPD handing mode is set to “async.” Then at step 146 null packets are added at step 148 PCR stamps for the packets are adjusted due to added packets, [0032] and it is determined whether the status of the buffer 116 crosses the second threshold. If it does not, the procedure reverts to step 144, [0033]). Therefore, the limitations of claim 14 are rejected in the analysis of claim 1 above, and the claim is rejected on that basis.
Regarding claims 15-17 and 19-20, the limitations of claims 15-17 and 19-20 are similar to the limitations of claims 1-3 and 13-14. Mamidwar further teaches a device (i.e. A system, claim 1) comprising: a data buffer (i.e. The destination 104 may include First In First Out (FIFO) buffers 304, or, [0051]), a clock adjustment device (i.e. the distributor 1710 may adjust the clock speed, [0142]); a buffer device (i.e. other types of memory, to counter jitter/skew, [0051]). Therefore, the limitations of claims 15-17 and 19-20 are rejected in the analysis of claims 1-3 and 13-14 above, and the claims are rejected on that basis.
Claim(s) 4-5, 7-8, and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mamidwar et al. (US 20130235887) hereinafter Mamidwar in view of NEUGEBOREN et al. (US 20220174341) hereinafter NEUGEBOREN and Azenkot et al. (US 20020154620) hereinafter Azenkot and further in view of in view of KWON et al. (US 20190261047) hereinafter KWON.
Regarding claim 4, Mamidwar in view of NEUGEBOREN and further in view of Azenkot teach the limitations of claims 1 and 3 above.
However, Mamidwar in view of NEUGEBOREN and further in view of Azenkot do not explicitly disclose the characteristics of the null packets comprises a total number of null packets inserted, a total number of null packets dropped, and a duration associated with the null packets.
However, KWON teaches the characteristics of the null packets comprises a total number of null packets inserted, a total number of null packets dropped, and a duration associated with the null packets (i.e. the header compression block may compress a header of an input signal based on a header compression mode. The null packet deletion block 16000 according to an embodiment of the present invention may delete input null packets and insert information about the number of deleted null packets based on positions thereof, before transmission, [1262] and if null packet position reconfigurable region information is acquired, a broadcast signal transmission apparatus according to an embodiment of the present invention may count a total number of null packets (N.sub.NP) included in a corresponding period and a total number of data packets (N.sub.TSP) to be transmitted, [1280]).
Based on Mamidwar in view of NEUGEBOREN and Azenkot and further in view of KWON, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of KWON to the system of Mamidwar, NEUGEBOREN and Azenkot in order to improve packets transmission accuracy of Mamidwar, NEUGEBOREN and Azenkot system.
Regarding claim 5, Mamidwar in view of NEUGEBOREN and further in view of Azenkot teach the limitations of claims 1 and 3 above.
However, Mamidwar in view of NEUGEBOREN and further in view of Azenkot do not explicitly disclose the corrected clock reference values are distributed between at least a data packet in the data stream associated with a first null packet adjustment and a subsequent data packet in the data stream associated with a second null packet adjustment.
However, KWON teaches the corrected clock reference values are distributed between at least a data packet in the data stream associated with a first null packet adjustment and a subsequent data packet in the data stream associated with a second null packet adjustment (i.e. the input stream synchronizer block 3100 can transmit input stream clock reference (ISCR) information to generate timing information necessary for the apparatus for receiving broadcast signals to restore the TSs or GSs, [0227] and A null packet insertion block 13100 can restore a null packet removed from a stream with reference to a restored DNP (deleted null packet) and output common data, [0354], a TS clock regeneration block 13200 can restore time synchronization of output packets based on ISCR (input stream time reference) information and A TS recombining block 13300 can recombine the common data and data pipes related thereto, output from the null packet insertion block 13100, to restore the original MPEG-TSs, IP streams (v4 or v6) or generic streams. The TTO, DNT and ISCR information can be obtained through the BB frame header, [0356]).
Based on Mamidwar in view of NEUGEBOREN and Azenkot and further in view of KWON, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of KWON to the system of Mamidwar, NEUGEBOREN and Azenkot in order to improve packets transmission accuracy of Mamidwar, NEUGEBOREN and Azenkot system.
Regarding claim 7, Mamidwar in view of NEUGEBOREN and further in view of Azenkot teach the limitations of claims 1 and 6 above.
However, Mamidwar in view of NEUGEBOREN and further in view of Azenkot do not explicitly disclose the characteristics of the null packets comprises a duration associated with the null packets, an average time interval between the null packet adjustments, a first time stamp associated with the clock reference value correction, a second time stamp associated with a null packet adjustment, and a time shift associated with a previous null packet adjustment.
However, KWON teaches the characteristics of the null packets comprises a duration associated with the null packets (i.e. The duration of the guard interval shown in FIGS. 100(B) and 100(C) is conceptually identical to the guard interval length shown in FIG. 99. In accordance with the embodiment of the present invention, 25 μs, 50 μs, 100 μs, 200 μs, and 400 μs values may be used in consideration of the maximum delay spread, and the FFT size may be set to 8K, 16K and 32K, [1122]), an average time interval between the null packet adjustments (i.e. the present invention may count a total number of null packets (N.sub.NP) included in a corresponding period and a total number of data packets (N.sub.TSP) to be transmitted. As illustrated in FIG. 124(a), the total number of data packets is 8 and the total number of null packets corresponds to 958. AVRnP refers to an average number of null packets spreadable between the data packets within the corresponding period, [1280]), a first time stamp associated with the clock reference value correction (i.e. the chirp-like sequence is composed of signals having different periods and provide correct symbol timing information, [0539]), a second time stamp associated with a null packet adjustment (i.e. The null packet deletion block 16000 according to an embodiment of the present invention may delete input null packets and insert information about the number of deleted null packets based on positions thereof and time-stamp, [1262]), and a time shift associated with a previous null packet adjustment (i.e. a register reset process in order to output 2.sup.n symbol indexes including 0 and set a register initial value for a register shifting process, [0436] and the receiver may expect a service data acquisition time gain corresponding to the difference between the length of the signal frame and the length of the PLS_offset portion, [0917]).
Based on Mamidwar in view of NEUGEBOREN and Azenkot and further in view of KWON, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of KWON to the system of Mamidwar, NEUGEBOREN and Azenkot in order to improve packets transmission accuracy of Mamidwar, NEUGEBOREN and Azenkot system.
Regarding claim 8, Mamidwar in view of NEUGEBOREN and further in view of Azenkot teach the limitations of claims 1 and 6 above.
However, Mamidwar in view of NEUGEBOREN and further in view of Azenkot do not explicitly disclose the corrected clock reference values are distributed between at least a data packet in the data stream associated with a first null packet adjustment and a subsequent data packet in the data stream associated with a second null packet adjustment.
However, KWON teaches the corrected clock reference values are distributed between at least a data packet in the data stream associated with a first null packet adjustment and a subsequent data packet in the data stream associated with a second null packet adjustment the input stream synchronizer block 3100 can transmit input stream clock reference (ISCR) information to generate timing information necessary for the apparatus for receiving broadcast signals to restore the TSs or GSs, [0227] and A null packet insertion block 13100 can restore a null packet removed from a stream with reference to a restored DNP (deleted null packet) and output common data, [0354]-[0356].
Based on Mamidwar in view of NEUGEBOREN and Azenkot and further in view of KWON, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of KWON to the system of Mamidwar, NEUGEBOREN and Azenkot in order to improve packets transmission accuracy of Mamidwar, NEUGEBOREN and Azenkot system.
Regarding claim 18, the limitations of claim 18 are similar to the limitations of claim 5. Therefore, the limitations of claim 18 are rejected in the analysis of claim 5 above, and the claim is rejected on that basis.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AYELE F WOLDEMARIAM whose telephone number is (571)270-5196. The examiner can normally be reached M_F 8:30AM-5:00PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joon H Hwang can be reached on 571-272-4036. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/AW/
AYELE F. WOLDEMARIAM
Examiner
Art Unit 2447
2/5/2026
/SURAJ M JOSHI/Primary Examiner, Art Unit 2447