DETAILED ACTION
This action is in response to the Election 01/14/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 02/02/2024 is/are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) is/are being considered by the examiner.
Priority
Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d).
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Election/Restrictions
Applicant’s election without traverse of Invention I in the reply filed on 01/14/2026 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over US Patent No. 9,124,177; (hereinafter Zhu).
Regarding claim 1, Zhu [e.g. Figs. 1 - 3] discloses a switching converter, comprising: a power stage circuit [e.g. synchronous rectifier], which is configured to operably switch at least one switch of the power stage circuit [e.g. high side switch 110] according to a control signal [e.g. PWM], to convert an input voltage [e.g. DC input] to an output voltage [e.g. DC output; a buck converter steps down the input voltage to provide a stepped down output voltage]; and a control circuit [e.g. 135], which is configured to operably execute modulation on a pulse width [e.g. PWM corresponds to pulse width modulation] according to a feedback voltage [e.g. input voltage of 140] related to the output voltage [e.g. see divided voltage by Z derived from OUTPUT], to generate the control signal in a heavy load status [e.g. Fig. 2; PWM Switch 210].
Zhu, Fig. 1 fails to disclose wherein in a case where a light load status is in the presence and in a case where the switching converter operates at a discontinuous conduction mode (DCM), after an inductor current flowing through the power stage circuit has already become a zero current, the control circuit is configured to operably cease executing modulation on the pulse width according to the feedback voltage and keep a compensation voltage correlated with the output voltage at a present level.
Zhu [e.g. Figs. 4 - 8] teaches wherein in a case where a light load status is in the presence and in a case where the switching converter operates at a discontinuous conduction mode (DCM) [e.g. Fig. 4; DCM], after an inductor current flowing through the power stage circuit has already become a zero current [e.g. col. 3, lines 64 – 67 recite “The CCM-DCM transition may also be determined by zero crossings. When the inductor current is zero for N consecutive PWM cycles, the converter is determined to have entered DCM mode”], the control circuit [e.g. Fig. 7; 700] is configured to operably cease executing modulation on the pulse width [e.g. Fig. 4; see PWM 460 at DCM] according to the feedback voltage [e.g. Fig. 7; see COMP with respect to the divided voltage of Fig. 1] and keep a compensation voltage [e.g. Fig. 7; RAMPf] correlated with the output voltage [e.g. col. 6, lines 45 – 46 recite “falling ramp clamp signal 730 is proportional to the output voltage”] at a present level [e.g. col. 6, lines 14 – 24 recite “”In block 830, a determination is made as to whether the converter is operating in DCM. In an example embodiment, a zero crossing detector is used to determine if the inductor current goes to zero for a number of oscillator clock cycles. If the converter is in DCM, for example, if the inductor current is zero for a number of oscillator clock cycles, in block 840, the falling ramp is clamped. … the falling ramp may be clamped to a constant clamp voltage value].
It would have been obvious to one having ordinary skill in the art before the effective filing date to modify Zhu, Fig.1 by wherein in a case where a light load status is in the presence and in a case where the switching converter operates at a discontinuous conduction mode (DCM), after an inductor current flowing through the power stage circuit has already become a zero current, the control circuit is configured to operably cease executing modulation on the pulse width according to the feedback voltage and keep a compensation voltage correlated with the output voltage at a present level as taught by Zhu, Figs. 4-8 in order of being able to provide a smooth light load operation which may enable smooth discontinuous conduction mode (DCM)/continuous conduction mode (CCM) transition and may also avoid the generation of sub-harmonics during light load operation, col. 3, lines 41 – 46.
Regarding claim 22, Zhu [e.g. Figs. 1 - 3] discloses a control method for operably control a switching converter [e.g. 100], wherein the switching converter includes: a power stage circuit [e.g. synchronous rectifier], which is configured to operably switch at least one switch of the power stage circuit [e.g. high side switch 110] according to a control signal [e.g. PWM], to convert an input voltage [e.g. DC input] to an output voltage [e.g. DC output; a buck converter steps down the input voltage to provide a stepped down output voltage]; the control method comprising following steps: in a heavy load status [e.g. Fig. 2; PWM Switch 210], executing modulation on a pulse width [e.g. PWM corresponds to pulse width modulation] according to a feedback voltage [e.g. input voltage of 140] related to the output voltage [e.g. see divided voltage by Z derived from OUTPUT], to generate the control signal.
Zhu, Fig. 1 fails to disclose operating at a discontinuous conduction mode (DCM); in a case where a light load status is in the presence and in a case where the switching converter operates at the discontinuous conduction mode (DCM), after an inductor current flowing through the power stage circuit has already become a zero current, ceasing executing modulation on the pulse width according to the feedback voltage and keeping a compensation voltage correlated with the output voltage at a present level.
Zhu [e.g. Figs. 4 - 8] discloses operating at a discontinuous conduction mode (DCM) [e.g. Fig. 4; DCM]; in a case where a light load status is in the presence and in a case where the switching converter operates at the discontinuous conduction mode (DCM), after an inductor current flowing through the power stage circuit has already become a zero current [e.g. col. 3, lines 64 – 67 recite “The CCM-DCM transition may also be determined by zero crossings. When the inductor current is zero for N consecutive PWM cycles, the converter is determined to have entered DCM mode”], ceasing executing modulation on the pulse width [e.g. Fig. 4; see PWM 460 at DCM] according to the feedback voltage [e.g. Fig. 7; see COMP with respect to the divided voltage of Fig. 1] and keeping a compensation voltage [e.g. Fig. 7; RAMPf] correlated with the output voltage [e.g. col. 6, lines 45 – 46 recite “falling ramp clamp signal 730 is proportional to the output voltage”] at a present level [e.g. col. 6, lines 14 – 24 recite “”In block 830, a determination is made as to whether the converter is operating in DCM. In an example embodiment, a zero crossing detector is used to determine if the inductor current goes to zero for a number of oscillator clock cycles. If the converter is in DCM, for example, if the inductor current is zero for a number of oscillator clock cycles, in block 840, the falling ramp is clamped. … the falling ramp may be clamped to a constant clamp voltage value].
It would have been obvious to one having ordinary skill in the art before the effective filing date to modify Zhu, Fig.1 by operating at a discontinuous conduction mode (DCM); in a case where a light load status is in the presence and in a case where the switching converter operates at the discontinuous conduction mode (DCM), after an inductor current flowing through the power stage circuit has already become a zero current, ceasing executing modulation on the pulse width according to the feedback voltage and keeping a compensation voltage correlated with the output voltage at a present level as taught by Zhu, Figs. 4-8 in order of being able to provide a smooth light load operation which may enable smooth discontinuous conduction mode (DCM)/continuous conduction mode (CCM) transition and may also avoid the generation of sub-harmonics during light load operation, col. 3, lines 41 – 46.
Examiner's Note
Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Allowable Subject Matter
Claims 12 – 21 are allowed.
Claims 2 – 11 and 23 – 31 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The primary reason for the indication of the allowability of claim 2 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “a light load detection circuit, wherein after the inductor current flowing through the power stage circuit has already become the zero current, the light load detection circuit is configured to operably decide an occurrence time point of a zero current operation and the light load detection circuit is configured to operably decide a termination time point of the zero current operation based upon the feedback comparison signal”.
The primary reason for the indication of the allowability of claim 12 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “a light load detection circuit, wherein after the inductor current flowing through the power stage circuit has already become the zero current, the light load detection circuit is configured to operably decide an occurrence time point of a zero current operation and the light load detection circuit is configured to operably decide a termination time point of the zero current operation based upon the feedback comparison signal”.
The primary reason for the indication of the allowability of claim 23 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “after the inductor current flowing through the power stage circuit has already become the zero current, deciding an occurrence time point of a zero current operation and deciding a termination time point of the zero current operation based upon the feedback comparison signal”.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alex Torres-Rivera whose telephone number is (571)272-5261. The examiner can normally be reached M-F 9:00-5:30 ET.
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/ALEX TORRES-RIVERA/Primary Examiner, Art Unit 2838