Office Action Predictor
Last updated: April 15, 2026
Application No. 18/495,863

METHODS AND DEVICES FOR ANALYZING A DEVICE-UNDER-TEST

Non-Final OA §101§112
Filed
Oct 27, 2023
Examiner
ALEJNIKOV JR, ROBERT P
Art Unit
2857
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohde & Schwarz GMBH & CO. Kg
OA Round
4 (Non-Final)
86%
Grant Probability
Favorable
4-5
OA Rounds
2y 5m
To Grant
95%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
310 granted / 361 resolved
+17.9% vs TC avg
Moderate +9% lift
Without
With
+8.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
24 currently pending
Career history
385
Total Applications
across all art units

Statute-Specific Performance

§101
6.0%
-34.0% vs TC avg
§103
42.1%
+2.1% vs TC avg
§102
24.8%
-15.2% vs TC avg
§112
23.0%
-17.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 361 resolved cases

Office Action

§101 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 2/17/2026 has been entered. Response to Amendment Claims 1-4, 6, 7, 10-12, and 15-19 are pending for examination. The applicant has amended claims 1, 3, 4, 10, 15, and 16. § 112(a) Rejections The applicant’s arguments regarding rejections under § 112(a) are persuasive except for those of record for claims 17 & 18. As to those claims, the applicant essentially argues that the subject matter of those claims is “per se clear” “for the person skilled in the art” as to how embedding/de-embedding a result of a TDR measurement from a waveform signal is achieved. The examiner respectfully disagrees. As stated in the Final Rejection dated 9/25/2025, that information is not found in the specification; it also is not “per se clear” “for the person skilled in the art” from the specification as filed that the applicant had possession of the invention at the time of filing. Therefore, claims 17 & 18 stand rejected on those grounds. § 101 Rejections The applicant argues that the amended claims are patent-eligible. The amendments add two main elements to the independent claims: clock-data recovery and jitter analysis. In terms of patent eligibility analysis, clock-data recovery is data gathering and jitter analysis is mathematics. Therefore, the amendments do not make the claims patent-eligible. The applicant also appears to argue that the lack of prior art rejections tends to prove a technological improvement in signal integrity analysis. However, “a claim for a new abstract idea is still an abstract idea.” Synopsys, Inc. v. Mentor Graphics Corp., 839 F.3d 1138, 1151 (Fed. Cir. 2016). Because the claim is still directed to an abstract idea, the argument that part of the claim is novel is inapposite. Finally, the applicant repeats the argument made previously that overlaying eye diagrams is a “physical-technical process . . . not a mental process.” In response, the examiner incorporates by reference the prior responses to this argument and states simply that, once the appropriate data has been gathered, making the eye diagrams and overlaying them can be done with the human mind (with the aid of pen and paper). Therefore, the amended claims stand rejected. The examiner earnestly believes that the claims, having been rejected at least twice, are ripe for appeal. The applicant and the examiner have set forth a well-defined and good-faith difference of opinion on the record as to the eligibility of the subject matter at the heart of the applicant’s invention and no prior art of record teaches or fairly suggests that subject matter. The applicant’s specification does not contain sufficient detail to allow for a particular machine to be claimed in order to rely on structure to make the claims eligible. Therefore, at this juncture, an appeal may be in the best interests of both the applicant and the public for a final determination as to the patent eligibility of the claimed subject matter. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 17 & 18 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claims 17 and 18 lines 2-3 recite, respectively, “wherein the step of determining the output waveform comprises embedding a result of the TDR measurement with a near end version of the waveform signal” and “wherein the step of determining the output waveform comprises de-embedding a result of the TDR measurement from a far end version of the waveform signal.” However, the specification is silent as to what applicant means by these limitations, i.e., how embedding or “de-embedding” a result of a TDR measurement from a waveform signal is achieved. Therefore, the applicant has not fulfilled the written description requirement by demonstrating that the applicant had possession of the claimed invention at the time of filing. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-4, 6, 7, 10-12, and 15-19 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. INDEPENDENT CLAIM 1 et seq. Step 1: Is the Claim to a Process, Machine, Manufacture or Composition of Matter? Claims 1-4, 6, 7, 10-12, and 15-18 recite a method for analyzing a device-under-test. Thus, these claims are to a process, which is one of the statutory categories of invention. Claim 19 recites a measurement system for analyzing a device-under-test. Thus, this claim is to a machine, which is one of the statutory categories of invention. Step 2A: Prong One: Does the Claim Recite an Abstract Idea? Claim 1 recites: 1. A method for analyzing a device-under-test (DUT) wherein the method comprises the steps of: feeding a radio frequency (RF) signal to the DUT, obtaining, using an oscilloscope, an input signal waveform of the signal fed to the DUT or an output signal waveform of a signal outputted by the DUT, measuring, using a vector network analyzer (VNA), scattering parameters of the DUT, calculating an output signal waveform in the case that the input signal waveform is obtained or an input signal waveform in the case that the output signal waveform is obtained by applying the measured scattering parameters to the input signal waveform in the case that the input signal waveform is obtained or to the output signal waveform in the case that the output signal waveform is obtained and/or stored, [examiner finds these elements to be Mathematical concepts – mathematical relationships, mathematical formulas or equations, mathematical calculations] obtaining clock data from the calculated output signal waveform in the case that the input signal waveform is obtained or from the calculated input signal waveform in the case that the output signal waveform is obtained, [the examiner finds that this clock data is determined or calculated from the output waveform (see ¶ [0027] of the specification) and therefore falls under Mathematical concepts – mathematical relationships, mathematical formulas or equations, mathematical calculations] produce an eye diagram representation of the calculated output signal waveform in the case that the input signal waveform is obtained and/or stored or of the calculated input signal waveform in the case that the output signal waveform is obtained and/or stored using the obtained clock; obtaining analysis data of the scattering parameters of the DUT, comprising: determining a group delay of the output signal waveform, determining clock data of the input signal waveform using the obtained clock data of the output signal waveform and the determined group delay of the output signal; produce an eye diagram representation of the input signal waveform and the determined output signal waveform using the determined clock data of the input signal waveform and the obtained clock data of the output signal waveform; slicing the output waveform to form first frames and aligning the first frames to obtain a first eye diagram, and slicing the waveform signal input to the DUT to form second frames and aligning the second frames to obtain a second eye diagram, wherein for forming said first frames and said second frames, clock-data recovery is applied to determine corresponding timing information, overlaying the first and the second eye diagram, and performing a jitter analysis on the basis of the overlay of the first and the second eye diagram [examiner finds these elements to be Mathematical concepts – mathematical relationships, mathematical formulas or equations, mathematical calculations]. Step 2A: Prong Two: Does the Claim Recite Additional Elements That Integrate The Abstract Idea Into a Practical Application? The elements that are not underlined above are the additional elements. The examiner finds that each of the following additional elements merely adds insignificant extra-solution activity to the abstract idea: “Obtaining, especially using an oscilloscope, and/or storing an input signal waveform of the signal fed to the DUT or an output signal waveform of a signal outputted by the DUT,” [the examiner finds these elements to be data gathering] “Measuring, especially using a VNA, scattering parameters of the DUT,” [the examiner finds these elements to be data gathering] “produce an eye diagram representation of the calculated output signal waveform in the case that the input signal waveform is obtained and/or stored or of the calculated input signal waveform in the case that the output signal waveform is obtained and/or stored using the obtained clock” [the examiner finds these elements to be insignificant extra-solution activity because it is a mere nominal or tangential addition to the claim and post-solution activity; see MPEP § 2106.05(g)] obtaining analysis data of the scattering parameters of the DUT, [the examiner finds these elements to be data gathering] determining a group delay of the output signal waveform, [the examiner finds these elements to be data gathering] determining clock data of the input signal waveform using the obtained clock data of the output signal waveform and the determined group delay of the output signal; [the examiner finds these elements to be data gathering] slicing the output waveform to form first frames and aligning the first frames to obtain a first eye diagram, and [slicing can be done mentally or with the aid of pen and paper and therefore is a mental process] slicing the waveform signal input to the DUT to form second frames and aligning the second frames to obtain a second eye diagram, [slicing can be done mentally or with the aid of pen and paper and therefore is a mental process] wherein for forming said first frames and said second frames, clock-data recovery is applied to determine corresponding timing information, [the examiner finds these elements to be data gathering] overlaying the first and the second eye diagram [overlaying can be done mentally or with the aid of pen and paper and therefore is a mental process, and alternatively, overlaying is a mathematical relationship between the collected data]. The examiner finds that each of the following additional elements does no more than generally link the use of the abstract idea to a particular technological environment or field of use: “feeding a radio frequency (RF) signal to the DUT.” Thus, taken alone, the additional elements do not integrate the abstract idea into a practical application. Looking at the limitations as an ordered combination adds nothing that is not already present when looking at the elements taken individually. For example, there is no indication that the combination of elements improves the functioning of a computer or improves any other technology. Step 2B: Does the Claim Recite Additional Elements That Amount to Significantly More Than the Abstract Idea? The examiner finds that the additional elements do not amount to significantly more than the abstract idea for the same reasons discussed above with respect to the conclusion that the additional elements do not integrate the abstract idea into a practical application. More specifically with regard to the limitation “produce an eye diagram representation of the calculated output signal waveform in the case that the input signal waveform is obtained and/or stored or of the calculated input signal waveform in the case that the output signal waveform is obtained and/or stored using the obtained clock,” the examiner recognizes that the applicant states that these elements are well-understood, routine, and conventional (see, e.g., specification as filed ¶ [0002]: “Eye diagrams as intuitive graphical representations of electrical or optical digital communication signal are known”). Regarding claim 2, the additional element “wherein the DUT is a filter or a cable such as e.g. a USB cable” does not amount to significantly more than the abstract idea because it does no more than generally link the use of the abstract idea to a particular technological environment or field of use. Regarding claim 3, the additional element “wherein the RF signal is fed to a near end or a far end of the DUT, the DUT being a cable” does not amount to significantly more than the abstract idea because it does no more than generally link the use of the abstract idea to a particular technological environment or field of use. Regarding claim 4, the additional element “the step of measuring the scattering parameters of the DUT comprises applying a TDR measurement to the DUT” does not amount to significantly more than the abstract idea because it is insignificant extra-solution activity (data gathering). Regarding claim 6, the additional element “wherein the step of obtaining the input signal comprises receiving the waveform signal in real time when being input to the DUT or receiving the waveform signal as a stored file” does not amount to significantly more than the abstract idea because it is insignificant extra-solution activity (data gathering). Claim 7 merely extends the abstract idea identified above for claim 1 and do not add any further additional elements. Therefore, the claims are considered to be directed to the abstract idea analogously to claim 1 above. Regarding claim 19, the additional element “a measurement system for analyzing a device-under-test, DUT, configured to perform the method according to claim 1” does not amount to significantly more than the abstract idea because it does no more than generally link the use of the abstract idea to a particular technological environment or field of use. INDEPENDENT CLAIM 10 et seq. Step 1: Is the Claim to a Process, Machine, Manufacture or Composition of Matter? Claims 10-12 and 15-18 recite a series of steps for analyzing a device-under-test. Thus, these claims are to a process, which is one of the statutory categories of invention. Step 2A: Prong One: Does the Claim Recite an Abstract Idea? Claim 10 recites: 10. A method for analyzing a device-under-test (DUT), wherein the method comprises the steps of: obtaining an output waveform of the DUT, said output waveform being output by the DUT in response to a waveform signal being input to the DUT, obtaining using a vector network analyzer (VNA), clock data from the output waveform, determining a group delay of the output waveform, [the examiner finds that these elements are Mathematical concepts – mathematical relationships, mathematical formulas or equations, mathematical calculations] determining clock data of the waveform signal input to the DUT using the obtained clock data of the output waveform and the determined group delay of the output waveform, [the examiner finds that these elements are Mathematical concepts – mathematical relationships, mathematical formulas or equations, mathematical calculations] obtaining analysis data by comparing the waveform signal input to the DUT and the determined output waveform using the determined clock data of the waveform signal input to the DUT and the obtained clock data of the output waveform, [the examiner finds that these elements are Mental processes – concepts performed in the human mind (including an observation, evaluation, judgment, opinion)] slicing the output waveform to form first frames and aligning the first frames to obtain a second eye diagram; slicing the waveform signal input to the DUT to form second frames and aligning the second frames to obtain a second eye diagram, wherein for forming said first frames and said second frames, clock-data recovery is applied to determine corresponding timing information, overlaying the first and the second eye diagram, and performing a jitter analysis on the basis of the overlay of the first and the second eye diagram [the examiner finds that these elements are Mathematical concepts – mathematical relationships, mathematical formulas or equations, mathematical calculations]. Step 2A: Prong Two: Does the Claim Recite Additional Elements That Integrate The Abstract Idea Into a Practical Application? The elements that are not underlined above are the additional elements. The examiner finds that each of the following additional elements merely adds insignificant extra-solution activity to the abstract idea: “determining an output waveform of the DUT, said output waveform being output by the DUT in response to a waveform signal being input to the DUT,” [the examiner finds these elements to be data gathering] “obtaining clock data from the output waveform,” [the examiner finds these elements to be data gathering] slicing the output waveform to form first frames and aligning the first frames to obtain a second eye diagram; [slicing can be done mentally or with the aid of pen and paper and therefore is a mental process] slicing the waveform signal input to the DUT to form second frames and aligning the second frames to obtain a second eye diagram, [slicing can be done mentally or with the aid of pen and paper and therefore is a mental process] wherein for forming said first frames and said second frames, clock-data recovery is applied to determine corresponding timing information, [the examiner finds these elements to be data gathering] wherein the step of obtaining the analysis data comprises the step of overlaying the first and the second eye diagram [overlaying can be done mentally or with the aid of pen and paper and therefore is a mental process; alternatively, overlaying is a mathematical relationship between the collected data] Thus, taken alone, the additional elements do not integrate the abstract idea into a practical application. Looking at the limitations as an ordered combination adds nothing that is not already present when looking at the elements taken individually. For example, there is no indication that the combination of elements improves the functioning of a computer or improves any other technology. Step 2B: Does the Claim Recite Additional Elements That Amount to Significantly More Than the Abstract Idea? The examiner finds that the additional elements do not amount to significantly more than the abstract idea for the same reasons discussed above with respect to the conclusion that the additional elements do not integrate the abstract idea into a practical application. Regarding claim 11, the additional element “wherein the waveform signal input to the DUT is received in real time when being input to the DUT or received as a stored file” does not amount to significantly more than the abstract idea because it is insignificant extra-solution activity (data gathering). Regarding claim 12, the additional element “wherein the clock data of the output waveform are obtained from a timing of edges and a symbol rate of the output waveform and the clock data of the waveform signal input to the DUT are determined from a timing of edges and a symbol rate of the waveform signal input to the DUT” does not amount to significantly more than the abstract idea because it is insignificant extra-solution activity (data gathering). Regarding claim 15, the additional element “wherein the step of determining the output waveform of the DUT comprises the steps of obtaining the waveform signal input to the DUT, measuring scattering parameters of the DUT,” does not amount to significantly more than the abstract idea because it is insignificant extra-solution activity (data gathering) while the additional element “determining the output waveform by applying the measured scattering parameters to the input signal” does not amount to significantly more than the abstract idea because it is a mathematical concept (mathematical relationships, mathematical formulas or equations, mathematical calculations). Regarding claim 16, the additional element “the step of measuring the scattering parameters of the DUT comprises applying a TDR measurement to the DUT” does not amount to significantly more than the abstract idea because it is insignificant extra-solution activity (data gathering). Regarding claim 17, the additional element “the step of determining the output waveform comprises embedding a result of the TDR measurement with a near end version of the waveform signal” does not amount to significantly more than the abstract idea because it is insignificant extra-solution activity (data gathering). Regarding claim 18, the additional element “the step of determining the output waveform comprises de-embedding a result of the TDR measurement from a far end version of the waveform signal” does not amount to significantly more than the abstract idea because it is insignificant extra-solution activity (data gathering). Allowable Subject Matter Based on the examiner’s search, the closest prior art of record is: United States Patent No. 7,110,898 to Montijo et al., which discloses a method for digitally acquiring and compensating signals; and the applicant’s admitted prior art contained in the descriptions of the state of the art and what is conventional in the art, especially in PgPub 2025/0138089 ¶¶ [0040]-[0043]. However, the examiner makes no prior art rejections at this time because the prior art does not teach or fairly suggest: in claim 1, “A method for analyzing a device-under-test (DUT) wherein the method comprises the steps of . . . slicing the output waveform to form first frames and aligning the first frames to obtain a first eye diagram, slicing the waveform signal input to the DUT to form second frames and aligning the second frames to obtain a second eye diagram, wherein for forming said first frames and said second frames, clock-data recovery is applied to determine corresponding timing information, overlaying the first and the second eye diagram, and performing a jitter analysis on the basis of the overlay of the first and the second eye diagram,” and in claim 10, “A method for analyzing a device-under-test (DUT), wherein the method comprises the steps of . . . slicing the output waveform to form first frames and aligning the first frames to obtain a first eye diagram, slicing the waveform signal input to the DUT to form second frames and aligning the second frames to obtain a second eye diagram, wherein for forming said first frames and said second frames, clock-data recovery is applied to determine corresponding timing information, overlaying the first and the second eye diagram, and performing a jitter analysis on the basis of the overlay of the first and the second eye diagram,” in combination with all other limitations. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Robert P Alejnikov whose telephone number is (571)270-5164. The examiner can normally be reached 10:00a-6:00p M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arleen Vazquez, can be reached at 571.272.2619. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROBERT P ALEJNIKOV JR/Examiner, Art Unit 2857 /ARLEEN M VAZQUEZ/Supervisory Patent Examiner, Art Unit 2857
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Prosecution Timeline

Oct 27, 2023
Application Filed
Jun 04, 2025
Non-Final Rejection — §101, §112
Jul 02, 2025
Response Filed
Sep 22, 2025
Final Rejection — §101, §112
Nov 10, 2025
Interview Requested
Nov 18, 2025
Examiner Interview Summary
Nov 18, 2025
Applicant Interview (Telephonic)
Jan 26, 2026
Response after Non-Final Action
Feb 17, 2026
Request for Continued Examination
Feb 25, 2026
Response after Non-Final Action
Mar 02, 2026
Non-Final Rejection — §101, §112
Mar 27, 2026
Response Filed
Apr 07, 2026
Final Rejection — §101, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

4-5
Expected OA Rounds
86%
Grant Probability
95%
With Interview (+8.7%)
2y 5m
Median Time to Grant
High
PTA Risk
Based on 361 resolved cases by this examiner. Grant probability derived from career allow rate.

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