DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, with respect to the rejection(s) of claim(s) 1 under 35 USC § 102 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of US 10199424 B1.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kropelnicki (US 10199424 B1) in view of Tambo (US 20200003625 A1).
With regards to claim 1, Kropelnicki discloses an IR detector comprising:
a first layer including a substrate 201 and a transistor (Fig. 2; column 3, lines 36-47); and
a cavity layer 260 including a cavity having a first surface and a second surface, the first surface 282 (283, 284, 286) contacting the sensor layer 250 and the second surface (bottom of cavity) contacting the first layer (Fig. 2),
wherein in plan view, the infrared sensor includes a first region 204 and a second region 206, the first region including the transistor, and the second region including the cavity (Fig. 2),
wherein the cavity layer includes a flat major surface 282 (283, 284, 286) and another surface, the flat major surface being disposed around the cavity and extending across both the first region and the second region (Fig. 2; column 4, lines 28-36), the another surface (top surface of the substrate) being disposed around the cavity and extending across both the first region and the second region, the first surface and the flat major surface being on a first plane, and the second surface and the another surface being on a second plane (Fig. 2),
wherein the sensor layer 250 is disposed on the flat major surface and the first layer is disposed on the another surface, thereby the cavity layer is provided between the first layer and the sensor layer along a thickness direction of the infrared sensor (Fig. 2), and
wherein the transistor exhibits a switching action with respect to an element used for infrared sensing included in the second region (column 20, lines 31-57).
Kropelnicki does not teach a sensor layer including a phononic crystal in which holes are arranged. However, Tambo teaches an IR detector comprising a phononic crystal in which holes are arranged [0075] in order to reduce thermal conductivity. Therefore, it would have been well known, obvious, and predictably suitable to one with ordinary skill in the art to modify D1 with the claimed sensor layer as taught by D2 in order to reduce thermal conduction thus improving detector sensitivity.
With regards to claim 2, Kropelnicki discloses an infrared reflector that reflects infrared radiation toward the sensor layer (column 11, lines 40-45).
With regards to claim 3, Kropelnicki discloses wherein the infrared reflector includes doped silicon having a carrier density greater than or equal to 1.0 x 1019cm-3 (column 8, lines 7-26).
With regards to claim 4, Kropelnicki discloses wherein the sensor layer includes a support layer 286, a sensor 250, and a protective layer 259, the sensor being disposed on the support layer, and the protective layer (Fig. 2). Kropelnicki does not teach wherein the sensor comprises a thermocouple. However, Kropelnicki does teach a thermoelectric detector (Abstract). In addition, Tambo teaches a thermocouple as claimed [0082]. Therefore, it would have been well known, obvious, and predictably suitable to one with ordinary skill in the art to modify Kropelnicki with the claimed sensor as a matter of routine design choice.
With regards to claim 5, Tambo teaches wherein the thermocouple includes the phononic crystal [0086, 0116, 0122-0125] (Fig. 13).
With regards to claim 6, Tambo discloses wherein the thermocouple includes a p-type part 301 and an n-type part 302, the p-type part having a positive Seebeck coefficient [0129], the n-type part having a negative Seebeck coefficient [0129] (Thermocouple layer 322 includes first region 301 having a first Seebeck coefficient, second region 302 having a second Seebeck coefficient that is different from the first Seebeck coefficient; [0086] first region 301 is a p-type region, while second region 302 is an n-type region; Therefore, p-type region has a positive Seebeck coefficient and n-type region has a negative Seebeck coefficient as best understood), wherein the p-type part includes a first phononic crystal in which first holes are arranged in plan view (Fig. 13) [0116], wherein the n-type part includes a second phononic crystal in which second holes are arranged in plan view (Fig. 13) [0116], and wherein an interface scattering frequency of phonons in the first phononic crystal differs from an interface scattering frequency of phonons in the second phononic crystal (Fig. 13; The ratio of the sum of areas of the through holes 20 with relatively small diameter to the area of the first phononic crystal in the area 92 is different from the ratio of the sum of areas of the through holes 20 with relatively large diameter to the area of the second phononic crystal in the area 93; Therefore, a boundary scattering frequency of phonons in the first phononic crystal in the area 92 is different from a boundary scattering frequency of phonons in the second phononic crystal in the area 93).
With regards to claim 7, Tambo discloses a ratio of a sum of areas of the first holes to an area of the first phononic crystal in plan view of the first phononic crystal differs from a ratio of a sum of areas of the second holes to an area of the second phononic crystal in plan view of the second phononic crystal [0116] (Fig. 13).
With regards to claim 8, Kropelnicki does not teach the claimed configuration. However, such a modification would have been known since maintaining planar surfaces across MEMS structures is a routine fabrication objective. Therefore, in view of ensuring structural integrity, it would have been well known, obvious, and predictably suitable to one with ordinary skill in the art to modify Kropelnicki with the claimed configuration.
With regards to claim 9, Kropelnicki discloses a sensor array comprising infrared sensors, the infrared sensors being arranged in one dimension or in two dimensions (column 3, lines 5-12), wherein the infrared sensors include the infrared sensor according to claim 1 (see above).
With regards to claim 10, Kropelnicki discloses a method for manufacturing an infrared sensor, the method comprising:
forming a first layer including a substrate 201 and a transistor (Fig. 2; column 3, lines 36-47);
forming, after forming the first layer, a second layer including a sacrificial region 561 on the first layer, the second layer including an irregular surface;
flattening the irregular surface, thereby forming a flat major surface, the flat major surface including a first surface of the sacrificial region, the flat major surface overlapping the transistor in plan view, and the sacrificial region including a second surface contacting the first layer (Fig. 5d; column 24, 43-54);
forming a sensor layer 550 on the flat major surface, the first surface contacting the sensor layer (Fig. 5f); and
forming a cavity 560 by etching away the sacrificial region of the second layer such that the second layer forms a cavity layer, the cavity having a first surface and a second surface, the first surface contacting the sensor layer and the second surface contacting the first layer (Fig. 5f; column 25, lines 25-28),
wherein the cavity layer is provided between the first layer and the sensor layer along a thickness direction of the infrared sensor (Fig. 5f), and
wherein the transistor exhibits a switching action with respect to an element used for infrared sensing and included in the sensor layer (column 20, lines 31-57).
Kropelnicki does not teach a sensor layer including a phononic crystal in which holes are arranged. However, Tambo teaches an IR detector comprising a phononic crystal in which holes are arranged [0075] in order to reduce thermal conductivity. Therefore, it would have been well known, obvious, and predictably suitable to one with ordinary skill in the art to modify D1 with the claimed sensor layer as taught by D2 in order to reduce thermal conduction thus improving detector sensitivity.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARCUS H TANINGCO whose telephone number is (571)272-1848. The examiner can normally be reached Monday-Friday 9am-6pm EST.
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/MARCUS H TANINGCO/ Primary Examiner, Art Unit 2884