DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Arguments
Applicant's arguments filed 13 April 2026 have been fully considered but they are not persuasive.
Applicant argues Nakamura fails to disclose “a termination pad that extends along the sidewall dielectric layers of the first and second capacitors” as the first and second capacitor continue past the through hole.
The examiner disagrees with applicant. While the capacitors do continue past the through hole, it is noted that the through hole creates a sidewall (i.e. a wall that connects the front and back surface of the conductive substrate) that a dielectric is formed on (i.e. sidewall dielectric layer) and the conductive elements 41 and/or 61 extends along the sidewall dielectric layers and thus reads on the claim as currently presented.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 8-10, 12, & 22-23 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by WO2024/257531A1 hereafter referred to as Nakamura.
In regards to claim 12, Nakamura discloses
An integrated passive device comprising:
a first capacitor (10A – fig. 1; [0023]) including a conductive substrate (11 – fig. 1; [0023]) having a front side and a back side, a front dielectric layer (13 – fig. 1; [0023]) on the front side of the conductive substrate, a back dielectric layer (13 – fig. 1; [0023]) on the back side of the conductive substrate, a front conductive polymer layer (12A – fig. 1; [0025]) on the front dielectric layer, and a back conductive polymer layer (12A – fig. 1; [0025]) on the back dielectric layer;
a second capacitor (10B – fig. 1; [0023]) stacked on the first capacitor, the second capacitor including a conductive substrate (11 – fig. 1; [0023]) having a front side and a back side, a front dielectric layer (13 – fig. 1; [0023]) on the front side of the conductive substrate, a back dielectric layer (13 – fig. 1; [0023]) on the back side of the conductive substrate, a front conductive polymer layer (12A – fig. 1; [0025]) on the front dielectric layer, and a back conductive polymer layer (12A – fig. 1; [0025]) on the back dielectric layer;
a first metal contact (32 – fig. 1; [0037]) electrically connected to one or both of the conductive substrates of the first and second capacitors;
a second metal contact (31 – fig. 1; [0036]) electrically isolated from the first metal contact and electrically connected to the front and back conductive polymer layers of the first and second capacitors; and
a passthrough electrical connection (42 and/or 62 – fig. 1; [0051], [0056-0057], & [0062]) between a front outer surface of the integrated passive device and a back outer surface of the integrated passive device opposite the front outer surface;
a first metallization layer (12Bb – fig. 1; [0189-0191]) arranged to promote electrical conductivity between the front conductive polymer layer of the first capacitor and the second metal contact and to promote electrical conductivity between the back conductive polymer layer of the second capacitor and the second metal contact, the first and second capacitors being bonded together by the first metallization layer;
wherein each of the first and second capacitors further includes a sidewall dielectric layer (20 – fig. 1; [0022]) on a sidewall of the conductive substrate, the sidewall dielectric layer connecting the front and back dielectric layers (fig. 1);
wherein the integrated passive device further comprises a termination pad (41 and/or 61 – fig. 1; [0051] & [0056]) that extends along the sidewall dielectric layers of the first and second capacitors, the second metal contact being electrically connected to the first metallization layer by way of the termination pad.
In regards to claim 8, Nakamura discloses
The integrated passive device of claim 12, wherein the first capacitor further includes a front carbonaceous layer (12Ba – fig. 1; [0026]) on the front conductive polymer layer,
the second capacitor further includes a back carbonaceous layer (12Ba – fig. 1; [0026]) on the back conductive polymer layer, and
the first metallization layer is on the front carbonaceous layer of the first capacitor and on the back carbonaceous layer of the second capacitor (fig. 1).
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Figure 1: Configuration of Nakamura with three capacitor elements stacked
In regards to claim 9, Nakamura discloses
The integrated passive device of claim 12, further comprising: a third capacitor carbon stacked underneath the first capacitor, the third capacitor ([0019] – teaches stacking and connecting a plurality (thus including three) like capacitors) including a conductive substrate (11 – fig. 1; [0023]) having a front side and a back side, a front dielectric layer (13 – fig. 1; [0023]) on the front side of the conductive substrate, a back dielectric layer (13 – fig. 1; [0023]) on the back side of the conductive substrate, a front conductive polymer layer (12A – fig. 1; [0025]) on the front dielectric layer, and a back conductive polymer layer (12A – fig. 1; [0025]) on the back dielectric layer, the first metal contact being electrically connected to the conductive substrates of the first, second, and third capacitors, the second metal contact being electrically connected to the front and back conductive polymer layers of the first, second, and third capacitors (fig. 1; [0019] – teaches stacking and connecting a plurality (thus including three) like capacitors); and
a second metallization layer (12Bb – fig. 1; [0189-0191] & [0019] – noting when three capacitors are present) arranged to promote electrical conductivity between the back conductive polymer layer of the first capacitor and the second metal contact and to promote electrical conductivity between the front conductive polymer layer of the third capacitor and the second metal contact, the first and third capacitors being bonded together by the second metallization layer (fig. 1; [0019] – teaches stacking and connecting a plurality (thus including three) like capacitors & see present office action fig. 1 above).
In regards to claim 10, Nakamura discloses
The integrated passive device of claim 12, wherein the first capacitor further includes a front carbonaceous layer (12Ba – fig. 1; [0026]) on the front conductive polymer layer and a back carbonaceous layer (12Ba – fig. 1; [0026]) on the back conductive polymer layer,
the second capacitor further includes a back carbonaceous layer (12Ba – fig. 1; [0026]) on the back conductive polymer layer,
the third capacitor further includes a front carbonaceous layer (12Ba – fig. 1; [0026]) on the front conductive polymer layer,
the first metallization layer (12Bb – fig. 1; [0189-0191]) is on the front carbonaceous layer of the first capacitor and on the back carbonaceous layer of the second capacitor, and
the second metallization layer (12Bb – fig. 1; [0189-0191] & [0019] – noting when three capacitors are present) is on the back carbonaceous layer of the first capacitor and on the front carbonaceous layer of the third capacitor (see present office action fig. 1 above).
In regards to claim 22, Nakamura discloses
The integrated passive device of claim 12, wherein the passthrough electrical connection comprises a through via (42 and/or 62 – fig. 1; [0051], [0056-0057], & [0062]) extending through said one or both of the conductive substates of the first and second capacitors.
In regards to claim 23, Nakamura discloses
The integrated passive device of claim 22, wherein the through via is electrically connected to the first metal contact (fig. 1).
Allowable Subject Matter
Claim(s) 1, 3-4, 6, 21, 26-32 is/are allowed.
Claim(s) 24-25 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art does not teach or suggest (in combination with the other claim limitations) an integrated passive device comprising: a first capacitor including a conductive substrate having a front side and a back side, a front dielectric layer on the front side of the conductive substrate, a back dielectric layer on the back side of the conductive substrate, a front conductive polymer layer on the front dielectric layer, and a back conductive polymer layer on the back dielectric layer; a second capacitor stacked on the first capacitor, the second capacitor including a conductive substrate having a front side and a back side, a front dielectric layer on the front side of the conductive substrate, a back dielectric layer on the back side of the conductive substrate, a front conductive polymer layer on the front dielectric layer, and a back conductive polymer layer on the back dielectric layer; a passthrough electrical connection between a front outer surface of the integrated passive device and a back outer surface of the integrated passive device opposite the front outer surface; wherein the first and second capacitors are bonded together by a conductive foil provided therebetween, and the passthrough electrical connection comprises a first blind via extending from the front outer surface to a front side of the conductive foil and a second blind via extending from the back outer surface to a back side of the conductive foil (claim 1 and its dependents), further comprising an additional passthrough electrical connection between the front outer surface of the integrated passive device and the back outer surface of the integrated passive device opposite the front outer surface, the additional passthrough electrical connection comprising a first blind via extending from the front outer surface to the termination pad and a second blind via extending from the back outer surface to the termination pad (claim 24-25), & an integrated passive device comprising: a first capacitor including a conductive substrate, a dielectric layer on the conductive substrate, and a conductive polymer layer on the dielectric; a second capacitor stacked on the first capacitor, the second capacitor including a conductive substrate, a dielectric layer on the conductive substrate, and a conductive polymer layer on the dielectric; a passthrough electrical connection between a front outer surface of the integrated passive device and a back outer surface of the integrated passive device opposite the front outer surface; wherein the first and second capacitors are bonded together by a conductive foil provided therebetween, and the passthrough electrical connection comprises a first blind via extending from the front outer surface to a front side of the conductive foil and a second blind via extending from the back outer surface to a back side of the conductive foil (claims 26-32).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Communication
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID M SINCLAIR whose telephone number is (571)270-5068. The examiner can normally be reached M-TH from 8AM-4PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, TIMOTHY J DOLE can be reached at (571)272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/David M Sinclair/Primary Examiner, Art Unit 2847
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