DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Summary of the Invention
The invention discloses an integrated bidirectional current-sensing module that employs matched resistive sensing elements and trim circuits to maintain linear current-to-voltage conversion (low temperature coefficient) for currents flowing in either direction between an input and system monitor node. It introduces first and second trim resistors and corresponding amplifier feedback loops that dynamically adjust effective sensing resistance and gain to remove non-linear gain-term error in the denominator of the current-sense equation. The result is a low-TC, high-accuracy, factory-calibratable current sensor architecture that preserves measurement linearity and accuracy across polarity and temperature variations.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-10 are rejected under 35 U.S.C. 102(a)(2) as anticipated by Angelini et.al. (US 2024/0061025 A1, effectively filed on April 28, 2021 before the effective filing date, October 31, 2023 of the current application).
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Fig. 5 of Angelini annotated by the examiner for ease of reference.
Regarding claim 1, Angelini discloses a current-sensing circuit (FIG. 5; [0061]-[0093]) comprising:
Claimed Element
Angelini Disclosure
a first input node, a first output node, a second output node, and a system current mo-nitor node
VRECT ≈ input node; VLOAD ≈ load/output node; analog front-end (AFE) inputs 102A/B function as system monitor nodes
a first output transistor coupled between input node and system current monitor node
High-side switching FET RST/STP elements that route sense currents between source and monitor nodes ([0082]-[0086])
first resistor coupled between input node and first output transistor
Integrated shunt resistor RSHUNT ([0072]
-[0073])
second resistor coupled between input and first output transistor in series with a trim network
Replica resistor RREPLICA connected via series HV switches STp/STn and reference-current source ([0065]-[0086])
third resistor between system current monitor node and the first output transistor
Resistive path through RSHUNT continuing to AFE 102 inputs (102A/102B)
first and second amplifier circuits generating opposite-polarity currents depending on current direction
Forward and reverse phases (STp, STn) of Angelini’s circuit alternately measure currents flowing in opposite directions through the replica and main shunt ([0088]-[0090]). AFE amplifier 1021 is used in both polarities.
system output monitor nodes configured to generate differential current outputs
Digital calibration block 106 produces a bipolar/digital signal OUTCOMP representing the current’s direction and amplitude ([0104]-[0115]).
Regarding Claims 2–10
Each dependent claim recites specific features already expressly taught or inherently present in Angelini:
Claims
Limitation
Angelini Paragraphs/Figures
Comments
2
Resistors kept at same temperature/material
[0065]-[0068], [0113]
Replica and main shunt are collocated and interdigitated to share identical temperature compensation.
3
Resistors are of same material
[0065]-[0066]
Identical resistive modules.
4
Trim circuits provide gain correction
[0093]-[0104] calibration equations
Digital calibration compensated gain/offset.
5-6
Opposite-flow operation, per direction adjustment
[0087]-[0090], Fig. 6
STp and STn phases measure both directions and apply separate adjustments.
7-8
Digital back-end converter, outputs calibrated signals
[0104]-[0115],
ADC 104 and digital backend 106 create digitally calibrated result.
9-10
Method of operation steps
[0087]-[0093],Fig. 6
Explicit method phases correspond one-for-one to act as recited in claim 1
Therefore, Claims 1-10 are anticipated under § 102(a)(2) by Angelini et al.
Further per claim 11,
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 11-20 are rejected under 35 U.S.C. 103 as unpatentable over Angelini in view of Schaffer (US 5,498,984).
Regarding claim 11, Angelini discloses (see Fig. 5; ¶¶ [0061]–[0118]) a current-sensing network comprising:- a current-sense resistor RSHUNT between a source node VRECT and load EL;
- a replica resistor RREPLICA matched in temperature/co-location to RSHUNT ([0065]–[0068]);- a measurement amplifier 102 (AFE 1021 + ADC 104) connected by MOSFET switches R, STp, STn that alternately couple either the shunt or the replica to the amplifier inputs ([0082]–[0091]);- digital calibration circuitry 106 that computes a compensated current output OUTCOMP in response to three measurements (OUTADCSTp, OUTADCSTn, OUTADCR) ([0104]–[0117]).
Angelini therefore teaches all limitations of claim 11 except for the explicit implementation of first and second amplifiers configured in back-to-back negative-feedback loops with series/shunt resistors that perform continuous analog correction rather than time-multiplexed digital measurement.
Schaffer discloses (US 5,498,984, Figs. 4–6; col. 3 l. 59 – col. 7 l. 5; claims 1–14) a bidirectional high-side current-sense amplifier having:- first and second operational amplifiers (48, 49) arranged symmetrically back-to-back;- each amplifier controlling feedback transistors (Q1, Q2) through series sense/gain resistors R and shunt paths;- producing two opposing-polarity current outputs (positive and negative IOUT lines) that ensure the circuit measures current in either direction;- feedback paths with matched resistor networks to cancel temperature coefficients (col. 1 Abstract; col. 6 l. 60 – col. 7 l. 15).
Schaffer, therefore, explicitly teaches dual amplifiers coupled through resistive/capacitive feedback paths for continuous bidirectional current-sensing correction.
Both Angelini and Schaffer are directed to high-accuracy, low-drift current sensors employing amplifier stages tied to sense resistors.
Angelini’s architecture achieves run-time digital self-calibration of offset and gain error; Schaffer’s architecture achieves analog-domain simultaneous bidirectional sensing through matched amplifier pairs.
A person having ordinary skill in the art (PHOSITA) of an analog-IC designer familiar with current-sense products—would have recognized that using Schaffer’s symmetrical dual-amplifier feedback topology within Angelini’s integrated shunt/replica-resistor environment would be a predictable design optimization yielding continuous bidirectional sensing and eliminating the need for sequential STp/STn modes, while retaining Angelini’s runtime calibration advantages.
Combining analog feedback correction (Schaffer) with digital calibration (Angelini) is a substitution of known equivalent means for reducing offset and drift in current sensors.
No new or unexpected result would occur—both aim to maintain accurate low-drift current measurement with matched resistive networks.
Claims
Angelini Disclosure
Schaffer Disclosure/ Teaching
Combined result
11
Digital method measuring first (STp), second (STn), and third (R) voltages across replica and main resistors via AFE and ADC ([0088]–[0093])
Two analog unity-gain amplifier loops each sensing opposite-polarity voltage across a single sense resistor (Figs 4–6)
Obvious to implement Angelini’s calibration sequence using Schaffer-style dual amplifiers as continuous analog loops.
12-14
Describes op-amp 1021 with differential feedback, analog gain G; ADC 104; digital trim 106
First and second amplifiers each in non-inverting feedback controlling transistors Q1/Q2 with resistors R1/R2 → identical feedback form
Obvious substitution of Schaffer’s continuous feedback op amp pair for Angelini’s AFE to obtain real time gain balancing.
15-16
Method steps of sensing currents, forming correction voltages via resistor/capacitor combos
Feedback paths resistors RS1/RS2 and current mirrors providing same function
Analogous circuit technique—predictable equivalent to reduce offset.
17-18
Defines conversion by ADC + correction circuit
Amplifier outputs drive current mirror producing proportional analog current
Obvious to digitize Schaffer’s analog output using Angelini’s ADC 104.
19-20
States using replica and shunt resistors with equal temp-behavior
Explicitly uses same-material aluminum resistors to cancel temperature coefficient (col. 1 Abstract).
Same concept; purely obvious design choice.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAFIZUR RAHMAN whose telephone number is (571)270-0659. The examiner can normally be reached M-F: 10-6.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Lindgren Baltzell can be reached on (571) 272-1769. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
/HAFIZUR RAHMAN/Primary Examiner, Art Unit 2843.
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