DETAILED ACTION
This action is responsive to the communication filed 27 March 2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
Acknowledgment is made of Applicant' s Information Disclosure Statement(s) (IDS). The IDS(es) has/have been considered.
Election/Restrictions
Applicant’s election without traverse Group I Species A embodiment of the invention in the reply filed on 27 March 2026 is acknowledged.
Accordingly, claims 9-20, drawn to non-elected inventions, are withdrawn from further consideration pursuant to 37 CFR 1.142(b), there being no allowable generic or linking claim.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-8 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by U.S. Patent Publication No. 2015/0028461 (filed July 26, 2013) (hereinafter “Gatterbauer”).
Regarding independent claim 1, Gatterbauer discloses: An IC (integrated circuit) package (FIGS. 2/3A, depicting a semiconductor package 75, [0041]) comprising:
an interconnect having a die attach pad (FIGS. 2/3A, die paddle 220, [0041]) and leads (FIG. 2/3A, depicting a plurality of leads 230, [0041]);
a die (FIGS. 2/3A, substrate 10, [0019]) comprising:
a first side mounted on the die attach pad (FIGS. 2/3A, depicting wherein the substrate 10 has a first side mounted on the die paddle 220); and
a second side opposing the first side (FIGS. 2/3A, depicting wherein the substrate 10 has a second side opposing the first side),
the second side having a planar region (FIGS. 2/3A, depicting wherein the second side of the substrate 10 has a planar region),
the planar region having selective polyimide structures (FIGS. 2/3A, insulating layer 40, which may be formed from polyimide, [0021]) between contact points of a connection pad (FIGS. 2/3A, depicting wherein the insulating layer is between contact points of conductive pads 20/30, [0020]); and
a clip (FIGS. 2/3A, clip 250, [0041]) coupled to the connection pad (FIGS. 2/3A, depicting wherein the clip 250 is coupled to the conductive pad 30) and to a lead of the leads (FIGS. 2/3A, depicting wherein the clip 250 is coupled to a lead 230).
Regarding claim 2, Gatterbauer further discloses solder (FIGS. 2/3A, solder metal layer 70, [0023]) flowed over the selective polyimide structures and the contact points of the connection pad (FIGS. 2/3A, depicting wherein the solder metal layer 70 covers the insulating layer 40 and the contact points of the conductive pad 30).
Regarding claim 3, Gatterbauer further discloses wherein the clip (FIGS. 2/3A, clip 250) is attached to the connection points and the polyimide structures of the connection pad with a conductive adhesive (FIGS. 2/3A, depicting wherein the clip 250 is attached to the connection points of the conductive pad 30 and the insulating layer 40 by a solder metal layer).
Regarding claim 4, Gatterbauer further discloses the planar region of the die is a first region (FIGS. 2/3A, depicting wherein the planar region of the substrate 10 is a first region), the second side of the die comprising a second region comprising a polyimide layer (FIGS. 2/3A, depicting wherein the second side of the substrate 10 comprises a second region, also comprising the insulating layer 40 which may be formed from polyimide), wherein the second region is spaced apart from the first region (FIGS. 2/3A, depicting wherein the first region of the substrate 10 is spaced apart from the second region).
Regarding claim 5, Gatterbauer further discloses the connection pad is a first connection pad (FIGS. 2/3A, depicting wherein the conductive pad 30 is a first conductive pad), the second region comprising a second connection pad (FIGS. 2/3A, depicting wherein the second region of the substrate 10 comprises a second conductive pad 20).
Regarding claim 6, Gatterbauer further discloses the lead of the leads of the interconnect is a first lead (FIGS. 2/3A, depicting wherein the lead 230 to which the clip 250 is coupled is a first lead), the IC package further comprising a wire bond (FIGS. 2/3A, wire bond 160, [0043]) that couples the second connection pad to a second lead of the leads of the interconnect (FIGS. 2/3A, depicting wherein the wire bond 160 couples the second conductive pad 20 to a second lead 230 of the plurality of leads 230).
Regarding claim 7, Gatterbauer further discloses wherein the connection pad (FIGS. 2/3A, conductive pad 30) is coupled to a circuit embedded in the die (FIGS. 2/3A, depicting wherein the conductive pad 30 is coupled to a circuit embedded in the substrate 10, such as a source terminal of a discrete transistor, [0031]).
Regarding claim 8, Gatterbauer further discloses wherein the connection pad is a BOAC (bond over active circuit) pad (FIGS. 2/3A, depicting wherein the conductive pad 30 is directly over circuit areas of the substrate 10, including metallization layers, [0031], [0035]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. Patent Publication No. 2017/0092596 (depicting a structure similar to the semiconductor device shown in Gatterbauer); 2023/0395553 (depicting a clip structure similar to that disclosed by Applicant); 2021/0090980 (depicting a clip and wire bond structure similar to that disclosed by Applicant); 2013/0027113 (depicting a clip and wire bond structure similar to that disclosed by Applicant).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADAM D WEILAND whose telephone number is (703)756-4760. The examiner can normally be reached Monday - Friday 9am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached at (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ADAM D WEILAND/Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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