Prosecution Insights
Last updated: August 17, 2026
Application No. 18/500,331

IMAGE SENSOR AND IMAGE CAPTURING APPARATUS

Final Rejection §103§112§Other
Filed
Nov 02, 2023
Priority
Nov 18, 2022 — JP 2022-184971
Examiner
CHIU, WESLEY JASON
Art Unit
2639
Tech Center
2600 — Communications
Assignee
Canon Inc.
OA Round
4 (Final)
62%
Grant Probability
Moderate
5-6
OA Rounds
0m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allowance Rate
302 granted / 486 resolved
At TC average
Strong +27% interview lift
Without
With
+26.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
19 currently pending
Career history
513
Total Applications
across all art units

Statute-Specific Performance

§101
2.4%
-37.6% vs TC avg
§103
55.5%
+15.5% vs TC avg
§102
18.4%
-21.6% vs TC avg
§112
21.8%
-18.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 486 resolved cases

Office Action

§103 §112 §Other
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Claim Amendments Acknowledgment of receiving amendments to the claims, which were received by the Office on 06/05/2026. Response to Arguments Applicant’s arguments with respect to claims 1-11 have been considered but are moot because the arguments do not apply to the same combination/interpretation of references being used in the current rejection. Applicant’s arguments are directed solely to the claimed invention as amended 06/05/2026, which has been rejected under new ground of rejection necessitated by amendment. See rejection below for full detail. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “a focus detection unit” in claim 11. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-4, 8-9 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Inui et al. (US 2020/0273894 A1) in view of Shim et al. (US 2024/0107195 A1). Regarding claim 1, Inui et al. (hereafter referred as Inui) teaches an image sensor including a plurality of pixels (Inui, Figs. 12, 13 and 26, Paragraphs 0124, 0126 and 172), wherein each pixel comprises: a microlens (Inui, Fig. 14, micro-lens ML, Paragraph 0131); a plurality of photoelectric conversion units that convert incident light into charge and accumulate the charge (Inui, Figs. 13-14 and 26, photoelectric conversion units PD1 and PD2, semiconductor regions 601, Paragraph 0126 and 0131); and wherein the plurality of pixels include a plurality of first pixels and a plurality of second pixels, the number of the plurality of first pixels is different from the number of the plurality of second pixels (Inui, Fig. 26, First pixels are pixels with photoelectric conversion units arranged in the horizontal direction. Second pixels are pixels with photoelectric conversion units arranged in the vertical direction.), wherein each of the plurality of first pixels has the plurality of photoelectric conversion units arranged side by side only in a first direction (Inui, Fig. 26, First pixels are pixels with photoelectric conversion units arranged in the horizontal direction.), and the plurality of photoelectric conversion units of each of the plurality of first pixels share one microlens (Inui, Fig. 14, micro-lens ML, Paragraph 0131), wherein each of the plurality of second pixels has the plurality of photoelectric conversion units arranged side by side only in a second direction which is perpendicular to the first direction (Inui, Fig. 26, Second pixels are pixels with photoelectric conversion units arranged in the vertical direction.), and the plurality of photoelectric conversion units of each of the plurality of second pixels share one microlens (Inui, Fig. 14, micro-lens ML, Paragraph 0131), wherein the plurality of photoelectric conversion units of each pixel are formed on a first semiconductor substrate (Inui, Fig. 15, Paragraph 0133). However, Inui does not teach a plurality of signal holding circuits that separately hold signals corresponding to the charge accumulated in the plurality of photoelectric conversion units; a signal output circuit that outputs the signals held in the plurality of signal holding circuits in units of one row; wherein the plurality of signal holding circuits of each pixel are formed on a second semiconductor substrate and wherein the plurality of photoelectric conversion units corresponding to a predetermined number of the first and second pixels formed on the first semiconductor substrate and the plurality of signal holding circuits corresponding to the predetermined number of the first and second pixels formed on the second semiconductor substrate are connected via single connecting point. In reference to Shim et al. (hereafter referred as Shim), Shim teaches a plurality of pixels (Shim, Fig. 1, pixel array 110), wherein each pixel (Shim, Fig. 10) comprises: a plurality of photoelectric conversion units that convert incident light into charge and accumulate the charge (Shim, Fig. 10, PD1 and PD2, Paragraph 0193); a plurality of signal holding circuits that separately hold signals corresponding to the charge accumulated in the plurality of photoelectric conversion units (Shim, Fig. 10, transistors SMP1 to SMP3 and Capacitors C1 to C3, Paragraphs 0145 and 0193); a signal output circuit that outputs the signals held in the plurality of signal holding circuits in units of one row (Shim, Fig. 10, Second driving transistor DX2 and First selection transistor SX1, Paragraph 0192); wherein the plurality of photoelectric conversion units of each pixel are formed on a first semiconductor substrate (Shim, Fig. 10, substrate SUB1), and the plurality of signal holding circuits of each pixel are formed on a second semiconductor substrate (Shim, Fig. 10, substrate SUB2), and wherein the plurality of photoelectric conversion units corresponding to a predetermined number of the pixels formed on the first semiconductor substrate (Shim, Fig. 10, Two photoelectric conversion units correspond to one pixel.) and the plurality of signal holding circuits corresponding to the predetermined number of the pixels formed on the second semiconductor substrate (Shim, Fig. 10, transistors SMP1 to SMP3 and Capacitors C1 to C3 correspond to one pixel.) are connected via single connecting point (Shim, Fig. 10, node N1). These arts are analogous since they are both related to imaging devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Inui with the pixel signal generation circuitry as seen in Shim to allow the image sensor to perform both global shutter driving and rolling shutter driving (Shim, Paragraph 0002). Further, the limitation “wherein the plurality of photoelectric conversion units corresponding to a predetermined number of the first and second pixels formed on the first semiconductor substrate and the plurality of signal holding circuits corresponding to the predetermined number of the first and second pixels formed on the second semiconductor substrate are connected via single connecting point” would be met since the plurality of photoelectric conversion units and the plurality of signal holding circuits each corresponding to one of the first and second pixels are connected via single connecting point. Regarding claim 2, the combination of Inui and Shim teaches the image sensor according to claim 1 (see claim 1 analysis), wherein timings of accumulating the charge in the plurality of second pixels and timings at which the signals corresponding to the charge accumulated in the plurality of photoelectric conversion units of each of the plurality of second pixels are controlled to be the same for the plurality of the second pixels (Shim, Figs. 9A and 9B, Paragraph 0157-0160, Integration times for the pixels is the same for the second pixels in global shutter mode. Further, each second pixel operates in the same manner of timing.). Regarding claim 3, the combination of Inui and Shim teaches the image sensor according to claim 1 (see claim 1 analysis), wherein, as the plurality of the photoelectric conversion units, the each pixel has: a plurality of first regions formed at a first depth from a light incident surface (Inui, Figs. 15 and 19-20, regions 601, Paragraph 0133-0134 and 0141); a plurality of second regions formed at a second depth deeper than the first depth, for accumulating the charge generated according to the incident light (Inui, Figs. 15 and 20, regions 602, Paragraph 0133-0134 and 0141); and a plurality of connection regions that connect the plurality of first regions and the second regions (Inui, Figs. 15 and 19-20, regions 603, Paragraph 0133-0134 and 0141). Regarding claim 4, the combination of Inui and Shim teaches the image sensor according to claim 3 (see claim 3 analysis), wherein, among the plurality of photoelectric conversion units, the plurality of first regions of the first pixels are arranged in the first direction, and the plurality of first regions of the second pixels are arranged in the second direction (Inui, Fig. 22, Paragraph 0162-0163). Regarding claim 8, the combination of Inui and Shim teaches the image sensor according to claim 1 (see claim 1 analysis), wherein the each pixel is covered with a color filter of one of a plurality of colors (Inui, Fig. 26, Paragraph 0172) formed between the microlens and the plurality of photoelectric conversion units (Inui, Fig. 10, Paragraph 0117), and the second pixels are covered with the color filters of a predetermined color (Inui, Fig. 26, Paragraph 0172, Second pixels are covered with green color filters.). Regarding claim 9, the combination of Inui and Shim teaches the image sensor according to claim 1 (see claim 1 analysis), wherein the each pixel is covered with a color filter formed between the microlens and the plurality of photoelectric conversion units (Inui, Fig. 10, Paragraph 0117), and the color filters are of Bayer arrangement, and a set of color filters of the Bayer arrangement are provided for a predetermined number of pixels including the second pixel (Inui, Fig. 26, Paragraphs 0168 and 0172, Second pixels are covered with green color filters.). Regarding claim 11, Inui teaches an image capturing apparatus (Inui, Fig. 39) comprising: an image sensor including a plurality of pixels (Inui, Figs. 12, 13 and 26, Paragraphs 0124, 0126 and 172), wherein each pixel comprises: a microlens (Inui, Fig. 14, micro-lens ML, Paragraph 0131); a plurality of photoelectric conversion units that convert incident light into charge and accumulate the charge (Inui, Figs. 13-14 and 26, photoelectric conversion units PD1 and PD2, semiconductor regions 601, Paragraph 0126 and 0131); and wherein the plurality of pixels include a plurality of first pixels and a plurality of second pixels, the number of the plurality of first pixels is different from the number of the plurality of second pixels (Inui, Fig. 26, First pixels are pixels with photoelectric conversion units arranged in the horizontal direction. Second pixels are pixels with photoelectric conversion units arranged in the vertical direction.), wherein each of the plurality of first pixels has the plurality of photoelectric conversion units arranged side by side only in a first direction (Inui, Fig. 26, First pixels are pixels with photoelectric conversion units arranged in the horizontal direction.), and the plurality of photoelectric conversion units of each of the plurality of first pixels share one microlens (Inui, Fig. 14, micro-lens ML, Paragraph 0131), wherein each of the plurality of second pixels has the plurality of photoelectric conversion units arranged side by side only in a second direction which is perpendicular to the first direction (Inui, Fig. 26, Second pixels are pixels with photoelectric conversion units arranged in the vertical direction.), and the plurality of photoelectric conversion units of each of the plurality of second pixels share one microlens (Inui, Fig. 14, micro-lens ML, Paragraph 0131), wherein the plurality of photoelectric conversion units of each pixel are formed on a first semiconductor substrate (Inui, Fig. 15, Paragraph 0133); and a focus detection unit that performs phase difference focus detection based on the signals output from the plurality of photoelectric conversion units (Inui, Paragraph 0131 and 0199) However, Inui does not teach a plurality of signal holding circuits that separately hold signals corresponding to the charge accumulated in the plurality of photoelectric conversion units; a signal output circuit that outputs the signals held in the plurality of signal holding circuits in units of one row; wherein the plurality of signal holding circuits of each pixel are formed on a second semiconductor substrate and wherein the plurality of photoelectric conversion units corresponding to a predetermined number of the first and second pixels formed on the first semiconductor substrate and the plurality of signal holding circuits corresponding to the predetermined number of the first and second pixels formed on the second semiconductor substrate are connected via single connecting point; nor a focus detection unit that performs phase difference focus detection based on the signals output from the plurality of signal holding circuits. In reference to Shim et al. (hereafter referred as Shim), Shim teaches a plurality of pixels (Shim, Fig. 1, pixel array 110), wherein each pixel (Shim, Fig. 10) comprises: a plurality of photoelectric conversion units that convert incident light into charge and accumulate the charge (Shim, Fig. 10, PD1 and PD2, Paragraph 0193); a plurality of signal holding circuits that separately hold signals corresponding to the charge accumulated in the plurality of photoelectric conversion units (Shim, Fig. 10, transistors SMP1 to SMP3 and Capacitors C1 to C3, Paragraphs 0145 and 0193); a signal output circuit that outputs the signals held in the plurality of signal holding circuits in units of one row (Shim, Fig. 10, Second driving transistor DX2 and First selection transistor SX1, Paragraph 0192); wherein the plurality of photoelectric conversion units of each pixel are formed on a first semiconductor substrate (Shim, Fig. 10, substrate SUB1), and the plurality of signal holding circuits of each pixel are formed on a second semiconductor substrate (Shim, Fig. 10, substrate SUB2), and wherein the plurality of photoelectric conversion units corresponding to a predetermined number of the pixels formed on the first semiconductor substrate (Shim, Fig. 10, Two photoelectric conversion units correspond to one pixel.) and the plurality of signal holding circuits corresponding to the predetermined number of the pixels formed on the second semiconductor substrate (Shim, Fig. 10, transistors SMP1 to SMP3 and Capacitors C1 to C3 correspond to one pixel.) are connected via single connecting point (Shim, Fig. 10, node N1); and a focus detection unit that performs phase difference focus detection based on the signals output from the plurality of signal holding circuits (Shim, Paragraphs 0191 and 0250). These arts are analogous since they are both related to imaging devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Inui with the pixel signal generation circuitry as seen in Shim to allow the image sensor to perform both global shutter driving and rolling shutter driving (Shim, Paragraph 0002). Further, the limitation “wherein the plurality of photoelectric conversion units corresponding to a predetermined number of the first and second pixels formed on the first semiconductor substrate and the plurality of signal holding circuits corresponding to the predetermined number of the first and second pixels formed on the second semiconductor substrate are connected via single connecting point” would be met since the plurality of photoelectric conversion units and the plurality of signal holding circuits each corresponding to one of the first and second pixels are connected via single connecting point. Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Inui et al. (US 2020/0273894 A1) in view of Shim et al. (US 2024/0107195 A1)in view of Mizuta (US 2019/0122918 A1) Regarding claim 10, the combination of Inui and Shim teaches the image sensor according to claim 1 (see claim 1 analysis). However, the combination of Inui and Shim does not teach wherein the plurality of signal holding circuits are trench MOS type. In reference to Mizuta, Mizuta teaches a signal holding circuit is a trench MOS type (Mizuta, Fig. 2, capacitance element 107, Paragraph 0213.). These arts are analogous since they are all related to imaging devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the combination of Inui and Shim with the use of trench MOS type capacitors as seem in Mizuta since it is a known type of holding unit used in imagine devices and would perform similar and expected results as a holding unit. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to WESLEY JASON CHIU whose telephone number is (571)270-1312. The examiner can normally be reached Mon-Fri: 8am-4pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Twyler Haskins can be reached at (571) 272-7406. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WESLEY J CHIU/ Examiner, Art Unit 2639 /TWYLER L HASKINS/ Supervisory Patent Examiner, Art Unit 2639
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Prosecution Timeline

Show 2 earlier events
Sep 09, 2025
Response Filed
Oct 14, 2025
Final Rejection mailed — §103, §112, §Other
Dec 12, 2025
Response after Non-Final Action
Dec 23, 2025
Request for Continued Examination
Jan 18, 2026
Response after Non-Final Action
Mar 11, 2026
Non-Final Rejection mailed — §103, §112, §Other
Jun 05, 2026
Response Filed
Jul 17, 2026
Final Rejection mailed — §103, §112, §Other (current)

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Prosecution Projections

5-6
Expected OA Rounds
62%
Grant Probability
89%
With Interview (+26.8%)
2y 7m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 486 resolved cases by this examiner. Grant probability derived from career allowance rate.

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