Prosecution Insights
Last updated: July 17, 2026
Application No. 18/501,176

OPTIMIZATION TO MITIGATE FREQUENCY CROWDING IN MULTI-QUBIT PROCESSORS

Non-Final OA §103
Filed
Nov 03, 2023
Examiner
MENGISTU, TEWODROS E
Art Unit
Tech Center
Assignee
International Business Machines Corporation
OA Round
1 (Non-Final)
50%
Grant Probability
Moderate
1-2
OA Rounds
1y 9m
Est. Remaining
78%
With Interview

Examiner Intelligence

Grants 50% of resolved cases
50%
Career Allowance Rate
70 granted / 139 resolved
-9.6% vs TC avg
Strong +28% interview lift
Without
With
+28.0%
Interview Lift
resolved cases with interview
Typical timeline
4y 6m
Avg Prosecution
19 currently pending
Career history
169
Total Applications
across all art units

Statute-Specific Performance

§101
6.8%
-33.2% vs TC avg
§103
89.5%
+49.5% vs TC avg
§102
2.6%
-37.4% vs TC avg
§112
0.9%
-39.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 139 resolved cases

Office Action

§103
Detailed Action Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-20 are pending for examination. Claims 1, 10, and 12 are independent. Claim Objections Claim 18 objected to because of the following informalities: There are two claim 18's instead of one. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1, 4-5, 9-12, 15-16, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hertzberg et al. (US 2022/0058509 A1, hereinafter "Hertzberg") in view of Morvan et al. ("Optimizing frequency allocation for fixed-frequency superconducting quantum processors", hereinafter "Morvan"). Regarding Claim 1 Hertzberg discloses: A method comprising: defining a plurality of qubit collision types and a plurality of constraints ([Para 0020, 0045, and Table 2] describes different collisions types and constraints.); for a group of qubits, ([Para 0003 0023-0025, 0080-0087, 0093 and Fig 1] describe a iterative process to minimize collisions.) outputting a frequency tuning plan for the group of qubits, based on the iterative minimization ([Para 0025, and Fig 1 (130)] describes generating a frequency plan.); and facilitating tuning physical qubits in accordance with the frequency tuning plan. ([Para 0025-0026, 0041, 0088-0089, and Fig 1] describes making the tuning adjustments.) Hertzberg does not explicitly disclose: using a computerized mixed-integer programming solver; However, Morvan discloses in the same field of endeavor: using a computerized mixed-integer programming solver to, subject to the constraints, iteratively minimize collisions by minimizing a sum of products of weights multiplied by an amount of frequency collisions for given ones of the constraints of each one of the collision types ([Abstract, Sections I-II, and Table I] describes a Table with definitions for a plurality of quibit collisions types (i.e. different rows in Table I define different types such as type A.) and a plurality of constraints (e.g. bounds in Table I). Also describes a mixed-integer-programming-based optimization approach for collision avoidance.) It would have been obvious to a person of ordinary skill in art before the effective filling date of the invention to implement the function of a mixed-integer-programming disclosed by Morvan into the frequency tuning plan disclosed by Hertzberg to use a computerized mixed-integer programming solver. The modification would have been obvious because one of the ordinary skills of the art would be motivated to utilize the feature of a mixed-integer-programming disclosed by Morvan as all the references are in the field of quantum computing. A person of ordinary skill of the art would have been motivated to perform the combination for being able to determine qubit frequencies to maximize the fabrication yield of quantum processors. Regarding Claim 10 Hertzberg in view of Morvan discloses: A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method ([Para 0005], Hertzberg describes a computer system.) comprising: (Claim 10 is a computer program product claim that corresponds to claim 1 and the rest of the limitations are rejected on the same ground) Regarding Claim 12 Hertzberg in view of Morvan discloses: A system comprising: a memory; and at least one processor, coupled to said memory ([Para 0005], Hertzberg describes a computer system.), and operative to: (Claim 12 is a system claim that corresponds to claim 1 and the rest of the limitations are rejected on the same ground) Regarding Claim 4 Hertzberg in view of Morvan discloses: The method of Claim 1, further comprising, following the iterative minimization of collisions, for the group of qubits, using the computerized mixed-integer programming solver to iteratively maximize frequency margin, subject to the constraints. ([Abstract, Section I-II, and Table I], Morvan describes a mixed-integer-programming-based optimization approach that determines qubit frequencies to maximize the fabrication yield of quantum processors. [Para 0030-0039, 0045-0049, and Table I], Hertzberg also discloses the limitation.) Regarding Claim 5 Hertzberg in view of Morvan discloses: The method of Claim 4, further comprising determining that a solution to the iterative minimization includes at least one collision, wherein the iterative maximization of the frequency margin is carried out responsive to the determining. ([Abstract, Section I-II, and Table I], Morvan describes an optimization approach for maximizing yield. [Para 0030-0039, 0045-0049, and Table I], Hertzberg also discloses the limitation.) Regarding Claim 9 Hertzberg in view of Morvan discloses: The method of Claim 1, wherein the iterative minimization includes applying scaling factors to increase or decrease collision bounds by type. ([Abstract, Section I-II, Section IV, and Table I], Morvan describes optimization search and a scaling function.) Regarding Claim 11 (Claim 11 recites analogous limitations to claim 4 and therefore is rejected on the same ground as claim 4.) Regarding Claim 15 (Claim 15 recites analogous limitations to claim 4 and therefore is rejected on the same ground as claim 4.) Regarding Claim 16 (Claim 16 recites analogous limitations to claim 5 and therefore is rejected on the same ground as claim 5.) Regarding Claim 20 (Claim 20 recites analogous limitations to claim 9 and therefore is rejected on the same ground as claim 9.) Claim(s) 2-3, and 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hertzberg in view of Morvan and Hertzberg et al. ("Laser-annealing Josephson junctions for yielding scaled-up superconducting quantum processors", hereinafter "Hertzberg2"). Regarding Claim 2 Hertzberg in view of Morvan discloses: The method of Claim 1, Hertzberg in view of Morvan does not explicitly disclose: wherein the tuning comprises LASJQ (Laser Annealing of Stochastically Impaired Qubits) tuning. However, Hertzberg2 discloses in the same field of endeavor: wherein the tuning comprises LASJQ (Laser Annealing of Stochastically Impaired Qubits) tuning. ([Section B. Tuning Using Selective Laser Anneal and Fig 2] disclose “Laser Annealing of Stochastically Impaired Qubits. ) It would have been obvious to a person of ordinary skill in art before the effective filling date of the invention to implement the function of Laser Annealing disclosed by Hertzberg2 into the method of Hertzberg in view of Morvan to perform LASJQ (Laser Annealing of Stochastically Impaired Qubits) tuning. The modification would have been obvious because one of the ordinary skills of the art would be motivated to utilize the feature of Laser Annealing disclosed by Hertzberg2 as all the references are in the field of quantum computing. A person of ordinary skill of the art would have been motivated to perform the combination for being able to improve qubit frequency precision. Regarding Claim 3 Hertzberg in view of Morvan and Hertzberg2 disclose: The method of Claim 2, further comprising carrying out statistical modeling to assess yield associated with the frequency tuning plan, wherein the LASIQ (Laser Annealing of Stochastically Impaired Qubits) is carried out responsive to the statistical modeling indicating acceptable yield. ([Abstract, Section B. Tuning Using Selective Laser Anneal, and Fig 2], Hertzberg2 describes using statistical modeling and laser annealing.) Regarding Claim 13 (Claim 13 recites analogous limitations to claim 2 and therefore is rejected on the same ground as claim 2.) Regarding Claim 14 (Claim 14 recites analogous limitations to claim 3 and therefore is rejected on the same ground as claim 3.) Claim(s) 6, and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hertzberg in view of Morvan and Yang et al. ("A superconducting quantum processor architecture design method for improving performance and reducing frequency collisions", hereinafter "Yang"). Regarding Claim 6 Hertzberg in view of Morvan discloses: The method of Claim 1, further comprising: Hertzberg in view of Morvan does not explicitly disclose: accessing a specification of a qubit lattice; selecting at least one sublattice shape; generating sublattices, in accordance with the at least one sublattice shape, such that each individual qubit in the qubit lattice is covered by at least one of the sublattices; wherein the group of qubits comprises one of the sublattices. However, Yang discloses in the same field of endeavor: accessing a specification of a qubit lattice; selecting at least one sublattice shape; generating sublattices, in accordance with the at least one sublattice shape, such that each individual qubit in the qubit lattice is covered by at least one of the sublattices; wherein the group of qubits comprises one of the sublattices. ([Pages 5-9, Algorithms 1-3, Fig 1, and Fig 6-9] describe accessing a connection matrix and qubit layout, and evaluating a lattice topology into smaller constrained structures.) It would have been obvious to a person of ordinary skill in art before the effective filling date of the invention to implement the function of architecture designing for quantum processors disclosed by Yang into the method of Hertzberg in view of Morvan to generate sublattices. The modification would have been obvious because one of the ordinary skills of the art would be motivated to utilize the feature of architecture designing for quantum processors disclosed by Yang as all the references are in the field of quantum computing. A person of ordinary skill of the art would have been motivated to perform the combination for being able to provide superconducting quantum processor architecture design with better performance and lower probability of frequency collisions for quantum programs. Regarding Claim 17 (Claim 17 recites analogous limitations to claim 6 and therefore is rejected on the same ground as claim 6.) Allowable Subject Matter The following is a statement of reasons for the indication of allowable subject matter: Regarding Claims 7-8 and 18, None of these references taken alone or in combination with the prior art of record disclose the same steps for repeating iterative minimization of collisions by minimizing a sum of products of weights multiplied by the amount of frequency collisions for given ones of the constraints of each one of the collision types, for additional groups of qubits corresponding to remaining ones of the sublattices, in combination with the remaining elements and features of the claimed invention. It is for these reasons that the applicants’ invention defines over the prior art of record. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hertzberg et al. (US 20190165244 A1) describes tuning a chip based on varying size and shape of individual qubits. Klimov et al. (US 11361241 B2) describes optimizing qubit operating frequencies. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TEWODROS E MENGISTU whose telephone number is (571)270-7714. The examiner can normally be reached Mon-Fri 9:30-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ABDULLAH KAWSAR can be reached at (571)270-3169. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TEWODROS E MENGISTU/Examiner, Art Unit 2127
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Prosecution Timeline

Nov 03, 2023
Application Filed
Jul 07, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
50%
Grant Probability
78%
With Interview (+28.0%)
4y 6m (~1y 9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 139 resolved cases by this examiner. Grant probability derived from career allowance rate.

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