DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
In the communication dated November 3, 2023, claims 1-13 are pending.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4, 8-9 and 13 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Isaji et al. US20240300380A1.
Regarding claim 1. Isaji discloses a power module (FIG. 1), comprising:
a first power input/output (I/O) (load R);
a second power I/O (external power supply 40);
a first current path (20A), extending from the first power I/O (load R) to the second power I/O (external power supply 40) (FIG. 1 – electrically connected;
a second current path (20B), extending from the first power I/O (load R) to the second power I/O (external power supply 40) (FIG. 1 – electrically connected);
a third current path (11), extending from the first current path to the second current path (FIG. 1);
a first battery unit (10A), disposed on the first current path (20A);
a second battery unit (10B), disposed on the second current path (20B) and electrically connected to the first battery unit (20A) in serial through the third current path (11);
a first switch (14B), disposed on the first current path (20A);
a second switch (14A), disposed on the second current path (20B);
a third switch (14C), disposed on the third current path (11); and
a control unit (50), configured to receive a control signal and control conductive states of the first switch (14B), the second switch (14A), and the third switch (14C) based on the control signal (¶37 – control unit 50 controls the switches of 14A-C to the on/off state), wherein
when the control signal is a discharging signal, the control unit turns on the first switch and the second switch and turns off the third switch, so that the first battery unit and the second battery unit are respectively discharged through the first current path and the second current path (FIG. 2; ¶45 – switch 14C is turned to the off state and switches 14A-B are switched to the “on” state, path is formed between the batteries for conducting electricity) ; and
when the control signal is a charging signal, the control unit turns off the first switch and the second switch and turns on the third switch, so that the first battery unit and the second battery unit are connected in series between the first power I/O and the second power I/O for charging (FIG. 1; ¶50 – 14 C is in the on state, switches 14A-B are switched off so that power is supplied from the second external power supply to the battery unit).
Regarding claim 2. Isaji discloses the first battery unit (10A) comprises a first positive electrode (BH) and a first negative electrode (BL),
the second battery unit (10B) comprises a second positive electrode (BH) and a second negative electrode (BH),
the first switch (14B) is located on a circuit between the first negative electrode (BL) and the second power I/O (40),
the second switch (14A) is located on a circuit between the first power I/O (R) and the second positive electrode (BH), and
the third switch (14C) is located on a circuit between the first negative electrode (BL of 10A) and the second positive electrode (BH of 10B).
Regarding claim 3. Isaji discloses the first switch (14B) comprises a first connecting terminal, a second connecting terminal, and a first control terminal (¶35 – 14B is a MOSFET which includes all of the connections)
the second switch (14A) comprises a third connecting terminal, a fourth connecting terminal, and a second control terminal (¶35 – 14A is a MOSFET which includes all of the connections)
the third switch (14C) comprises a fifth connecting terminal, a sixth connecting terminal, and a third control terminal ((¶35 – 14C is a MOSFET which includes all of the connections)
the first connecting terminal (terminal of 14B) is electrically connected to the first negative electrode (BL of 10A),
the second connecting terminal (terminal of 14B) is electrically connected to the second power I/O (40) (FIG. 1 – the opposing terminal is connected to the external power supply),
the third connecting terminal (terminal 14A) is electrically connected to the first power I/O (FIG. 1 – terminal is electrically connected to the load),
the fourth connecting terminal (terminal of 14A) is electrically connected to the second positive electrode (BH of 10B),
the fifth connecting terminal (terminal of 14C) is electrically connected to the first negative electrode (BL of 10A),
the sixth connecting terminal (terminal of 14C) is electrically connected to the second positive electrode (BH of 10B), and
the control unit (50) is electrically connected to the first control terminal, the second control terminal, and the third control terminal, and is configured to control the conductive states of the first switch, the second switch, and the third switch through the first control terminal, the second control terminal, and the third control terminal (¶37 – control unit 50 controls the switches of 14A-C).
Regarding claim 4. Isaji discloses a discharging switch (30C/D) arranged at a joint end of the first current path and the second current path (connected at the end of the paths connecting to external power supply 40) )connected to the second power I/O (41), wherein when the control signal is a discharging signal, the control unit turns on the discharging switch (¶45 – switches 30C/D are switched to an “on” state).
Regarding claim 8. Isaji discloses a first current detector (14G), arranged on the first current path (with the battery 10A) and configured to detect a current on the first current path to generate a first current signal (¶38 – detect the current on the first path); and
a second current detector (14F), arranged on the second current path (with the battery 10B) and configured to detect a current on the second current path to generate a second current signal (¶38 – detect current on second path).
Regarding claim 9. Isaji discloses the control unit (50) is configured to:
generate a first control voltage and a second control voltage for respectively turning on the first switch and the second switch (¶37 – the control unit determines the current value from the current detection unit and controls the switches to a predetermined condition), and
adjust voltage levels of the first control voltage and the second control voltage based on the first current signal and the second current signal (¶45 and 48-50 – the voltage is adjusted to a first or a second voltage depending on the current value detected).
Regarding claim 13. Isaji discloses the control unit is a microcontroller (¶37 – control unit 50 being a microcomputer).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Isaji et al. US20240300380A1 in view of Chang et al. US20080012529A1.
Regarding claim 5. Isaji does not explicitly disclose a charging switch arranged on the third current path.
Chang discloses a charging switch (42/44) arranged on the third current path (FIG. 1 – switches arranged on a path connecting another two current paths that have batteries arranged thereon).
It would be obvious to one of ordinary skill in the art at the time of filing to provide charging switch, as taught by Chang, with the third switch of Isaji in order to provide further control of the current path.
Regarding claim 6. Although Isaji discloses that the switches all may be a metal-oxide semiconductor field effect transistor (MOSFET) (¶35, Isaji does not explicitly teach the charging switch and the third switch form a back-to-back.
Chang discloses that the charging switch and the third switch form a back-to-back (42/44 are formed back-to-back)
It would be obvious to one of ordinary skill in the art at the time of filing to provide charging switch, as taught by Chang, with the third switch of Isaji in order to provide further control of the current path.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Isaji et al. US20240300380A1 in view of Kato US20230069547A1.
Regarding claim 7. Isaji does not explicitly disclose that a rated voltage of the first battery unit is the same as a rated voltage of the second battery unit.
Kato discloses that a rated voltage of the first battery unit is the same as a rated voltage of the second battery unit (¶50 – the first and second battery are the same type of batteries with the same rated voltage).
It would be obvious to one of ordinary skill at the time of filing to provide two battery units that are the same in order to simplify the system and allow for less complicated balancing.
Claims 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over Isaji et al. US20240300380A1 in view of Yamauchi et al. EP2639923A2
Regarding claim 10. Although the controller (50) of Isaji discloses a comparator (¶68), Isaji does not explicitly disclose compare the current on the first current path with the current on the second current path based on the first current signal and the second current signal; adjust the second control voltage to reduce an on resistance of the second switch when the current on the first current path is greater than the current on the second current path; and adjust the first control voltage to reduce an on resistance of the first switch when the current on the first current path is less than the current on the second current path.
Yamauchi teaches a controller that is configured to compare the current on the first current path with the current on the second current path based on the first current signal and the second current signal (¶16 – first current and second current are compared by a controller);
adjust the second control voltage to reduce an on resistance of the second switch when the current on the first current path is greater than the current on the second current path (¶16 - first switch and second switch are turned to the on/off state based on a current detection information of the first and second current detectors; ¶76-77 - equal current condition is not met – the first switch is turned on Sa1 until the second current reaches an equal-current condition, then the second switch Sb1 is turned on and the first switch is turned off – resistance is decreased in order to turn the switch on) ; and
adjust the first control voltage to reduce an on resistance of the first switch when the current on the first current path is less than the current on the second current path (¶16 - first switch and second switch are turned to the on/off state based on a current detection information of the first and second current detectors; ¶76-77 - equal current condition is not met – the first switch is turned on Sa1 until the second current reaches an equal-current condition, then the second switch Sb1 is turned on and the first switch is turned off – resistance is decreased in order to turn the switch on).
It would be obvious to a person of ordinary skill in the art at the time of filing to provide the control of Yamauchi to the controller of Isaji in order to avoid recess current from flowing into the battery unit which is known to degrade or damage a battery (Yamauchi; ¶6).
Regarding claim 11. Isaji discloses that the first switch (14B) and the second switch (14A) are both a metal-oxide semiconductor field-effect transistor element (¶35 -semiconductor switches such as a MOSFET), the first switch has a first maximum driving voltage value, the second switch has a second maximum driving voltage value (because the switch is a MOSFET, the switch necessarily has a drive voltage in order to fully turn on the MOSFET, because there are two MOSFETs, each will have a drive voltage value).
Although Isaji does not explicitly disclose that the MOSFET is an N-type MOSFET, however, a person of ordinary skill would understand that there a limited number of types of MOSFET’s and with N and P being common types, it would be obvious to try an N-type MOSFET.
Isaji does not explicitly disclose the control unit is configured to: compare the current on the first current path with the current on the second current path based on the first current signal and the second current signal; reduce the second control voltage to reduce an on resistance of the second switch when the current on the first current path is greater than the current on the second current path and the second control voltage does not reach the second minimum driving voltage value; increase the first control voltage to increase an on resistance of the first switch when the current on the first current path is greater than the current on the second current path and the second control voltage reaches the second minimum driving voltage value; reduce the first control voltage to reduce the on resistance of the first switch when the current on the first current path is less than the current on the second current path and the first control voltage does not reach the first minimum driving voltage value; and increase the second control voltage to increase the on resistance of the second switch when the current on the first current path is less than the current on the second current path and the first control voltage reaches the first minimum driving voltage value.
Yamauchi teaches a controller that is configured to compare the current on the first current path with the current on the second current path based on the first current signal and the second current signal (¶16 – first current and second current are compared by a controller);
increase the second control voltage to reduce an on resistance of the second switch when the current on the first current path is greater than the current on the second current path and the second control voltage does not reach the second maximum driving voltage value (¶16 - first switch and second switch are turned to the on/off state based on a current detection information of the first and second current detectors; ¶76-77 - equal current condition is not met – the first switch is turned on Sa1 until the second current reaches an equal-current condition, then the second switch Sb1 is turned on and the first switch is turned off – resistance is decreased in order to turn the switch on);
reduce the first control voltage to increase an on resistance of the first switch when the current on the first current path is greater than the current on the second current path and the second control voltage reaches the second maximum driving voltage value (¶16 - first switch and second switch are turned to the on/off state based on a current detection information of the first and second current detectors; ¶76-77 - equal current condition is not met – the first switch is turned on Sa1 until the second current reaches an equal-current condition, then the second switch Sb1 is turned on and the first switch is turned off – resistance is increased in order to turn the switch off);
increase the first control voltage to reduce the on resistance of the first switch when the current on the first current path is less than the current on the second current path and the first control voltage does not reach the first maximum driving voltage value (¶16 - first switch and second switch are turned to the on/off state based on a current detection information of the first and second current detectors; ¶76-77 - equal current condition is not met – the first switch is turned on Sa1 until the second current reaches an equal-current condition, then the second switch Sb1 is turned on and the first switch is turned off – resistance is decreased in order to turn the switch on); and
reduce the second control voltage to increase the on resistance of the second switch when the current on the first current path is less than the current on the second current path and the first control voltage reaches the first maximum driving voltage value (¶16 - first switch and second switch are turned to the on/off state based on a current detection information of the first and second current detectors; ¶76-77 - equal current condition is not met – the first switch is turned on Sa1 until the second current reaches an equal-current condition, then the second switch Sb1 is turned on and the first switch is turned off – resistance is increased in order to turn the switch off).
It would be obvious to a person of ordinary skill in the art at the time of filing to provide the control of Yamauchi to the controller of Isaji in order to avoid recess current from flowing into the battery unit which is known to degrade or damage a battery (Yamauchi; ¶6).
Regarding claim 12. Isaji discloses that the first switch (14B) and the second switch (14A) are both a metal-oxide semiconductor field-effect transistor element (¶35 -semiconductor switches such as a MOSFET), the first switch has a first maximum driving voltage value, the second switch has a second maximum driving voltage value (because the switch is a MOSFET, the switch necessarily has a drive voltage in order to fully turn on the MOSFET, because there are two MOSFETs, each will have a drive voltage value).
Although Isaji does not explicitly disclose that the MOSFET is a P-type MOSFET, however, a person of ordinary skill would understand that there a limited number of types of MOSFET’s and with N and P being common types, it would be obvious to try a P-type MOSFET.
Isaji does not explicitly disclose the control unit is configured to: compare the current on the first current path with the current on the second current path based on the first current signal and the second current signal; reduce the second control voltage to reduce an on resistance of the second switch when the current on the first current path is greater than the current on the second current path and the second control voltage does not reach the second minimum driving voltage value; increase the first control voltage to increase an on resistance of the first switch when the current on the first current path is greater than the current on the second current path and the second control voltage reaches the second minimum driving voltage value; reduce the first control voltage to reduce the on resistance of the first switch when the current on the first current path is less than the current on the second current path and the first control voltage does not reach the first minimum driving voltage value; and increase the second control voltage to increase the on resistance of the second switch when the current on the first current path is less than the current on the second current path and the first control voltage reaches the first minimum driving voltage value.
Yamauchi teaches a controller that is configured to compare the current on the first current path with the current on the second current path based on the first current signal and the second current signal (¶16 – first current and second current are compared by a controller);
increase the second control voltage to reduce an on resistance of the second switch when the current on the first current path is greater than the current on the second current path and the second control voltage does not reach the second maximum driving voltage value (¶16 - first switch and second switch are turned to the on/off state based on a current detection information of the first and second current detectors; ¶76-77 - equal current condition is not met – the first switch is turned on Sa1 until the second current reaches an equal-current condition, then the second switch Sb1 is turned on and the first switch is turned off – resistance is decreased in order to turn the switch on);
reduce the first control voltage to increase an on resistance of the first switch when the current on the first current path is greater than the current on the second current path and the second control voltage reaches the second maximum driving voltage value (¶16 - first switch and second switch are turned to the on/off state based on a current detection information of the first and second current detectors; ¶76-77 - equal current condition is not met – the first switch is turned on Sa1 until the second current reaches an equal-current condition, then the second switch Sb1 is turned on and the first switch is turned off – resistance is increased in order to turn the switch off);
increase the first control voltage to reduce the on resistance of the first switch when the current on the first current path is less than the current on the second current path and the first control voltage does not reach the first maximum driving voltage value (¶16 - first switch and second switch are turned to the on/off state based on a current detection information of the first and second current detectors; ¶76-77 - equal current condition is not met – the first switch is turned on Sa1 until the second current reaches an equal-current condition, then the second switch Sb1 is turned on and the first switch is turned off – resistance is decreased in order to turn the switch on); and
reduce the second control voltage to increase the on resistance of the second switch when the current on the first current path is less than the current on the second current path and the first control voltage reaches the first maximum driving voltage value (¶16 - first switch and second switch are turned to the on/off state based on a current detection information of the first and second current detectors; ¶76-77 - equal current condition is not met – the first switch is turned on Sa1 until the second current reaches an equal-current condition, then the second switch Sb1 is turned on and the first switch is turned off – resistance is increased in order to turn the switch off).
It would be obvious to a person of ordinary skill in the art at the time of filing to provide the control of Yamauchi to the controller of Isaji in order to avoid recess current from flowing into the battery unit which is known to degrade or damage a battery (Yamauchi; ¶6).
Related Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Lovell et al. US20170248476A1 discloses in ¶23 a controller (203) controls the opening and closing of the switch 218 according to the comparison of the current of the paths, however, the controller does not control switch 212 on the first path.
Nomura US9570923B2 column 5, lines 9-13 Balance control unit identifies the highest current thereby comparing each of the paths.
Conclusion
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/PAMELA J JEPPSON/Examiner, Art Unit 2859
/DREW A DUNN/Supervisory Patent Examiner, Art Unit 2859
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