DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined
under the first inventor to file provisions of the AIA .
Claims 1-33 are pending and have been examined.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Notes: when present, hyphen separated fields within the hyphens (- -) represent, for example, as (30A - Fig 2B - [0128]) = (element 30A - Figure No. 2B - Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. The same conventions apply to Column and Sentence, for example (19:14-20) = (column19:sentences 14-20). These conventions are used throughout this document.
Claims 26-30 are rejected under 35 U.S.C. 103 as being unpatentable over (Gang et al. (US 20180033850 A1 – hereinafter Gang) in view of Lee et al. (US 20210202659 A1 - hereinafter Lee) and Jin et al. (US 20130256723 A1 – hereinafter Jin).
Regarding independent claim 26, Gang teaches:
A display panel (150 – Fig. 1 – [0035] – “display panel 150
displays”) comprising:
a substrate (SUB – Fig. 6 – [0060] – “substrate SUB”);
a bank (BNK – Fig. 6 – [0088] – “bank layer BNK defining pixels is positioned on
the substrate SUB”) on the substrate (SUB), the bank (BNK) including an opening (Fig. 6 annotated, see below, hereinafter ‘OP’);
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a subpixel (SP – Fig. 1 – [0035] – “subpixels SP”) on the substrate (SUB), the subpixel (SP) including a thin film transistor (DR – Fig. 6 – [0067] – “driving transistor DR”)
and a light emitting element (OLED – Fig. 6 – [0068] – “organic light emitting diode OLED”) connected to the thin film transistor (DR – Fig. 6 shows this), the light emitting element (OLED) in the opening (OP – Fig. 7 annotated, see below, shows this) of the bank (BNK) and including an anode electrode (ANO – Fig. 7 – [0058] – “first electrode ANO”), a light emitting layer (EML – Fig. 7 – [0068] – “emission layer EML”) on the anode electrode (ANO), and a cathode electrode (CAT – Fig. 7 – [0069] – “organic light emitting diode OLED includes a second electrode CAT on the emission layer EML”) on the light emitting layer (EML);
a first signal line configured to supply a first signal to the subpixel; and
a first active pattern comprising a first cutting area that disconnects the first signal line and
the subpixel, the first cutting area overlapping the light emitting element,
wherein the active pattern comprises a material having oxide.
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Gang does not expressly disclose the other limitations of claim 1.
However, in an analogous art, Lee teaches
a thin film ([0057] – “driving thin film transistor TFT” – hereinafter ‘DR’) transistor,
a first signal line (RL – Fig. – [0244] – “branch line RBL includes a long line portion RBL-1 in a first direction x and a branch portion RBL-2 which is bent from the line portion RBL-1 in a second direction y intersecting the first direction x and is connected to a pixel circuit. The line portion RBL-1 is connected to a reference voltage line RL and intersects data lines DL1 and DL2”) configured to supply a first signal to the subpixel (SP1 – Fig. 22 – [0157] – “first subpixel SP1”); and
a first active pattern (RBL-2 – Fig. 22 – [0247] – “RBL-2 have a multi-layered structure in which a semiconductor layer SEM and a third metal layer ML3 are stacked”) comprising a first cutting area (Fig. 22 – [0243] – “cutting line I-I′ in FIG. 22” – hereinafter ‘CTA’) that disconnects the first signal line (RL) and the subpixel (SP1),
wherein the active pattern (SEM) comprises a material having oxide (SEM – Fig. 11A – [0132] – “semiconductor material is deposited on a buffer layer BUF to form a semiconductor layer SEM on the buffer layer BUF. An oxide semiconductor, for example, indium-gallium-zinc oxide (IGZO), can be selected as the semiconductor material”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the signal line and active pattern structure as taught by Lee into Gang.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable result [0006] – “to providing a display panel in which an aperture ratio of pixels is increased. The present disclosure is directed to providing a repair method of darkening a defective pixel of the display panel.”
To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D.
Gang and Lee do not expressly disclose the other limitations of claim 1.
However, in an analogous art, Jin teaches
the first cutting area (CL – Fig. 3 – [0050] – “structure of the pixel PE cut by the laser according to the cutting line CL of the OLED display”) overlapping (Fig. 3 shows this) the light emitting element (70 – Fig. 3 – [0041] – “organic light emitting diode 70”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the cutting area structure as taught by Jin into Gang and Lee.
An ordinary artisan would have been motivated to use the known technique of Jin in the manner set forth above to produce the predictable result performing a laser cut line overlapping a light emitting element.
To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D.
Regarding claim 27, Gang as modified by Lee and Jin, teaches claim 26 from which claim 27 depends. Gang and Jin do not expressly disclose the limitations of claim 27.
However, in an analogous art, Lee teaches
further comprising:
a second signal line (VDDH – Fig. 13 – [0213] – “power line VDDH”)
configured to supply a second signal (VDDH – Fig. 13 – [0213] – “power line VDDH, which supply power (Vref or EVDD) to a pixel circuit”) to the subpixel (SP1);
and
a second active pattern (ML3 – Fig. 23 – [0231] – “active layer ACT of a transistor TFT can have a multi-layered structure in which a semiconductor layer SEML and a third metal layer ML3 are stacked”) overlapping the light emitting element (OLED – [0078] – “light-emitting element OLED” – Fig. 23 shows this) and
comprising a second cutting area (Fig. 13 annotated, see below – [0213] – “power line VDDH can be melted to disconnect the horizontal power line VDDH without changing the wavelength of the laser beam” – hereinafter ‘CTA2’”) that disconnects the second signal line (VDDH) and the subpixel (SP1), the second cutting area (CTA2) overlapping the bank (BNK – [0080 – “bank BNK” – Fig. 18 shows BNK overlapping the data line DL and CTA2 is near DL therefore CTA2 overlaps BNK),
wherein the second active pattern (ML3) comprises the material having oxide (RBL – Fig. 17 – [0151] – “A multi-layer portion of the branch line RBL, in which the semiconductor layer and the third metal layer are stacked (hereinafter, referred to as a “branch line having a multi-layered structure”)” – RBL contains ACT and SEM, SEM if formed of IGZO, ACT if formed of ML3, therefor ML3 includes IGZO).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the signal line, active pattern, and cutting area structure as taught by Lee into Gang and Jin.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable result as stated above in claim 26.
Regarding claim 28, Gang as modified by Lee and Jin, teaches claim 27 from which claim 28 depends. Gang and Jin do not expressly disclose the limitations of claim 28.
However, in an analogous art, Lee teaches
wherein the second active pattern (ML3) overlaps a light emitting element
(OLED) of another subpixel ([0231] – “active layer ACT of a transistor TFT can have a multi-layered structure in which a semiconductor layer SEML and a third metal layer ML3 are stacked” – each subpixel has a transistor therefor ML3 also overlaps OLED of another subpixel).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the second active pattern structure as taught by Lee into Gang and Jin.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable result as stated above in claim 26.
Regarding claim 29, Gang as modified by Lee and Jin, teaches claim 26 from which claim 29 depends. Gang and Jin do not expressly disclose the limitations of claim 29.
However, in an analogous art, Lee teaches
further comprising:
a color filter (CF – Fig. 23 – [0093] – “color filter CF”) between the first active
pattern (SEM) and the light emitting element (OLED – Fig. 23 shows this), and
the color filter (CF) overlapping the first active pattern (SEM) and the light emitting element (OLED – Fig. 23 shows this).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the color filter structure as taught by Lee into Gang and Jin.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable result as stated above in claim 26.
Regarding claim 30, Gang as modified by Lee and Jin, teaches claim 26 from which claim 30 depends. Gang and Jin do not expressly disclose the limitations of claim 30.
However, in an analogous art, Lee teaches
wherein the first active pattern (ACT – Fig. 18 – [0231] – “[0231] – “active layer
ACT of a transistor TFT”) comprises a first layer (SEML – Fig. 23 – [0231] – “active layer ACT of a transistor TFT can have a multi-layered structure in which a semiconductor layer SEML and a third metal layer ML3 are stacked”) and a second layer (ML3 – Fig. 23 – [0231] – “active layer ACT of a transistor TFT can have a multi-layered structure in which a semiconductor layer SEML and a third metal layer ML3 are stacked”) on the first layer (SEML), the first layer (SEML) including oxide semiconductor ({SEML – Fig. 15 – [0219] – “semiconductor layer SEML includes an active layer ACT”}, {SEM – Fig. 11A – [0132] – “semiconductor material is deposited on a buffer layer BUF to form a semiconductor layer SEM on the buffer layer BUF. An oxide semiconductor, for example, indium-gallium-zinc oxide (IGZO), can be selected as the semiconductor material”} – therefore SEML is an oxide semiconductor), and the second layer (ML3) including transparent conductive oxide (RBL – Fig. 17 – [0151] – “A multi-layer portion of the branch line RBL, in which the semiconductor layer and the third metal layer are stacked (hereinafter, referred to as a “branch line having a multi-layered structure”)”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the active pattern structure as taught by Lee into Gang and Jin.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable result as stated above in claim 26.
Claims 31 and 32 are rejected under 35 U.S.C. 103 as being unpatentable over Gang in view of Lee.
Regarding independent claim 31, Gang teaches:
A display panel (150 – Fig. 1 – [0035] – “display panel 150 displays”)
comprising:
a substrate (SUB – Fig. 6 – [0060] – “substrate SUB”);
a bank (BNK – Fig. 6 – [0088] – “bank layer BNK defining pixels is positioned on
the substrate SUB”) on the substrate (SUB), the bank (BNK) including an opening (Fig. 6 annotated, see below, hereinafter ‘OP’);
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a subpixel (SP – Fig. 1 – [0035] – “subpixels SP”) on the substrate (SUB), the
subpixel (SP) including a thin film transistor (DR – Fig. 6 – [0067] – “driving transistor DR”) and a light emitting element (OLED – Fig. 6 – [0068] – “organic light emitting diode OLED”) connected to the thin film transistor (DR – Fig. 6 shows this), the light emitting element (OLED) in the opening (OP – Fig. 7 annotated, see below, shows this) of the bank (BNK) and including an anode electrode (ANO – Fig. 7 – [0058] – “first electrode ANO”), a light emitting layer (EML – Fig. 7 – [0068] – “emission layer EML”) on the anode electrode (ANO), and a cathode electrode (CAT – Fig. 7 – [0069] – “organic light emitting diode OLED includes a second electrode CAT on the emission layer EML”) on the light emitting layer (EML);
a signal line configured to supply a signal to the; and
an active pattern comprising a cutting area that disconnects the signal line and the subpixel,
the cutting area overlapping the bank and non-overlapping the light emitting element,
wherein the active pattern comprises a material having oxide.
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Gang does not expressly disclose the other limitations of claim 1.
However, in an analogous art, Lee teaches
a thin film ([0057] – “driving thin film transistor TFT” – hereinafter ‘DR’) transistor,
a signal line (RL – Fig. – [0244] – “branch line RBL includes a long line portion RBL-1 in a first direction x and a branch portion RBL-2 which is bent from the line portion RBL-1 in a second direction y intersecting the first direction x and is connected to a pixel circuit. The line portion RBL-1 is connected to a reference voltage line RL and intersects data lines DL1 and DL2”) configured to supply a signal to the subpixel (SP1 – Fig. 22 – [0157] – “first subpixel SP1”); and
an active pattern comprising a cutting area (Fig. 22 – [0243] – “cutting line I-I′ in FIG. 22” – hereinafter ‘CTA’) that disconnects the signal line (RL) and the subpixel (SP1 – Fig. 2 shows this),
the cutting area (CTA) overlapping the bank (BNK) and non-overlapping the light emitting element (OLED – [0078] – “light-emitting element OLED” – Fig. 23 shows this),
wherein the active pattern (SEM) comprises a material having oxide (SEM – Fig. 11A – [0132] – “semiconductor material is deposited on a buffer layer BUF to form a semiconductor layer SEM on the buffer layer BUF. An oxide semiconductor, for example, indium-gallium-zinc oxide (IGZO), can be selected as the semiconductor material”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the signal line and active pattern structure as taught by Lee into Gang.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable result [0006] – “to providing a display panel in which an aperture ratio of pixels is increased. The present disclosure is directed to providing a repair method of darkening a defective pixel of the display panel.”
To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D.
Regarding claim 32, Gang as modified by Lee, teaches claim 31 from which claim 32 depends. Gang does not expressly disclose the limitations of claim 32.
However, in an analogous art, Lee teaches
wherein the first active pattern (ACT – Fig. 18 – [0231] – “[0231] – “active layer
ACT of a transistor TFT”) comprises a first layer (SEML – Fig. 23 – [0231] – “active layer ACT of a transistor TFT can have a multi-layered structure in which a semiconductor layer SEML and a third metal layer ML3 are stacked”) and a second layer (ML3 – Fig. 23 – [0231] – “active layer ACT of a transistor TFT can have a multi-layered structure in which a semiconductor layer SEML and a third metal layer ML3 are stacked”) on the first layer (SEML), the first layer (SEML) including oxide semiconductor ({SEML – Fig. 15 – [0219] – “semiconductor layer SEML includes an active layer ACT”}, {SEM – Fig. 11A – [0132] – “semiconductor material is deposited on a buffer layer BUF to form a semiconductor layer SEM on the buffer layer BUF. An oxide semiconductor, for example, indium-gallium-zinc oxide (IGZO), can be selected as the semiconductor material”} – therefore SEML is an oxide semiconductor), and the second (ML3) including transparent conductive oxide (RBL – Fig. 17 – [0151] – “A multi-layer portion of the branch line RBL, in which the semiconductor layer and the third metal layer are stacked (hereinafter, referred to as a “branch line having a multi-layered structure”)” – RBL contains ACT and SEM, SEM if formed of IGZO, ACT if formed of ML3, therefor ML3 includes IGZO).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the active pattern structure as taught by Lee into Gang.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable result as stated above in claim 31.
Claim 33 is rejected under 35 U.S.C. 103 as being unpatentable over Gang in view of Lee and Kim (US 20200075699 A1 – hereinafter Kim).
Regarding claim 33, Gang as modified by Lee, teaches claim 31 from which claim 33 depends. Gang and Lee do not expressly disclose the limitations of claim 33.
However, in an analogous art, Kim teaches
wherein the bank comprises black material ([0065] – “the first bank 114 can be formed of a black material”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the black material structure as taught by Kim into Gang and Lee.
An ordinary artisan would have been motivated to use the known technique of Kim in the manner set forth above to produce the predictable result of [0008] – “when the light emitting device is formed to be uneven, there is a problem in that scattering reflectance in an off-state of the light emitting display apparatus is increased so that a visual feel in an off-state, that is, a black luminance can be degraded and thus not only the outdoor visibility, but also the contrast ratio can be degraded.
[0009] Therefore, the inventor of the present disclosure invented a light emitting display apparatus having a new structure which improves an outdoor visibility.”
To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D.
Allowable Subject Matter
Claim 1 is allowed.
The following is an examiner’s statement of reasons for allowance:
In reference to claim 1, the prior art of record to the examiner’s knowledge does not teach or render obvious, at least to one skilled in the art, the instant invention regarding wherein the first active pattern of at least one of the first subpixel to the
fourth subpixel is electrically connected to the fourth signal line, the second active pattern of at least one of the first subpixel to the fourth subpixel is electrically connected to one of the second signal line or the third signal line, and the third active pattern of at least one of the first subpixel to the fourth subpixel is electrically connected to the first signal line,
wherein at least one of the first active pattern to the third active pattern of
at least one of the first subpixel to the fourth subpixel includes a cutting area configured to disconnect the at least one of the first
subpixel to the fourth subpixel from at least one of the plurality of signal lines,
wherein cutting areas of the first active pattern and the second active
pattern in the first subpixel and the second subpixel overlap the emission area, and
wherein at least one cutting area of the first active pattern to the third
active pattern in the third subpixel and the fourth subpixel is in the non-emission area in combination with the other recited limitations.
Claims 2-25 depend on claim 1 and are therefore allowable.
Any comments considered necessary by applicant must be submitted no later
than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the
examiner should be directed to GARY ABEL whose telephone number is (571) 272-0246. The examiner can normally be reached Monday - Friday 8:00 am - 5:00 pm (Eastern).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, CHAD M DICKE can be reached on (571) 270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/GRA/
Examiner, Art Unit 2897
/CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897