Prosecution Insights
Last updated: October 02, 2026
Application No. 18/502,605

WIRING SUBSTRATE

Non-Final OA §102
Filed
Nov 06, 2023
Priority
Nov 09, 2022 — JP 2022-179754
Examiner
LEGASPI, EUGENE REY DEVERA
Art Unit
Tech Center
Assignee
Shinko Electric Industries Co., Ltd.
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-60.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
38 currently pending
Career history
24
Total Applications
across all art units
This examiner has no resolved cases yet (career too new); statute-level performance unavailable. The Grant Probability card shows Tech Center averages instead.

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1-7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Suzuki (U.S. Patent Application Publication 20160035661 A1). Regarding claim 1, Suzuki discloses (Title: Support Member, Wiring Substrate, Method for Manufacturing Wiring Substrate, and Method for Manufacturing Semiconductor Package) a wiring substrate (wiring substrate 1, ¶18) comprising: PNG media_image1.png 282 785 media_image1.png Greyscale a metal layer (copper foil 11, ¶20; and/or copper foil 13 comprising of thin foil 13a & thick foil 13b, ¶23); a resin layer (resin layer 12, ¶21) that is laminated on the metal layer (¶23, “The thick foil 13b is adhered to the copper foil 11 by way of the resin layer 12”; FIG. 5a depicts copper foil 13 directly provided on resin layer 12); and a wiring structure (wiring part 20, ¶24) that includes a wiring layer (wiring layer 23, ¶24) and an insulating layer (insulating layer 22, ¶24) that are laminated on the resin layer and in which the wiring layer is located by being brought into contact with the resin layer (¶23-26 Suzuki discloses the arrangement of layers, as depicted in FIG. 5a; wiring layer 23 contacts resin layer 12 through electrical contact. Similarly, wiring layer 23 contacts copper foil layers 13a & 13b through electrical contact). Regarding claim 2, Suzuki further discloses the wiring substrate according to claim 1, as detailed above, wherein the resin layer is made of an insulating resin having etching resistance with respect to an etching solution (solution, ¶67) that is used to remove the metal layer (¶67, “the thin foil 13a is removed to expose the lower surface of the wiring layer 21, so that a bump 74 can be formed on the lower surface of the wiring layer 21. The thin foil 13a formed of copper may be removed by a wet-etching method using, for example, a hydrogen peroxide/sulfuric acid solution, a sodium persulfate solution, or an ammonium persulfate solution”, the solution does not remove/dissolve insulating layer 22, as depicted in FIG. 5B & 5C; ¶35 Suzuki discloses that insulating layer 22 and resin layer 12 are of the same composition, which is then etching resistant to the solution used to remove the metal layer [thin copper foil 13a]). PNG media_image2.png 540 838 media_image2.png Greyscale Regarding claim 3, Suzuki further discloses the wiring substrate according to claim 1, as detailed above, wherein the resin layer is made of an insulating resin that does not include a reinforcement material (¶49, “For example, a film-like non-photosensitive insulating resin (e.g., thermosetting resin) having an epoxy type resin or a polyimide type resin as a main component may be used as the material of the insulating layer 22”; ¶35 Suzuki discloses that insulating layer 22 and resin layer 12 are of the same composition). Regarding claim 4, Suzuki further discloses the wiring substrate according to claim 1, as detailed above, wherein the resin layer (resin layer 12) is made of a same insulating resin as an insulating resin (insulating layer 22) that is used for the insulating layer included in the wiring structure (¶35, “insulating resins having the same compositions are preferred to be used for the resin layer 12 of the support member 10 and the insulating layer 22 of the wiring member 20”). Regarding claim 5, Suzuki further discloses the wiring substrate according to claim 1, as detailed above, wherein the resin layer has a thickness that is thinner than a thickness of the metal layer (¶22, “The thickness of the copper foil 11 is, for example, approximately 7 μm to 50 μm”; ¶77, “The support member 10.sub.3 can be formed to have a desired strength by adjusting the layer thicknesses of the copper foils 11.sub.1, 11.sub.2 and adjusting the layer thicknesses of the resin layers 12.sub.1, 12.sub.2”). Regarding claim 6, Suzuki further discloses the wiring substrate according to claim 1, as detailed above, wherein the resin layer has a thickness that is thinner than a thickness of the wiring layer (¶48, “The thickness of the wiring layer 21 may be, for example, approximately 5 μm to 20 μm”; FIG. 5a depicts resin layer 12 to be thinner in thickness than wiring layer 23). Regarding claim 7, Suzuki further discloses the wiring substrate according to claim 1, as detailed above, wherein the resin layer has a thickness that is thinner than a thickness of the insulating layer (¶49, “The thickness of the insulating layer 22 may be, for example, approximately 10 μm to 50 μm”; FIG. 5a depicts resin layer 12 to be thinner in thickness than insulating layer 22). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to EUGENE REY D LEGASPI whose telephone number is (571)272-2956. The examiner can normally be reached Monday-Friday 8-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas Hong can be reached at (571) 272-0993. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /E.D.L./Examiner, Art Unit 3729 /THOMAS J HONG/Supervisory Patent Examiner, Art Unit 3729
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Prosecution Timeline

Nov 06, 2023
Application Filed
Aug 26, 2026
Non-Final Rejection mailed — §102 (current)

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Prosecution Projections

1-2
Expected OA Rounds
Grant Probability
Low
PTA Risk
Based on 0 resolved cases by this examiner. Grant probability derived from career allowance rate.

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