DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
The present application is being examined under the claims filed 6/30/2026. Claims 1-3, 5, 9-11, 13, and 19-20 have been amended. Claim 22 is cancelled.
Election/Restrictions
Newly amended claims 11, 19, and 20 are directed to an invention that is independent or distinct from the invention originally claimed for the following reasons:
For elected Invention I, claims 1-10 and 21 are directed to a method/CRM/system collecting operational data over two different time periods and determining degradation of operation of the processing units, classified in G06F2212/1032. However, Invention II, claims 11-20 are directed to a method/CRM/system collecting operational data of components that are instrumented with a physical temperature sensor and estimating operational data of components that are not instrumented with a physical temperature sensor, classified in G06F11/3089. Applicant’s intention to diverge the claimed inventions between claim 1 and claim 11 has also been recorded in the interview summary held on 6/22/2026.
Since applicant has received an action on the merits for the originally presented invention, this invention has been constructively elected by original presentation for prosecution on the merits. Accordingly, claims 11-20 have been withdrawn from consideration as being directed to a non-elected invention. See 37 CFR 1.142(b) and MPEP § 821.03.
Response to Arguments
Applicant's arguments filed 6/30/2026 have been fully considered but they are not persuasive. Applicant argues that the applied references to not teach the new features of amended independent claims 1, 9, and 10.
The Examiner respectfully disagrees. Anderson teaches Anderson teaches the limitation “wherein the change in performance indicates a degradation in a health state of the one or more processing units over time, the degradation comprising at least one of an increase in an operating temperature, a deviation from a historical temperature delta, or a variation over time in a correlation between hashrate and temperature” (Anderson [0150] teaches processors may be taken offline or operated with reduced temperature, voltage, and/or frequency based on the condition estimators, where such actions may be taken when condition estimators indicate or are used to determine that one or more of the processor cores is more advanced aged or more likely to fail than other processor cores, where [0040] teaches current characteristics of the processor cores may be determined by measuring thermal output (indicative of thermal behavior, including thermal resistance, thermal capacitance, temperature sensor measurement, thermal cycling, etc.), and [0003] & [0053] teach the higher temperatures of higher leakage components may lead to reduced operating life compared to lower leakage components, where the differences in operating temperature and operating life may increase as the computing device ages, wears, or deteriorates; [0089] teaches a processor could sample current leakage upon boot up or system initialization only, and obtain temperature/thermal measurements periodically).
Therefore, Ma in view of Anderson teaches the amended limitations of claims 1, 9, and 10 as outlined in the rejections below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 5-10, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Ma et. al. (US 2023/0289196 A1) in view of Anderson et. al. (US 2017/0220384 A1).
Regarding Claim 1, Ma discloses a computer-implemented method for processing unit configuration (Ma FIG. 1-2 and abstract), comprising:
collecting a first set of operational data from each processing unit of one or more processing units (Ma par. 20-24, universal operating parameter model is obtained by forming operating parameters of a plurality of data processing devices into a universal operating parameter data set; also see Ma par. 48 and Table 1, showing collecting data for the device running under different sets of configuration parameters (also see par. 8, first set is a universal operating parameter model); and Ma FIG. 1 step 1, operate in a universal optimization configuration [i.e., first set of operating parameters]) during a first time period (Ma FIG. 1 step 1, device is operating in first mode before changing the configuration [data from this set is from running device for a first time period before modifying]);
modifying, based on the first set of operational data, one or more operational parameters of the one or more processing units (Ma FIG. 1 step 2 and par. 44-45, changing the configuration parameters during the operation of the data processing device [i.e., start at the first set of operational data, then modify these parameters] (also see par. 9); also see Ma par. 61, during the operation, based on the universal optimization configuration parameters [i.e., first set of operational data], change the operating parameters);
dynamically configuring the one or more processing units based on the one or more operational parameters (Ma par. 44-45, during runtime [i.e., dynamically], the processor is configured to run based on settings of the operating parameters and change the parameter);
collecting a second set of operational data from each processing unit of the one or more processing units during a second time period (Ma par. 45, obtain dedicated operating parameter data set [i.e., second set of operational data] by changing the frequency of the each hash chip, the temperature of the hashboard, and/or the power supply output voltage of the data processing device; and Ma par. 48 and Table 1, showing collecting multiple sets of data for the device running under different operating parameters; also see Ma par. 61, change the configuration parameters of the data processing device to obtain a dedicated operating parameter data set);
determining, using at least one metric, at least one change in performance of the one or more processing units by calculating a performance difference between the first set of operational data and the second set of operational data (Ma par. 50, optimal configuration parameters [metric used are the computing power of the mining machine and the power of the mining machine] are found by traversing various value combinations of the frequency of each hash chip of the 100 hash chips [i.e., change in performance of the processing units based on comparing various configurations from the first set of operational data and the second set of operational data, i.e. a change in Capability Parameters between different configuration parameters is compared in order to find the optimal configuration parameters; see also Table 1 “Computing power” for various configurations adjusting frequencies of each hash chip, temperature of a hashboard, and power supply output voltage]; [a comparison would occur between the computer power of the existing configuration parameter [i.e., from the first set] and the computing power of other traversed configuration parameters [i.e., from the second set], see response to arguments]),
determining a modified configuration […] (Ma par. 50, determine the optimal configuration parameters [i.e., modified configuration] using the change in the computing power of the mining machine and the power of the mining machine [i.e., change in performance of the processing units] across the various configuration parameters; and Ma par. 61, using the optimal configuration avoids a waste of the computing power of the data processing device); and
configuring each processing unit of the one or more processing units for operation based on the modified configuration by adjusting an operating voltage or an operating frequency of the processing unit […] (Ma FIG. 1 step 4, operate [i.e., configure] the device to operate in the discovered optimal configuration [i.e., modified configuration]; and Ma par. 50, an optimal configuration includes the configuring the frequency of each hash chip of the 100 hash chips [i.e., each chip of the processing unit is configured for operation]; see also Table 1 frequency of each hash chip), wherein each processing unit of the one or more processing units is a chip (Ma par. 3, virtual mining machines contain hash chips to perform mining; and Ma par. 48, the example mining machine includes 100 hash chips).
Ma does not appear to explicitly teach:
wherein the change in performance indicates a degradation in a health state of the one or more processing units over time, the degradation comprising at least one of an increase in an operating temperature, a deviation from a historical temperature delta, or a variation over time in a correlation between hashrate and temperature; to mitigate the degradation in the health state.
In the analogous art of allocating resources and monitoring component health, Anderson teaches:
wherein the change in performance indicates a degradation in a health state of the one or more processing units over time, the degradation comprising at least one of an increase in an operating temperature, a deviation from a historical temperature delta, or a variation over time in a correlation between hashrate and temperature (Anderson [0150] teaches processors may be taken offline or operated with reduced temperature, voltage, and/or frequency based on the condition estimators, where such actions may be taken when condition estimators indicate or are used to determine that one or more of the processor cores is more advanced aged or more likely to fail than other processor cores, where [0040] teaches current characteristics of the processor cores may be determined by measuring thermal output (indicative of thermal behavior, including thermal resistance, thermal capacitance, temperature sensor measurement, thermal cycling, etc.), and [0003] & [0053] teach the higher temperatures of higher leakage components may lead to reduced operating life compared to lower leakage components, where the differences in operating temperature and operating life may increase as the computing device ages, wears, or deteriorates; [0089] teaches a processor could sample current leakage upon boot up or system initialization only, and obtain temperature/thermal measurements periodically);
determining a modified configuration to mitigate the degradation in the health state; and configuring each processing unit of the one or more processing units for operation based on the modified configuration by adjusting an operating voltage or an operating frequency of the processing unit to mitigate the degradation in the health state (Anderson par. 161 teaches assigning less demanding work to the computing device component exhibiting a worse condition, while assigning more demanding work to less aged computing device components. Assigning less demanding work to the computing device component may enable the component to execute the work load at a lower voltage and/or lower frequency, thereby enabling the component to operate at a lower temperature, than if the computing device component were assigned other workloads; par. 151, condition estimators [including temperature sensors, see par. 131 and FIG. 17] check if the processors exceed a threshold; Anderson par. 150, processors may be configured to operate with reduced temperature based on the condition estimators [i.e., determining temperature threshold based on condition estimate and that operating point satisfies temperature threshold based on condition estimate]; par. 149, workloads are assigned based on temperature, voltage, and/or frequency of the processors [i.e., based on satisfying thresholds])
Therefore, it would have been obvious of one of ordinary skill in the art, having the teachings of Ma and Anderson before them, before the effective filing date of the claimed invention, to combine Ma’s method of finding optimal running parameters with Anderson’s control of frequency based on temperature, the motivation being to extend the life of the component (Anderson par. 161).
Regarding Claim 5, Ma in view of Anderson discloses the computer-implemented method of claim 1,
wherein measurements of temperature are [correlated to] a frequency of operation of the one or more processing units (Ma par. 3, different working frequency points of the hash chips can be determined according to different temperatures; and Ma Table 1 and par. 50, the temperature of the hashboard is a factor for determining optimal operating parameters, which includes the frequency of the processing unit).
Anderson also teaches:
wherein measurements of temperature are used to configure each processing unit based on the modified configuration (see Ma Table 1 “Temperature”; see also Anderson [0149-0151] and [0161] as taught above in claim 1).
The same motivation that was utilized for combining Ma and Anderson as set forth in claim 1 is equally applicable to claim 5.
Regarding Claim 6, Ma in view of Anderson discloses the computer-implemented method of claim 1,
wherein statistical methods are used to [analyze] a large number of measurements from a given processing unit (Ma par. 48 and Table 1, depicting a large number of measurements taken for each hash chip [i.e., measurement unit]; and par. 47 and 49, perform model training on the dedicated operating parameter data set).
Anderson also teaches:
using statistical methods to identify correlations between variables (Anderson par. 130, condition parameter data is stored in a manner that correlates various types of condition parameters with each other; Anderson par 167, thresholds, ranges, and/or types of sensed, measured, counted, and/or timed condition parameters may be used to correlate the condition parameter data).
The same motivation that was utilized for combining Ma and Anderson as set forth in claim 1 is equally applicable to claim 6.
Regrading Claim 7, Ma in view of Anderson discloses the computer-implemented method of claim 1,
wherein statistical methods are used to [for] analyzing a large number of measurements from multiple processing units (Ma par. 59 and Table 2, a large number of measurements from multiple processing units; and Ma par. 61, obtaining the configuration parameters corresponding to the optimal capability parameters using model training).
Anderson also teaches using statistical methods to identify correlations between variables (Anderson par. 130, condition parameter data is stored in a manner that correlates various types of condition parameters with each other; Anderson par 167, thresholds, ranges, and/or types of sensed, measured, counted, and/or timed condition parameters may be used to correlate the condition parameter data).
The same motivation that was utilized for combining Ma and Anderson as set forth in claim 1 is equally applicable to claim 7.
Regarding Claim 8, Ma in view of Anderson teaches the computer-implemented method of claim 1, wherein:
at least one of (i) the first set of operational data or (ii) the second set of operational data
comprises current costs for a unit of energy (Ma par. 48 and Table 1, collected data includes voltage
and computing power, which are used in conjunction to calculate an optimal configuration (also see
par. 50) [computing-capacity/voltage is a cost/energy metric]); or
at least one of (i) the first set of operational data or (ii) the second set of operational data
comprises a type of an energy source that powers the one or more processing units (Ma par. 48 and
Table 1, collected data includes power supply output voltage [i.e., energy source]).
Regarding Claim 9, Ma discloses a non-transitory, computer-readable medium storing one or more instructions executable by a computer system to perform one or more operations for processing unit configuration (Ma par. 63).
The remaining limitations of claim 9 are similar in scope to claim 1 as addressed above and is thus rejected under the same rationale.
Regarding Claim 10, Ma discloses a computer-implemented system for processing unit configuration (Ma par. 7, method for determining configuration parameters of a data processing device), comprising:
one or more computers (Ma FIG. 2, computing device); and
one or more computer memory devices (Ma FIG 2, memory 2) interoperably coupled with the one or more computers and having tangible, non-transitory, machine-readable media storing one or more instructions that, when executed by the one or more computers, perform one or more operations (Ma par. 63)
The remaining limitations of claim 10 are similar in scope to claim 1 as addressed above and is thus rejected under the same rationale.
Regarding Claim 21, Ma discloses the computer-implemented method of claim 1.
Ma does not explicitly teach wherein determining the modified configuration based on the change in performance comprises:
determining a measured temperature of a chip satisfies a temperature threshold, wherein configuring the one or more processing units for operation based on the modified configuration comprises:
configuring the one or more processing units based on the chip satisfying the temperature threshold.
In the analogous art of allocating resources and monitoring component health, Anderson teaches wherein determining the modified configuration based on the change in performance comprises:
determining a measured temperature of a chip satisfies a temperature threshold (Anderson par. 151, condition estimators [including temperature sensors, see par. 131 and FIG. 17] check if the processors exceed a threshold; Anderson par. 150, processors may be configured to operate with reduced temperature based on the condition estimators [i.e., determining temperature threshold based on condition estimate and that operating point satisfies temperature threshold based on condition estimate]), wherein configuring the one or more processing units for operation based on the modified configuration comprises:
configuring the one or more processing units based on the chip satisfying the temperature threshold (Anderson par. 149, workloads are assigned based on temperature, voltage, and/or frequency of the processors [i.e., based on satisfying thresholds]; and Anderson par. 150, processors may be configured to operate with reduced temperature based on the condition estimators [i.e., determining temperature threshold based on condition estimate and that operating point satisfies temperature threshold based on condition estimate])
Therefore, it would have been obvious of one of ordinary skill in the art, having the teachings of Ma and Anderson before them, before the effective filing date of the claimed invention, to combine Ma’s method of adjusting the operating parameters of a chip with Anderson’s use of temperature as a parameter, the motivation being to account for aging to avoid total failure (Anderson par. 39-40).
Claims 2-4 are rejected under 35 U.S.C. 103 as being unpatentable over Ma in view of Anderson as applied to claim 1 above, and further in view of Mehra et. al. (US 2021/0182163 A1) [previously cited].
Regarding Claim 2, Ma in view of Anderson discloses the computer-implemented method of claim 1, comprising:
sequentially pushing the one or more processing units to [various] operating points (Ma par. 48 and Table 1, the operating parameters [frequency, temperature, voltage] of the hash chip [processing unit] is changed [different combination of parameters are tried, which happens sequentially (see par. 49)]); and
determining the at least one change in performance of the one or more processing units when the one or more processing units are at the [various] operating points (Ma par. 48 and Table 1, the operating parameters [frequency, temperature, voltage] of the hash chip [processing unit] at each state is stored [state information must be determined to be stored]).
Ma in view of Anderson does not explicitly disclose that these operating points are extreme operating points. In the analogous art of testing computing components, Mehra teaches:
sequentially pushing the one or more processing units (Mehra FIG. 1, processor 102; and par. 20, targeted parts include cores of the processor 102) to extreme operating points (Mehra par. 20, executing one or more test patterns on the part [i.e., sequentially changing operating point]; Mehra par. 20, the one or more test patterns include stress tests designed to test whether one or more parts will fail under particular configuration or operational settings [i.e., the extreme operating point]);
Therefore, it would have been obvious of one of ordinary skill in the art, having the teachings of Ma, Anderson, and Mehra before them, before the effective filing date of the claimed invention, to combine Ma and Anderson’s testing at various operating points with Mehra’s testing extreme operating points, the motivation being to check performance as components degrade over time (Mehra par. 1), and test whether one or more parts will fail under particular configuration or operational settings (Mehra par. 20) since stress testing known to identify vulnerabilities to ensure system reliability.
Regarding Claim 3, The combination of Ma, Anderson, and Mehra discloses the computer-implemented method of claim 2, wherein determining the at least one change in performance is based on state information including one or more of maximum clock frequency, temperature (Ma Table 1, “temperature of a hashboard” included as a parameter), power used (Ma Table 1, “Power supply output voltage” included as a parameter), minimum necessary voltage, and efficiency (Mehra par. 20, stress test parameters [i.e., testing minimum and maximum possible] include clock speed (e.g., frequency) and voltage; these parameters represent the state in which the part is operating]).
The same motivation that was utilized for combining Ma, Anderson, and Mehra as set forth in claim 2 is equally applicable to claim 3.
Regarding Claim 4, The combination of Ma, Anderson, and Mehra discloses the computer-implemented method of claim 2,
wherein the extreme operating point includes one or more of frequency setpoint, voltage setpoint, ventilation, and ambient conditions (Mehra par. 20, stress test parameters [i.e., testing maximum] include clock speed (e.g., frequency) and voltage, these parameters are used in the test patterns for stress testing, representing extreme operating points).
The same motivation that was utilized for combining Ma, Anderson, and Mehra as set forth in claim 2 is equally applicable to claim 4.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW JUNG whose telephone number is (571)270-3779. The examiner can normally be reached 9:30am-5:30pm ET (Mon-Fri).
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/ANDREW J JUNG/Supervisory Patent Examiner, Art Unit 2175
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