Prosecution Insights
Last updated: April 19, 2026
Application No. 18/502,892

DYNAMIC OPTIMIZATION AND HEALTH MONITORING FOR BLOCKCHAIN PROCESSING DEVICES

Non-Final OA §101§102§103
Filed
Nov 06, 2023
Examiner
WENTZEL, COLE JIAWEI
Art Unit
2175
Tech Center
2100 — Computer Architecture & Software
Assignee
Luxor Technology Corporation
OA Round
3 (Non-Final)
82%
Grant Probability
Favorable
3-4
OA Rounds
3y 1m
To Grant
99%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
9 granted / 11 resolved
+26.8% vs TC avg
Strong +33% interview lift
Without
With
+33.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
24 currently pending
Career history
35
Total Applications
across all art units

Statute-Specific Performance

§101
2.4%
-37.6% vs TC avg
§103
69.3%
+29.3% vs TC avg
§102
14.2%
-25.8% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 11 resolved cases

Office Action

§101 §102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/20/2026 has been entered. Status of Claims The present application is being examined under the claims filed 02/05/2026. Claims 1, 9-11, and 19-20 have been amended. Claim 22 has been cancelled. Claims 1-21 are pending. Claims 1-21 are rejected. Response to Arguments I. Applicant's arguments filed 02/05/2026 have been fully considered but they are not persuasive. II. Regarding the rejection under 35 USC § 101, applicant asserts that “claim 11 is not directed to an abstract idea (i.e., a mental process), but is instead directed to a practical application for adjusting operating conditions for hardware components in a computing system (e.g., an operating voltage or an operating frequency)” Rem 9, and that “This improves the computer's functioning by allowing dynamic optimization of hardware components that lack direct sensors, which is a patent-eligible improvement to computer-related technology” Rem 9. Examiner respectfully disagrees. As addressed in the 35 USC § 101 rejection below, the claim recites an abstract idea because nothing in the claim element, besides the recitation of generic computer components, precludes the step from practically being performed in the mind. The computer-implemented method is recited at a high-level of generality (i.e., as a generic computer with generic memory performing a generic computer function of collecting and analyzing information). The configuring step provides mere instructions to implement the abstract idea on a computer, without adding significantly more. While the estimated data is used to configure the second set of components, this does not reflect an improvement in technology and simply constitutes applying the judicial exception, as the configuring is based on the estimating calculation. The claim itself does not reflect the improvement in technology argued by the applicant, and therefore does not integrate the judicial exception into a practical application. III. Regarding the 35 USC § 103 rejection of claim 1 (and, analogously, claims 9 and 10), applicant argues the rejection of Ma is unreasonably broad. Specifically, applicant states that Ma has not been shown to teach or to suggest determining a "change in performance" resulting from a comparison between first and second data sets, because Ma has not been shown to teach comparing the "universal" (first set) data against the "dedicated" (second set) of data to determine a change in performance and that finding an optimum within one set is not equivalent to determining a change between two distinct sets. In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., “determining a change between two distinct sets”) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Examiner notes that claim 1 states the limitation "determining, using at least one metric, at least one change in performance of the one or more processing units based on a comparison of the first set of operational data and the second set of operational data" (emphasis added).” The claim doesn’t directly require a comparison between data sets, only that a comparison occurs and that comparison is based on the first set of operational data and the second set of operational data. In comparing the performance of the “current configuration” [i.e., a configuration derived from the universal operating parameters, i.e., first data set (Ma par. 61, the data processing device is operated first by using universal optimization configuration parameters of the data processing device, so that the data processing device can operate around the configuration parameters with computing power close to the optimal computing power)] to the performance of the configurations of dedicated operating parameters [i.e., the second data set (Ma par. 50, setting meeting an optimal condition of the capability parameters is found by traversing the dataset [i.e., comparing entries], and Ma Table 1, capability parameters are a part of the datasets)] to get the optimal configuration parameter, a comparison would need to occur between the computer power of the existing configuration parameter [i.e., from the first set] and the computing power of other traversed configuration parameters [i.e., from the second set]. Ma teaches determining a change in performance because a change in Capability Parameters between different configuration parameters is compared in order to find the optimal configuration parameters. IV. Regarding the 35 USC § 103 rejection of claim 11 (and, analogously, claims 19 and 20), applicant argues Ma does not estimate data for different components, and instead it measures them through actual operation to perform model training, whereas the instant application mathematically estimates the second set of data using the first set. In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., "the second set of data is mathematically estimated from the first set" [emphasis added]) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). The limitations recited in claim 11 are as follows: "estimating, based on the first set of operational data, a second set of operational data of a second set of one or more components different from the first set of one or more components." Ma teaches an operation in which the original operating parameters of the data processing device are from the universal set [i.e., the first set], in order to begin the operation at a computing power close to the optimal computing power (Ma par. 61, the data processing device is operated first by using universal optimization configuration parameters of the data processing device, so that the data processing device can operate around the configuration parameters with computing power close to the optimal computing power). Therefore, the operation of modifying the configuration parameters to form the second set of data is a set of estimations of an ideal operating parameter. Furthermore, the training operation referred to in Ma par. 49-50, results in a capability parameter for each row of data, which is a part of the second set of data, as shown in Table 1. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 11-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Regarding Claim 11, the limitations recited of "collecting a first set of operational data…", and "estimating, based on the first set of operational data, a second set of operational data of a second set of one or more components…" as drafted, is a process that, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components. Nothing in the claim element precludes the step from practically being performed in the mind. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the "Mental Processes" grouping of abstract ideas. Accordingly, the claim recites an abstract idea. This judicial exception is not integrated into a practical application. In particular, the claim recites the following additional elements: 1.) a “computer-implemented method for processing unit configuration,” 2) "a first set of one or more component…, wherein the plurality of components are hardware components" 3) "a second set of one or more components" and 4.) "configuring, based on the estimated second set of operation data of the second set of one or more components, the second set of one or more components., wherein configuring the second set of one or more components comprises adjusting an operating voltage or an operating frequency of one or more of the second set of one or more components." The computer-implemented method is recited at a high-level of generality (i.e., as a generic computer with generic memory performing a generic computer function of collecting and analyzing information). The configuring step provides mere instructions to implement the abstract idea on a computer, without adding significantly more. While the estimated data is used to configure the second set of components, this does not reflect an improvement in technology and simply constitutes applying the judicial exception, as the configuring is based on the estimating calculation. While the applicant argues the method reflects “a specific technique to optimize hardware performance (e.g., hashrate vs. thermal limits) where direct measurement may be impossible or inefficient” Rem 9, and “this improves the computer's functioning by allowing dynamic optimization of hardware components that lack direct sensors” Rem 9, the claim itself does not reflect the improvement in technology, and therefore does not integrate the judicial exception into a practical application. Regarding Claims 12-14, and 16, these claims recite determining steps that use the data obtained in the steps in claim 11 in a calculating operation. These limitations do not introduce additional elements that constitute more than an operation that can, under its broadest reasonable expectation, be practically being performed in the mind as discussed above. Regarding Claims 15, this claim recites that the computer-implemented method can be performed by a remote entity. The remote entity does not recite additional structure that amounts to more than a generic computer. Mere instructions to apply an exception using a generic computer cannot provide an inventive concept. Regarding Claims 17 and 18, these claims further discuss the types of data used for the analysis. These limitations do not introduce additional elements that constitute more than an operation that can, under its broadest reasonable expectation, be practically being performed in the mind as discussed above. Regarding Claims 19 and 20, the claims recite the same limitations as claim 11 as cited above, with added structure. Claim 19 introduces genic computing method “instructions executable by a computer system” and Claim 20 introduces “one or more computers” having “one or more computer memory devices.” The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. The computer is recited at a high-level of generality (i.e., as a generic computer with generic memory performing a generic computer function of collecting and analyzing information) such that it amounts no more than mere instructions to apply the exception using a generic computer. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, and 8-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ma et. al. (US 2023/0289196 A1) [previously cited]. Regarding Claim 1, Ma discloses a computer-implemented method for processing unit configuration (Ma FIG. 1-2 and abstract), comprising: collecting a first set of operational data from each processing unit of one or more processing units (Ma par. 20-24, universal operating parameter model is obtained by forming operating parameters of a plurality of data processing devices into a universal operating parameter data set; also see Ma par. 48 and Table 1, showing collecting data for the device running under different sets of configuration parameters (also see par. 8, first set is a universal operating parameter model); and Ma FIG. 1 step 1, operate in a universal optimization configuration [i.e., first set of operating parameters]) during a first time period (Ma FIG. 1 step 1, device is operating in first mode before changing the configuration [data from this set is from running device for a first time period before modifying]); modifying, based on the first set of operational data, one or more operational parameters of the one or more processing units (Ma FIG. 1 step 2 and par. 44-45, changing the configuration parameters during the operation of the data processing device [i.e., start at the first set of operational data, then modify these parameters] (also see par. 9); also see Ma par. 61, during the operation, based on the universal optimization configuration parameters [i.e., first set of operational data], change the operating parameters); dynamically configuring the one or more processing units based on the one or more operational parameters (Ma par. 44-45, during runtime [i.e., dynamically], the processor is configured to run based on settings of the operating parameters and change the parameter); collecting a second set of operational data from each processing unit of the one or more processing units during a second time period (Ma par. 45, obtain dedicated operating parameter data set [i.e., second set of operational data] by changing the frequency of the each hash chip, the temperature of the hashboard, and/or the power supply output voltage of the data processing device; and Ma par. 48 and Table 1, showing collecting multiple sets of data for the device running under different operating parameters; also see Ma par. 61, change the configuration parameters of the data processing device to obtain a dedicated operating parameter data set); determining, using at least one metric, at least one change in performance of the one or more processing units based on a comparison of the first set of operational data and the second set of operational data (Ma par. 50, optimal configuration parameters [metric used are the computing power of the mining machine and the power of the mining machine] are found by traversing various value combinations of the frequency of each hash chip of the 100 hash chips [i.e., change in performance of the processing units based on comparing various configurations from the first set of operational data and the second set of operational data]; [a comparison would occur between the computer power of the existing configuration parameter [i.e., from the first set] and the computing power of other traversed configuration parameters [i.e., from the second set], see response to arguments]); determining a modified configuration based on the change in performance (Ma par. 50, determine the optimal configuration parameters [i.e., modified configuration] using the change in the computing power of the mining machine and the power of the mining machine [i.e., change in performance of the processing units] across the various configuration parameters; and Ma par. 61, using the optimal configuration avoids a waste of the computing power of the data processing device); and configuring each processing unit of the one or more processing units for operation based on the modified configuration (Ma FIG. 1 step 4, operate [i.e., configure] the device to operate in the discovered optimal configuration [i.e., modified configuration]; and Ma par. 50, an optimal configuration includes the configuring the frequency of each hash chip of the 100 hash chips [i.e., each chip of the processing unit is configured for operation]), wherein each processing unit of the one or more processing units is a chip (Ma par. 3, virtual mining machines contain hash chips to perform mining; and Ma par. 48, the example mining machine includes 100 hash chips). Regarding Claim 9, Ma discloses a non-transitory, computer-readable medium storing one or more instructions executable by a computer system to perform one or more operations for processing unit configuration (Ma par. 63). The remaining limitations of claim 9 are similar in scope to claim 1 as addressed above and is thus rejected under the same rationale. Regarding Claim 10, Ma discloses a computer-implemented system for processing unit configuration (Ma par. 7, method for determining configuration parameters of a data processing device), comprising: one or more computers (Ma FIG. 2, computing device); and one or more computer memory devices (Ma FIG 2, memory 2) interoperably coupled with the one or more computers and having tangible, non-transitory, machine-readable media storing one or more instructions that, when executed by the one or more computers, perform one or more operations (Ma par. 63) The remaining limitations of claim 10 are similar in scope to claim 1 as addressed above and is thus rejected under the same rationale. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 2-4 are rejected under 35 U.S.C. 103 as being unpatentable over Ma in view of Mehra et. al. (US 2021/0182163 A1) [previously cited]. Regarding Claim 2, Ma discloses the computer-implemented method of claim 1, comprising: sequentially pushing the one or more processing units to [various] operating points (Ma par. 48 and Table 1, the operating parameters [frequency, temperature, voltage] of the hash chip [processing unit] is changed [different combination of parameters are tried, which happens sequentially (see par. 49)]); and determining state information of the one or more processing units when the one or more processing units are at the [various] operating points (Ma par. 48 and Table 1, the operating parameters [frequency, temperature, voltage] of the hash chip [processing unit] at each state is stored [state information must be determined to be stored]). Ma does not explicitly disclose that these operating points are extreme operating points. In the analogous art of testing computing components, Mehra teaches: sequentially pushing the one or more processing units (Mehra FIG. 1, processor 102; and par. 20, targeted parts include cores of the processor 102) to extreme operating points (Mehra par. 20, executing one or more test patterns on the part [i.e., sequentially changing operating point]; Mehra par. 20, the one or more test patterns include stress tests designed to test whether one or more parts will fail under particular configuration or operational settings [i.e., the extreme operating point]); Therefore, it would have been obvious of one of ordinary skill in the art, having the teachings of Ma and Mehra before them, before the effective filing date of the claimed invention, to combine Ma’s testing at various operating points with Mehra’s testing extreme operating points, the motivation being to check performance as components degrade over time (Mehra par. 1), and test whether one or more parts will fail under particular configuration or operational settings (Mehra par. 20) since stress testing known to identify vulnerabilities to ensure system reliability. Regarding Claim 3, The combination of Ma and Mehra discloses the computer-implemented method of claim 2, wherein the state information includes one or more of maximum clock frequency, temperature (Ma Table 1, “temperature of a hashboard” included as a parameter), power used (Ma Table 1, “Power supply output voltage” included as a parameter), minimum necessary voltage, and efficiency (Mehra par. 20, stress test parameters [i.e., testing minimum and maximum possible] include clock speed (e.g., frequency) and voltage; these parameters represent the state in which the part is operating]). Regarding Claim 4, The combination of Ma and Mehra discloses the computer-implemented method of claim 2, wherein the extreme operating point includes one or more of frequency setpoint, voltage setpoint, ventilation, and ambient conditions (Mehra par. 20, stress test parameters [i.e., testing maximum] include clock speed (e.g., frequency) and voltage, these parameters are used in the test patterns for stress testing, representing extreme operating points). Claims 5-7 and 11-22 are rejected under 35 U.S.C. 103 as being unpatentable over Ma in view of Anderson et. al. (US 2017/0220384 A1) [previously cited]. Regarding Claim 5, Ma discloses the computer-implemented method of claim 1, wherein measurements of temperature are [correlated to] a frequency of operation of the one or more processing units (Ma par. 3, different working frequency points of the hash chips can be determined according to different temperatures; and Ma Table 1 and par. 50, the temperature of the hashboard is a factor for determining optimal operating parameters, which includes the frequency of the processing unit). Ma does not explicitly teach wherein measurements of temperature are used to control a frequency of operation of the one or more processing units. In the analogous art of allocating resources and monitoring component health, Anderson teaches: wherein measurements of temperature are used to control a frequency of operation of the one or more processing units (Anderson par. 167, condition parameters are correlated; and Anderson par. 161, work at a lower temperature is achieved by lowering frequency). Therefore, it would have been obvious of one of ordinary skill in the art, having the teachings of Ma and Anderson before them, before the effective filing date of the claimed invention, to combine Ma’s method of finding optimal running parameters with Anderson’s control of frequency based on temperature, the motivation being to extend the life of the component (Anderson par. 161). Regrading Claim 6, Ma discloses the computer-implemented method of claim 1, wherein statistical methods are used to [analyze] a large number of measurements from a given processing unit (Ma par. 48 and Table 1, depicting a large number of measurements taken for each hash chip [i.e., measurement unit]; and par. 47 and 49, perform model training on the dedicated operating parameter data set). Ma does not explicitly teach wherein statistical methods are used to identify correlations between variables by analyzing a large number of measurements from a given processing unit. In the analogous art of allocating resources and monitoring component health, Anderson teaches: using statistical methods to identify correlations between variables (Anderson par. 130, condition parameter data is stored in a manner that correlates various types of condition parameters with each other; Anderson par 167, thresholds, ranges, and/or types of sensed, measured, counted, and/or timed condition parameters may be used to correlate the condition parameter data). Therefore, it would have been obvious of one of ordinary skill in the art, having the teachings of Ma and Anderson before them, before the effective filing date of the claimed invention, to combine Ma’s method of finding optimal running parameters with Anderson’s correlation of variables, the motivation being to estimate the condition and reliability of the processor (Anderson par. 139). Regrading Claim 7, Ma discloses the computer-implemented method of claim 1, wherein statistical methods are used to [for] analyzing a large number of measurements from multiple processing units (Ma par. 59 and Table 2, a large number of measurements from multiple processing units; and Ma par. 61, obtaining the configuration parameters corresponding to the optimal capability parameters using model training). Ma does not explicitly teach wherein statistical methods are used to identify correlations between variables by analyzing a large number of measurements from multiple processing units. In the analogous art of allocating resources and monitoring component health, Anderson teaches using statistical methods to identify correlations between variables (Anderson par. 130, condition parameter data is stored in a manner that correlates various types of condition parameters with each other; Anderson par 167, thresholds, ranges, and/or types of sensed, measured, counted, and/or timed condition parameters may be used to correlate the condition parameter data). Therefore, it would have been obvious of one of ordinary skill in the art, having the teachings of Ma and Anderson before them, before the effective filing date of the claimed invention, to combine Ma’s method of finding optimal running parameters with Anderson’s correlation of variables, the motivation being to estimate the condition and reliability of the processor (Anderson par. 139). Regarding Claim 11, Ma discloses a computer-implemented method for processing unit configuration (Ma par. 7, method for determining configuration parameters of a data processing device), comprising: collecting a first set of operational data of a first set of one or more components of a plurality of components based on one or more measurements performed […] (Ma par. 61, first operate using universal optimization configuration parameters [i.e., first set of operational data] of the data processing device [universal optimization configuration is obtained before FIG. 1 step 1, forming operating parameters of a plurality of data processing devices [multiple devices [i.e., first set of one or more components] are used to form the set to find the universal configuration dataset], see par. 51]), wherein the plurality of components are hardware components (Ma par. 48, collected data includes the frequency of the each hash chip, the temperature of the hashboard, and/or the power supply output voltage [hash chips and the hashboard are hardware components]); and estimating, based on the first set of operational data, a second set of operational data of a second set of one or more components different from the first set of one or more components (Ma par. 61, staring using universal optimization configuration parameters [i.e., based on the first set of operational data] and change the operation parameters to get a second set of data [the operation of modifying the configuration parameters to form the second set of data is a set of estimations of an ideal operating parameter]; and par. 44-45, changing the configuration parameters of the data processing device yields the dedicated operating parameter data set [i.e., second set of data]; or Ma par. 49-50, perform model training targeted at the mining machine itself to get an estimate of capability parameters for each item in the dedicated operating parameter data set, which results in a capability parameter for each row of data in the second set of data, as shown in Table 1); and configuring, based on the estimated second set of operation data of the second set of one or more components, the second set of one or more components., wherein configuring the second set of one or more components comprises adjusting an operating voltage or an operating frequency of one or more of the second set of one or more components (Ma FIG. 1 step 4, operate [i.e., configure] the device to the discovered optimal configuration [i.e., estimated set of data for the components, see par. 49-50, optimal configuration is selected based on the capability parameters resulting from model training on the second data set]; and Ma Table 1 and par. 50, optimal capability parameters for final configuration include the frequency of each hash chip). In the analogous art of allocating resources and monitoring component health, Anderson teaches collecting a first set of operational data of a first set of one or more components of a plurality of components based on one or more measurements performed using one or more sensors (Anderson FIG. 17, sensors 1704) associated with the first set of one or more components (Anderson par. 129, sensors 1704 may be configured for sensing, measuring, counting, and/or timing condition parameters for any number of criteria for any number of computing device components), wherein the plurality of components are hardware components (Anderson FIG. 17 and par. 128, the processor cores 320, 321, 322, 324, 326, the multi-core processors, and the random access memory 1706, individually or collectively, are referred to as “computing device components.”); Therefore, it would have been obvious of one of ordinary skill in the art, having the teachings of Ma and Anderson before them, before the effective filing date of the claimed invention, to combine Ma’s method of finding optimal running parameters with Anderson’s associated sensors, the motivation being to monitor and compare the performance of like components to detect component degradation (Anderson par. 129 and 159). Regarding Claim 12, Ma in view of Anderson teaches the computer-implemented method of claim 11, comprising: determining a correlation of operational data between at least one component of the first set of one or more components and at least one component of the second set of one or more components (Anderson par. 120, efficiency/inefficiency of the processor core may be related to its power consumption and/or performance; and Anderson par. 146, condition of multiple processors [derived from operational data (see par. 129))] are compared against each other for balancing). Regarding Claim 13, Ma in view of Anderson teaches the computer-implemented method of claim 12, comprising: determining, as a determined correlation, a configuration for operating the second set of one or more components based on the determined correlation (Anderson par. 121, priority of a processor [which affects operating parameters (see par. 64)] is assigned based on correlating performance of different processors). Regarding Claim 14, Ma in view of Anderson teaches the computer-implemented method of claim 11, comprising: determining, from at least one of (i) the first set of operation data or (ii) the second set of operational data, an incipient failure of any one or more of the first set of one or more components or the second set of one or more components, respectively (Anderson par. 144, data reported from the component is used to determine failure of a computing device component). Regarding Claim 15, Ma in view of Anderson teaches the computer-implemented method of claim 11, wherein the computer-implemented method is performed by a remote entity (Anderson par. 45, wireless network 30 and/or a wired connection 44 to the Internet 40 may be used to communicate operational data and/or test data of the computing device 10 to the processor core manufacturer server 50; and Anderson par. 191, computer 1200 may have one or more antenna 1208 for sending and receiving signals to wireless data link and/or cellular telephone transceiver 1216 coupled to the multi-core processor 1211). Regarding Claim 16, Ma in view of Anderson teaches the computer-implemented method of claim 11, comprising: determining, from at least one (i) the first set of operation data or (ii) the second set of operational data an optimized configuration for operating at least one component of the one or more components (Ma par. 59 and Tables 1 and 2, operational data stored for various configurations and devices), wherein the optimized configuration causes the at least one component of the one or more components to enter into or maintain an operational state that is optimized for one of: power usage, mean time to failure, an expected error rate, hash rate, a ratio of hash rate and power usage, or a ratio of hash rate and waste heat (Ma par. 61, optimal configuration parameters calculated to avoid a waste of the computing power of the data processing device [power usage] and Ma par. 50, obtained capability parameters are an optimal combination of the frequency of the each hash chip, the temperature of the hashboard, and the power supply output voltage; and Anderson par. 146, configure the processor cores, and the multi-core processors to balance aging [mean time to failure]). Regarding Claim 17, Ma in view of Anderson teaches the computer-implemented method of claim 11, wherein at least one of (i) the first set of operational data or (ii) the second set of operational data comprises current costs for a unit of energy (Ma par. 48 and Table 1, collected data includes voltage and computing power, which are used in conjunction to calculate an optimal configuration (also see par. 50) [computing capacity/voltage is a cost/energy metric]). Regarding Claim 18, Ma in view of Anderson teaches the computer-implemented method of claim 11, wherein at least one of (i) the first set of operational data or (ii) the second set of operational data comprises a type of an energy source that powers the first set of one or more components or the second set of one or more components, respectively (Ma Table 1 and par. 60, power supply [i.e., a type of an energy source] is included in the data; or Anderson par. 189-190, the system may be configured for different power sources [ex. USB, FireWire, Thunderbolt, PCIe, or rechargeable battery]). Regarding Claim 19, Ma discloses a non-transitory, computer-readable medium storing one or more instructions executable by a computer system to perform one or more operations (Ma par. 63): The remaining limitations of claim 19 are similar in scope to claim 11 as addressed above and is thus rejected under the same rationale. Regarding Claim 20, Ma discloses a computer-implemented system, comprising (Ma par. 7, method for determining configuration parameters of a data processing device), comprising: one or more computers (Ma FIG. 2, computing device); and one or more computer memory devices (Ma FIG 2, memory 2) interoperably coupled with the one or more computers and having tangible, non-transitory, machine-readable media storing one or more instructions that, when executed by the one or more computers, perform one or more operations (Ma par. 63); The remaining limitations of claim 20 are similar in scope to claim 11 as addressed above and is thus rejected under the same rationale. Regarding Claim 21, Ma discloses the computer-implemented method of claim 1. Ma does not explicitly teach wherein determining the modified configuration based on the change in performance comprises: determining a measured temperature of a chip satisfies a temperature threshold, wherein configuring the one or more processing units for operation based on the modified configuration comprises: configuring the one or more processing units based on the chip satisfying the temperature threshold. In the analogous art of allocating resources and monitoring component health, Anderson teaches wherein determining the modified configuration based on the change in performance comprises: determining a measured temperature of a chip satisfies a temperature threshold (Anderson par. 151, condition estimators [including temperature sensors, see par. 131 and FIG. 17] check if the processors exceed a threshold; Anderson par. 150, processors may be configured to operate with reduced temperature based on the condition estimators [i.e., determining temperature threshold based on condition estimate and that operating point satisfies temperature threshold based on condition estimate]), wherein configuring the one or more processing units for operation based on the modified configuration comprises: configuring the one or more processing units based on the chip satisfying the temperature threshold (Anderson par. 149, workloads are assigned based on temperature, voltage, and/or frequency of the processors [i.e., based on satisfying thresholds]; and Anderson par. 150, processors may be configured to operate with reduced temperature based on the condition estimators [i.e., determining temperature threshold based on condition estimate and that operating point satisfies temperature threshold based on condition estimate]) Therefore, it would have been obvious of one of ordinary skill in the art, having the teachings of Ma and Anderson before them, before the effective filing date of the claimed invention, to combine Ma’s method of adjusting the operating parameters of a chip with Anderson’s use of temperature as a parameter, the motivation being to account for aging to avoid total failure (Anderson par. 39-40). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to COLE JIAWEI WENTZEL whose telephone number is (703) 756-4762. The examiner can normally be reached 9:30am-5:30pm ET (Mon-Fri). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Jung can be reached on (571) 270-3779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.J.W./Examiner, Art Unit 2175 /ANDREW J JUNG/Supervisory Patent Examiner, Art Unit 2175
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Prosecution Timeline

Nov 06, 2023
Application Filed
May 16, 2025
Non-Final Rejection — §101, §102, §103
Aug 21, 2025
Response Filed
Nov 20, 2025
Final Rejection — §101, §102, §103
Jan 26, 2026
Applicant Interview (Telephonic)
Jan 26, 2026
Examiner Interview Summary
Feb 05, 2026
Response after Non-Final Action
Mar 20, 2026
Request for Continued Examination
Mar 24, 2026
Response after Non-Final Action
Mar 31, 2026
Non-Final Rejection — §101, §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
82%
Grant Probability
99%
With Interview (+33.3%)
3y 1m
Median Time to Grant
High
PTA Risk
Based on 11 resolved cases by this examiner. Grant probability derived from career allow rate.

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