DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Invention I, with corresponding claims 1-3, 5-7, 9, 23-25, and 27-33, in the reply filed on 04/27/2026 is acknowledged.
Claim Objections
Claims 5 and 23-24 are objected to because of the following informalities:
Regarding claim 5, “a TSV” should be changed to “a through-silicon via (TSV)”.
Regarding claim 23, “the first surface and second surface” in line 7 should be changed to “the first surface and a second surface”.
Regarding claim 24, “a plurality of dies…a plurality of dies” in line 2 should be changed to “the plurality of dies…the plurality of dies”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claim 30 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. The limitation of claim 30 does not further limit from the limitation of claim 3, which claim 30 depends therefrom. Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 5, 7, 9, and 32 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US 2021/0020602 A1; hereinafter “Chen”).
Regarding claim 1, Chen teaches a method of forming a microelectronic device, comprising: preparing a first surface (a bottom surface) of a first substrate (201 of WF) for direct bonding (Fig. 1A and paragraph 23); thinning the first substrate to form a thinned substrate (201 after a thinning process), wherein the thinned substrate comprises the first surface and a second surface (a top surface) and wherein the first and second surfaces are on opposing sides of the thinned substrate (Fig. 1D and paragraph 26); after thinning, depositing a stress balancing layer (114) onto the second surface (Fig. 2B and paragraph 30); singulating the thinned substrate to form a plurality of dies (SC2) (Fig. 1E and paragraph 27); and direct bonding at least one of the plurality of dies to a second substrate (101 of SC1) (Fig. 2A and paragraphs 28-29).
Regarding claim 5, Chen teaches wherein the first substrate does not include a TSV (Fig. 1A and paragraph 23).
Regarding claim 7, Chen teaches wherein the stress balancing layer comprises a silicon oxide (paragraph 30).
Regarding claim 9, Chen teaches wherein thinning the first substrate comprises thinning the first substrate to have a thickness of about 100 µm or less (paragraph 26, since SC2 is reduced to around 40 µm, a thickness of 201 of SC2 is less than 40 µm).
Regarding claim 32, Chen teaches wherein thinning the first substrate comprises thinning the first substrate to have a thickness of about 50 pm or less (paragraph 26, since SC2 is reduced to around 40 µm, a thickness of 201 of SC2 is less than 40 µm).
Claims 1-2, 5-6, and 33 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Richard et al. (US 2024/0203836 A1; hereinafter “Richard”).
Regarding claim 1, Richard teaches a method of forming a microelectronic device, comprising: preparing a first surface (a top surface) of a first substrate (100) for direct bonding (Fig. 1A and paragraphs 14-15); thinning the first substrate to form a thinned substrate (100 after a thinning process), wherein the thinned substrate comprises the first surface and a second surface (a bottom surface) and wherein the first and second surfaces are on opposing sides of the thinned substrate (Fig. 1B and paragraph 16); after thinning, depositing a stress balancing layer (110) onto the second surface (Fig. 1C and paragraph 17); singulating the thinned substrate to form a plurality of dies (116) (Fig. 1E and paragraphs 19-22); and direct bonding at least one of the plurality of dies to a second substrate (128) (Fig. 1F and paragraphs 23-26).
Regarding claim 2, Richard teaches wherein each of the plurality of dies comprises a portion of the first surface and a portion of the stress balancing layer (Fig. 1E).
Regarding claim 5, Richard teaches wherein the first substrate does not include a TSV (Fig. 1A and paragraph 15).
Regarding claim 6, Richard teaches wherein a portion of the stress balancing layer remains on the at least one of the plurality of dies during direct bonding (Fig. 1F).
Regarding claim 33, Richard teaches wherein singulating the thinned substrate comprises singulating the thinned substrate after depositing the stress balancing layer onto the second surface (Figs. 1C-1E).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 31 is rejected under 35 U.S.C. 103 as being unpatentable over Chen.
Regarding claim 31, while Chen teaches that the stress balancing layer comprises silicon oxide (paragraph 30), it would have been obvious to one skilled in the art to recognize that the silicon oxide from Chen is directed to silicon dioxide (SiO2) as a readily available dielectric material in the semiconductor art.
Claims 23-25 and 27-29 are rejected under 35 U.S.C. 103 as being unpatentable over Richard.
Regarding claim 23, Richard teaches a method of forming a microelectronic device, comprising: providing a first substrate (100) having a first surface (a top surface) (Fig. 1A and paragraph 14); determining a thickness of a stress balancing layer to be formed (110 having a thickness in range of 25 µm to 50 µm) (paragraph 17); thinning the first substrate to form a thinned substrate (100 after a thinning process), wherein the thinned substrate comprises the first surface and second surface (a bottom surface) and wherein the first and second surfaces are on opposing sides of the thinned substrate (Fig. 1B and paragraph 16); forming the stress balancing layer onto the second surface such that the stress balancing layer has the determined thickness (Fig. 1C and paragraph 17); after forming the stress balancing layer onto the second surface, singulating the thinned substrate into a plurality of dies (116) (Fig. 1E and paragraphs 19-22); and direct bonding at least one of the plurality of dies to a second substrate (128) (Fig. 1F and paragraphs 23-26).
While Richard does not explicitly teach “determining a bow of the first substrate”, it would have been obvious to one of ordinary skill in the art to recognize and determine that the silicon wafer 100 from Richard in Fig. 1A and paragraph 14 is directed to a 300 mm (12 inch) silicon wafer with about 750 µm thickness as a readily available bare silicon wafer for producing desired integrated circuits thereon, wherein such bare silicon wafer has a standard bow specification value of less than 30 µm as a material property/parameter. Furthermore, even if the silicon wafer 100 from Richard is not the 300mm silicon wafer, different diameter-sized silicon wafers, such as 150mm and 200mm inch silicon wafers, have standard bow specification values as bare silicon wafer material properties for such claimed determination step.
Regarding claim 24, Richard teaches wherein singulating the thinned substrate into a plurality of dies comprises singulating the thinned substrate into a plurality of dies such that each of the plurality of dies has a die size (each of 116 having a size as shown in Fig. 1E) and wherein determining the thickness of the stress balancing layer to be formed is based in part on the die size (110 formed on 100 of 116 having the size as shown in Fig. 1E).
Regarding claim 25, Richard teaches further comprising: calculating a die bow based in part on the determined bow (see the rejection of claim 23 above, which the standard bow specification value is given for the bare silicon wafer. As such, claimed calculating step is considered merely a determining/understanding the standard bow specification value), wherein determining the thickness of the stress balancing layer to be formed is based in part on the calculated die bow (with the known standard bow specification value as the material property/parameter of the bare silicon die, the thickness is determined to be in range of 25 µm to 50 µm).
Regarding claim 27, while Richard does not teach that the stress balancing layer comprises an inorganic dielectric, Richard teaches the stress balancing layer formed of polymer (paragraph 17) and it would have been obvious to one of ordinary skill in the art to recognize that polymer also includes inorganic polymer such as silicone as a well-known inorganic dielectric material having predictable dielectric characteristics.
Regarding claim 28, Richard teaches further comprising: after determining the thickness of the stress balancing layer to be formed, determining an amount of dielectric to be deposited based in part on the determined thickness of the stress balancing layer, wherein forming the stress balancing layer onto the second surface comprises depositing the determined amount of dielectric onto the second surface (paragraph 17, determining am amount of 110 such that the thickness of 110 to be in range of 25 µm to 50 µm).
Regarding claim 29, Richard teaches wherein determining the bow of the first substrate is conducted before thinning the first substrate (see the rejection of claim 23 above, which the standard bow specification value is given for the bare silicon wafer. As such, the standard bow specification value is known before the thinning process of the silicon wafer).
Allowable Subject Matter
Claim 3 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL B WHALEN whose telephone number is (571)270-3418. The examiner can normally be reached on M-F: 8AM-5PM.
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/DANIEL WHALEN/Primary Examiner, Art Unit 2893
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