Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tanaka (US 9035717 B2), hereafter, referred to as “Tanaka”.
Regarding claim 1, in the embodiment of Figs. 8, Tanaka discloses:
A balanced-unbalanced transformer circuit (Fig. 8, balun transformer 1C) comprising:
a main line (transmission line 11) constituted by a transmission line having a first end (end connected to unbalanced terminal P1) and a second end (end connected to low pass filter 21);
a sub-line (transmission line 12) coupled to the main line, the sub-line being constituted by a transmission line having a third end (end connected to ground) and a fourth end (end connected to high pass filter 22);
an unbalanced node (unbalanced terminal P1) to which an unbalanced signal is input and from which the unbalanced signal is output, the unbalanced node being connected to the first end (column 1 lines 26-37);
a first LC resonant circuit (low pass filter 21 is comprised of an LC circuit as shown in Fig. 8) connected between the second end and the reference potential (21 is connected to ground (i.e. reference potential) as shown in Fig. 8) or between the third end and a reference potential;
a first balanced node (node connected to supply terminal P4 and/or node connected to balanced terminal P2 in Fig. 10) and a second balanced node (node between C2 and balanced terminal P3) to which a balanced signal is input and from which the balanced signal is output (column 1 lines 30-37, balanced signal is inputted and outputted terminals P2 and P3),
wherein the main line and the sub-line are coupled to each other such that a direction from the first end toward the second end of the main line is identical to a direction from the third end toward the fourth end of the sub-line (transmission lines 11 and 12 form a directional coupler 23),
wherein the second end and the third end are connected to the reference potential (second and third ends are connected to ground, as shown in Fig. 8), and
wherein the first balanced node and the second balanced node are connected to the unbalanced node and the fourth end, respectively (Fig. 8, node connected to P4 and node connected to P3 are between unbalanced terminal P1 and fourth end of transmission line 12).
Regarding claim 2, in the embodiment of Figs. 8, Tanaka discloses:
the first LC resonant circuit is an LC series resonant circuit (L1 and C1 are connected in series, as shown in Fig. 8).
Claims 1, 2, 4, and 5 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by GUNNARSSON et. al. (US 20240072405 A1), hereafter referred to as "GUNNARSSON".
Regarding claim 1, in the embodiment of Figs. 2, GUNNARSSON discloses:
A balanced-unbalanced transformer circuit (Fig. 2, balun circuit 1′) comprising:
a main line (main line 5) constituted by a transmission line having a first end (end connected to unbalanced port 2) and a second end (end connected to series resonant circuits 8″);
a sub-line (sub-line 6) coupled to the main line, the sub-line being constituted by a transmission line having a third end (right end) and a fourth end (left end connected to ground);
an unbalanced node (unbalanced port 2) to which an unbalanced signal is input and from which the unbalanced signal is output, the unbalanced node being connected to the first end (paragraph [0027], unbalance signal is provided to port 2);
a first LC resonant circuit (series resonant circuits 8″) connected between the second end and the reference potential (as shown in Fig. 2) or between the third end and a reference potential (series resonant circuits 8 is connected to ground though element 7);
a first balanced node (terminal 3 of the balanced port) and a second balanced node (terminal 4 of the balanced port) to which a balanced signal is input and from which the balanced signal is output (balance port on terminal 3 and 4 would inherently receive a balanced signal),
wherein the main line and the sub-line are coupled to each other such that a direction from the first end toward the second end of the main line is identical to a direction from the third end toward the fourth end of the sub-line (main and sublines shown to be parallel in Fig. 2),
wherein the second end and the third end are connected to the reference potential (second and third end are connected to ground (i.e. reference potential) through elements 7,8, and 8”), and
wherein the first balanced node and the second balanced node are connected to the unbalanced node and the fourth end, respectively (balanced port (i.e. terminal 3 and 4) is connected to unbalanced port 2 and fourth end through elements 6, and 8).
Regarding claim 2, in the embodiment of Figs. 2, GUNNARSSON discloses:
the first LC resonant circuit is an LC series resonant circuit (series resonant circuits 8 and/or 8”).
Regarding claims 4 and 5, in the embodiment of Figs. 2, GUNNARSSON discloses:
a second LC resonant circuit connected between the second end and the reference potential (series resonant circuits 8″, as seen in Fig. 2) or between the third end and the reference potential (series resonant circuits 8 is connected to third end and ground through element 7),
wherein the second LC resonant circuit is disposed where the first LC resonant circuit is not disposed (as seen in Fig. 2).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3, 6, and 7 are rejected under 35 U.S.C. 103 as being unpatentable over GUNNARSSON et al. (US 20240072405 A1) in further view of DATTA et al. (US 20160049910 A1), hereafter referred to as “GUNNARSSON” and “DATTA”, respectively.
Regarding claims 3 and 7, GUNNARSSON discloses:
the first and second LC resonant circuit.
However, GUNNARSSON is silent in teaching an LC parallel resonant circuit.
DATTA teaches:
an LC parallel resonant circuit (Figs. 7 and 8, harmonic rejection circuit 724 and 824, inductor 812a-812d and a capacitor 810a-810d connected in parallel, as shown in Fig. 8)
It would then have been obvious to have replaced the LC resonant circuits in GUNNARSSON (Fig. 2) with any art recognized equivalent LC parallel resonant circuit, such as the LC parallel resonant circuit taught by DATTA to have a resonant frequency approximately equal to a multiple of an operating frequency (DATTA, paragraph [0053] lines 1-9), thereby suggesting the obviousness of such a combination.
Regarding claim 6, GUNNARSSON, as described in a preceding rejection, discloses:
As an obvious consequence of the above modification the result of the modification includes:
a second LC resonant circuit connected between the second end and the reference potential (series resonant circuits 8″, as seen in Fig. 2) or between the third end and the reference potential (series resonant circuits 8 is connected to third end and ground through element 7),
wherein the second LC resonant circuit is disposed where the first LC resonant circuit is not disposed (as seen in Fig. 2).
Claims 8, 9, and 10 are rejected under 35 U.S.C. 103 as being unpatentable over GUNNARSSON et al. (US 20240072405 A1) and DATTA et al. (US 20160049910 A1) in further view of Matsuyoshi et al. (US 20020067211 A1), hereafter referred to as “GUNNARSSON and DATTA” and “Matsuyoshi”, respectively.
Regarding claims, 8, 9, and 10, GUNNARSSON and DATTA teaches:
A balanced-unbalanced transformer circuit (GUNNARSSON, Fig. 2) configured to operate as a balanced-unbalanced transformer circuit on a radio frequency signal (GUNNARSSON, paragraph [0002]-[0003], BACKGROUND, suppresses spurious emission (i.e. RF emissions))
However, GUNNARSSON and DATTA are silent in teaching an amplifier circuit comprising a first and second balanced-unbalanced transformer circuit and a differential amplifier configured to amplify the balanced signal output from the first balanced-unbalanced transformer circuit.
Matsuyoshi teaches:
An amplifier circuit (Figs. 1 and 3, power amplifier 100) comprising:
a first balanced-unbalanced transformer circuit (balun 103) configured to transform a first unbalanced signal into a balanced signal, and to output the balanced signal (paragraph [0052], lines 1-10, balun 103, transforms unbalanced signal and outputs balanced signals from 103b and 103c, respectively);
a differential amplifier (amplifiers 105 and 106 form a differential amplifier) configured to amplify the balanced signal output from the first balanced-unbalanced transformer circuit (paragraph [0059], balanced outputs 105b and 106b); and
a second balanced-unbalanced transformer circuit (balun 104) configured to transform the balanced signal output from the differential amplifier into a second unbalanced signal (paragraph [0052] lines 15-19, balun 104, balun 104 convert first and second signal into unbalance amplified signals).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to consider including the balanced-unbalanced transformer circuit of GUNNARSSON and DATTA with the amplifier circuit as taught by Matsuyoshi (Figs. 1 and 3) to reduce intermodulation distortion (Matsuyoshi, paragraph [0005]-[0007]), thereby suggesting the obviousness of such a combination.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MALANE LIENG whose telephone number is (571)272-5739. The examiner can normally be reached Monday-Friday 6:30 - 4:00 CST.
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/MALANE LIENG/ Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/ Supervisory Patent Examiner, Art Unit 2843