DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shealy (US2019/0305753, hereinafter Shealy).
Regarding claim 1, Shealy discloses a bulk acoustic wave resonator (Fig. 68B), comprising:
a first carrier substrate (2210);
a barrier layer (6811), located on a main surface of the first carrier substrate and configured to prevent an undesired conductive channel from being generated due to charge accumulation on the main surface of the first carrier substrate (considering the enhancement layer 6811 comprises a semiconductor such as SiC, the limitation of the claimed invention is considered to be anticipated);
a piezoelectric layer (1621), located on a side of the barrier layer away from the first carrier substrate;
a first electrode (1710) and a second electrode (2910), located on opposite sides of the piezoelectric layer in a direction perpendicular to the main surface of the first carrier substrate, wherein the first electrode is disposed on a side of the piezoelectric layer close to the first carrier substrate;
a first passivation layer (1810) and a second passivation layer (2710), respectively covering sidewalls of the first electrode and the second electrode, and surfaces of the first electrode and the second electrode at sides away from the piezoelectric layer; and
a dielectric layer (2011), located between the first passivation layer (1810) and the barrier layer (6811), wherein a first cavity (6810) is provided between the first passivation layer and the dielectric layer, and the first cavity and the first electrode are separated from each other by the first passivation layer (See Fig. 68B).
Regarding claim 2, the barrier layer (6811) is selected from diamond, silicon-carbide, silicon (paragraph [0168]), therefore the limitation of a non- electron-rich, non-conductive, and non-silicon-oxide layer is anticipated.
Regarding claim 3, the first carrier substrate is a semiconductor substrate, and the non-electron-rich, non-conductive, and non-silicon-oxide layer is in contact with the semiconductor substrate. See paragraph [0096] and Fig. 68B.
Regarding claim 4, Shealy discloses the material of the first carrier substrate comprises monocrystalline silicon, and a material of the barrier layer comprises silicon carbide (paragraph [6811]).
Regarding claim 5, Shealy discloses a buffer layer (2220), disposed between the barrier layer and the dielectric layer.
Regarding claim 6, the material of the buffer layer is silicon oxide (paragraph [0096]).
Allowable Subject Matter
Claims 7-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The references of the Prior Art fail to teach or disclose, alone or in obvious combination, the claimed invention as described in claim 7 and comprising the second carrier substrate, the seal ring structure and the recited elements of the claimed structure.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hurwitz discloses a BAW element package comprising a second carrier substrate.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jaydi San Martin whose telephone number is (571)272-2018. The examiner can normally be reached on M-Th 7:45-6:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dedei Hammond can be reached on 571-270-7938. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/J. San Martin/
Primary Examiner, Art Unit 2837
Prosecution Insights