Prosecution Insights
Last updated: April 19, 2026
Application No. 18/504,387

PHOTOELECTRIC CONVERSION DEVICE AND IMAGING SYSTEM

Non-Final OA §102
Filed
Nov 08, 2023
Examiner
NAZRUL, SHAHBAZ
Art Unit
2638
Tech Center
2600 — Communications
Assignee
Canon Kabushiki Kaisha
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
2y 1m
To Grant
95%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allow Rate
569 granted / 634 resolved
+27.7% vs TC avg
Moderate +6% lift
Without
With
+5.5%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
20 currently pending
Career history
654
Total Applications
across all art units

Statute-Specific Performance

§101
2.7%
-37.3% vs TC avg
§103
39.8%
-0.2% vs TC avg
§102
34.0%
-6.0% vs TC avg
§112
10.2%
-29.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 634 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim 19 is objected to because of the following informalities: Claim 19 recites in preamble, “Equipment comprising:”, which should be recited as “An equipment comprising:” Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-6, 12-13, 17-19 is/are rejected under 35 U.S.C. 102(a)(1) and/or 102(a)(2) as being anticipated by Yasu (US 20230266445 A1). Regarding claim 1, Yasu discloses, a photoelectric conversion device (fig. 2) comprising: a pixel array unit (1, fig. 2) including a plurality of pixels (11a, 12a, fig. 2) arranged to form a plurality of columns (fig. 2, Abstract, ¶0058); a plurality of column circuits (4-7, fig. 2, 6) provided corresponding to each of the plurality of columns and to which a pixel signal output from a pixel of the corresponding column is input (¶0093-0100), wherein the pixel array unit includes a first region (11, figs. 2, 5) that is provided with a pixel including a photoelectric conversion unit and to which light is incident (A region where the valid pixels 11a are provided is referred to as a region 11 in the drawing. – ¶0058, fig. 5. Pixel 11a has a photoelectric conversion section PD, see fig. 5), and a second region (12, figs. 2, 5) that is provided with a pixel (122a-3, fig. 5) including no photoelectric conversion units and is shielded from light (The invalid pixel 122a-3 has a structure excluding the photoelectric conversion section PD from the structure of the light-shielded pixel 12a. – ¶0091), wherein the first region and the second region are defined by columns (fig. 2, 5), and wherein the plurality of signal lines includes a first signal line connected to a column circuit corresponding to a column of the first region and not connected to a column circuit corresponding to a column of the second region (see VL from region 11 in fig. 2 going to column circuit 4-7. Also see fig. 6, VSL_1 that carries valid pixels 11a, …pixel signals VSL_1 of the valid pixels 11a in the first row – ¶0115), and a second signal line connected to the column circuit corresponding to the column of the second region and not connected to the column circuit corresponding to the column of the first region (see separate VL from region 12 in fig. 2 going to column circuit 4-7. Also see fig. 6, …As the zero reset signal, either the pixel signal of the light-shielded pixel 12a (in this example, the pixel signal VSL3 or the pixel signal VSL4 – ¶0094). Regarding claim 2, Yasu discloses the photoelectric conversion device according to claim 1, wherein the pixel array unit further includes a third region that is provided with a pixel including a photoelectric conversion unit and is shielded from light (within light shielded region 12, there in a sub-region wherein pixels 12a, 122a-2 and 122a-1 are located, which have PD therein, fig. 5, ¶0091), and wherein the plurality of signal lines further includes a third signal line connected to a column circuit corresponding to a column of the third region and not connected to the column circuit corresponding to the column of the first region and the column circuit corresponding to the column of the second region (fig. 6 column line structure indicates that each column lines and circuits are separate). Regarding claim 3, Yasu discloses the photoelectric conversion device according to claim 1, wherein the pixel array unit further includes a third region that is provided with a pixel including a photoelectric conversion unit and is shielded from light (within light shielded region 12, there in a sub-region wherein pixels 12a, 122a-2 and 122a-1 are located, which have PD therein, fig. 5, ¶0091), and wherein the first signal line is connected to a column circuit corresponding to a column of the third region (pixel 122a-1, which neighbors is understood meeting the limitation, since column lines are neighboring to one another, the “corresponding to a column of the third region” is understood met as neighboring to one another). Regarding claim 4, Yasu discloses the photoelectric conversion device according to claim 1, wherein each of the plurality of column circuits includes a comparison circuit (185, fig. 6) configured to compare the pixel signal with a reference signal (The voltage signal of the vertical signal line VL is input to one input terminal (first input terminal) of the comparator 185 via the capacitor 181. The reference signal RAMP is input to the other input terminal (second input terminal) of the comparator 185 via the capacitor 182. – ¶0099), and wherein each of the first signal line and the second signal line is a signal line connected to the comparison circuit (ibid, ¶0098-0102). Regarding claim 5, Yasu discloses the photoelectric conversion device according to claim 4, wherein each of the first signal line and the second signal line is a signal line configured to supply a control signal for controlling a current consumption of the comparison circuit (The comparison circuit section 6 includes a plurality of comparison circuits 6a each connected to the corresponding vertical signal line VL. Each comparison circuit 6a compares the voltage signal of the vertical signal line VL with the reference signal RAMP. The comparison circuit 6a includes a capacitor (capacitive element) 181, a capacitor 182, a switch 183, a switch 184, a comparator 185, and a sense amplifier 186. The comparison result of the comparator 185 is output as a comparison result signal COM_Out via the sense amplifier 186 and is counted by the corresponding counter 7a. The voltage signal of the vertical signal line VL is input to one input terminal (first input terminal) of the comparator 185 via the capacitor 181. The reference signal RAMP is input to the other input terminal (second input terminal) of the comparator 185 via the capacitor 182. – ¶0098-0099). Regarding claim 6, Yasu discloses the photoelectric conversion device according to claim 4, wherein each of the first signal line and the second signal line is a signal line configured to supply a control signal for controlling a reset operation of the comparison circuit (During the auto-zero operation, the zero reset signal is input to the first input terminal of the comparator 185, and the reference signal RAMP is input to the second input terminal. – ¶0100. Also see ¶0099-0102). Regarding claim 12, Yasu discloses, a photoelectric conversion device comprising: a pixel array unit (1, fig. 2) including a plurality of pixels (11a, 12a, fig. 2) arranged to form a plurality of columns (fig. 2, Abstract, ¶0058); a plurality of column circuits (4-7, fig. 2, 6) provided corresponding to each of the plurality of columns and to which a pixel signal output from a pixel of the corresponding column is input (¶0093-0100); and a plurality of signal lines configured to supply signals to the plurality of column circuits (VL, figs. 2, 4, 6), wherein the pixel array unit includes a first region (11, figs. 2, 5) that is provided with a pixel (122a-3, fig. 5) including a photoelectric conversion unit and to which light is incident (The invalid pixel 122a-3 has a structure excluding the photoelectric conversion section PD from the structure of the light-shielded pixel 12a. – ¶0091), a second region (12, figs. 2, 5) that is provided with a pixel (122a-3, fig. 5) including no photoelectric conversion units and is shielded from light (The invalid pixel 122a-3 has a structure excluding the photoelectric conversion section PD from the structure of the light-shielded pixel 12a. – ¶0091), and a third region that is provided with a pixel including a photoelectric conversion unit and is shielded from light (within light shielded region 12, there in a sub-region wherein pixels 12a, 122a-2 and 122a-1 are located, which have PD therein, fig. 5, ¶0091), wherein the first region, the second region and the third region are defined by columns (figs. 4-6), and wherein the plurality of signal lines includes a first signal line connected to a column circuit corresponding to a column of the third region and not connected to a column circuit corresponding to a column of the second region (see VL from region 11 in fig. 2 going to column circuit 4-7. Also see fig. 6, VSL_1 that carries valid pixels 11a, …pixel signals VSL_1 of the valid pixels 11a in the first row – ¶0115), and a second signal line connected to the column circuit corresponding to the column of the second region and not connected to the column circuit corresponding to the column of the third region (see separate VL from region 12 in fig. 2 going to column circuit 4-7. Also see fig. 6, …As the zero reset signal, either the pixel signal of the light-shielded pixel 12a (in this example, the pixel signal VSL3 or the pixel signal VSL4 – ¶0094). Regarding claim 13, Yasu discloses the photoelectric conversion device according to claim 12, wherein each of the plurality of column circuit includes a comparison circuit (185, fig. 6) configured to compare the pixel signal with a reference signal (The voltage signal of the vertical signal line VL is input to one input terminal (first input terminal) of the comparator 185 via the capacitor 181. The reference signal RAMP is input to the other input terminal (second input terminal) of the comparator 185 via the capacitor 182. – ¶0099), and wherein each of the first signal line and the second signal line is a signal line connected to the comparison circuit (ibid, ¶0098-0102). Regarding claim 17, Yasu discloses an imaging system (502, fig. 2) comprising: the photoelectric conversion device according to claim 1 (see claim 1 rejection above); and a signal processing device (92, fig. 2) configured to process a signal output from the photoelectric conversion device (Abstract, ¶0083-0087). Regarding claim 18, Yasu discloses a movable object (vehicle of fig. 38) comprising: the photoelectric conversion device according to claim 1 (¶0173-0183); and a distance information acquisition unit configured to acquire distance information to an object from a parallax image based on a signal from the photoelectric conversion device (…signal processing section (92) that generates a depth image signal based on conversion results of the plurality of AD conversion circuits, wherein the plurality of pixels (11a, 12a) include a plurality of valid pixels (11a) provided in the row direction and the column direction to correspond to the depth image signal - Abstract); and a control unit configured to control the movable object based on the distance information (12000, fig. 37, ¶0153, ¶0158-0159, ¶0169-0171, ¶0174-0183). Regarding claim 19, Yasu discloses Equipment (fig. 37) comprising: the photoelectric conversion device according to claim 1 (¶0173-0183), and at least one of an optical device corresponding to the photoelectric conversion device (12031, fig. 37, ¶0158-0159), a control device (12051, fig. 37) configured to control the photoelectric conversion device (¶0161-0163, ¶0170-0172), a processing device configured to process a signal output from the photoelectric conversion device (92, fig. 2, ¶0174), a mechanical device that is controlled based on information obtained by the photoelectric conversion device (12010, fig. 37, ¶0155-0156, 0161, ¶0171), a display device configured to display information obtained by the photoelectric conversion device (12062, fig. 37, ¶0164, 0171-0172), and a storage device (93, fig. 2) configured to store information obtained by the photoelectric conversion device (¶0087, ¶0146). Allowable Subject Matter Claims 16 is allowed. The following is an examiner’s statement of reasons for allowance: Regarding claim 16, Yasu discloses a method of driving a photoelectric conversion (¶0002, ¶0062, figs. 7-9) device including: a pixel array unit including a plurality of pixels arranged to form a plurality of columns, a plurality of column circuits provided corresponding to each of the plurality of columns and to which a pixel signal output from a pixel of the corresponding column is input, and a plurality of signal lines configured to supply signals to the plurality of column circuits, wherein the pixel array unit includes a first region that is provided with a pixel including a photoelectric conversion unit and to which light is incident, and a second region that is provided with a pixel including no photoelectric conversion units and is shielded from light, wherein the first region and the second region are defined by columns, and wherein the plurality of signal lines includes a first signal line connected to a column circuit corresponding to a column of the first region and not connected to a column circuit corresponding to a column of the second region, a second signal line connected to the column circuit corresponding to the column of the second region and not connected to the column circuit corresponding to the column of the first region (see substantively similar claim 1 rejection above), However, neither Yasu not other prior arts of record taken alone or in combination reasonably disclose or suggest, wherein each of the plurality of column circuit includes a comparison circuit configured to compare the pixel signal with a reference signal, a switching unit configured to switch the reference signal supplied to the comparison circuit, and a buffer circuit connected between a signal line to which the reference signal is supplied and the comparison circuit, and wherein each of the first signal line and the second signal line is a signal line configured to supply a control signal for controlling the switching unit, the method comprising: outputting, when an AD conversion of the pixel signal of a reset level is performed, a control signal for selecting a first reference signal to the switching unit of the column circuit corresponding to the column of the first region via the first signal line, and a control signal for selecting the first reference signal to the switching unit of the column circuit corresponding to the column of the second region via the second signal line; outputting, when an AD conversion of the pixel signal of a light signal level is performed and an object is low luminance, a control signal for selecting the first reference signal to the switching unit of the column circuit corresponding to the column of the first region via the first signal line, and a control signal for selecting a second reference signal having an amplitude larger than the first reference signal to the switching unit of the column circuit corresponding to the column of the second region via the second signal line; and outputting, when an AD conversion of the pixel signal of a light signal level is performed and an object is high luminance, a control signal for selecting the second reference signal to the switching unit of the column circuit corresponding to the column of the first region via the first signal line, and a control signal for selecting the second reference signal to the switching unit of the column circuit corresponding to the column of the second region via the second signal line. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Claims 7-11, 14-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Prior arts of record taken alone or in combination fails to reasonably disclose or suggest, Regarding claim 7, wherein the first signal line is a signal line configured to supply a first reference signal to the comparison circuit, and wherein the second signal line is a signal line configured to supply a second reference signal different from the first reference signal to the comparison circuit. Claim 8 is allowable for being dependent on allowable claim 7. Regarding claim 9, wherein each of the plurality of column circuit includes a comparison circuit configured to compare the pixel signal with a reference signal, and a switching unit configured to switch the reference signal supplied to the comparison circuit, wherein each of the first signal line and the second signal line is a signal line configured to supply a control signal for controlling the switching unit. Claim 10 is allowable for being dependent on allowable claim 9. Regarding claim 11, wherein each of the plurality of column circuit includes an amplifier circuit configured to amplify the pixel signal, and wherein each of the first signal line and the second signal line is a signal line configured to supply a control signal for controlling a gain of the amplifier circuit. Regarding claim 14, Yasu discloses the photoelectric conversion device according to claim 12, wherein each of the plurality of column circuit includes a comparison circuit configured to compare the pixel signal with a reference signal, and a switching unit configured switch the reference signal supplied to the comparison circuit, and wherein each of the first signal line and the second signal line is a signal line configured to supply a control signal for controlling the switching unit. Regarding claim 15, Yasu discloses the photoelectric conversion device according to claim 12, wherein each of the plurality of column circuit includes an amplifier circuit configured to amplify the pixel signal, and wherein each of the first signal line and the second signal line is a signal line configured to supply a control signal for controlling a gain of the amplifier circuit. Conclusion The prior and/or pertinent art(s) made of record and not relied upon is considered pertinent to applicant's disclosure, are – TORIGE et al. (US 20240030257 A1), Kim et al. (US 20220020804 A1), Noh et al. (US 20230170373 A1) who disclose different image sensor architectures of interest disclosing dark current mitigation pixels of interest. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHBAZ NAZRUL whose telephone number is (571)270-1467. The examiner can normally be reached M-Th: 9.30 am-3 pm, 6.30 pm-9 pm, F: 9.30 am-1.30 pm, 4 pm-8 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lin Ye can be reached on 571-272-7372. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHAHBAZ NAZRUL/Primary Examiner, Art Unit 2638
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Prosecution Timeline

Nov 08, 2023
Application Filed
Mar 07, 2026
Non-Final Rejection — §102 (current)

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
95%
With Interview (+5.5%)
2y 1m
Median Time to Grant
Low
PTA Risk
Based on 634 resolved cases by this examiner. Grant probability derived from career allow rate.

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