DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendment dated 04/02/2026, in which claims 1, 7-8, 16, 19, 26, 31, 33, 42 were amended, claims 11-14, 20-21, 28-29, 39-40 were cancelled, claims 43-45 were added, has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 33-38, 41-42, 45 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 33, claim 33 recites the limitation "the photodetector well". There is insufficient antecedent basis for this limitation in the claim. It is unclear if “photodetector well” is the same or different from “semiconductor well.”
Besides, it is unclear the definition of “a semiconductor well”. As best understood, “a semiconductor well” formed by the step of “forming a semiconductor well in the one or more oxide layers wherein a trench extends from the semiconductor well to the silicon substrate” is an empty cavity and does not include any semiconductor material.
For the purpose of this Action, the above limitation “a semiconductor well”, “the semiconductor well” and “the photodetector well” of claim 33 will be interpreted and examined as --a well--, --the well-- and --the well--.
Claims depending from the rejected claims noted above are rejected at least on the same basis as the claim(s) from which the dependent claims depend.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-10, 15-17, 19, 23-27, 30-38, 41-45 are rejected under 35 U.S.C. 103 as being unpatentable over King et al. (US Pub. 20210343762) in view of Jernigan et al. (US Pub. 20210296524) and Kim (US Pub. 20140273323).
Regarding claim 1, King et al. discloses in Fig. 1, Fig. 6, paragraph [0016], [0020], [0023], [0035]-[0037], [0051], [0055]-[0056] a pixel of a photodetector comprising:
a silicon substrate [20][paragraph [0055]];
one or more dielectric layers [38, 46 and 54] over the substrate [20][paragraph [0035]-[0037]];
a photoactive region [36, 58, 60, 62] or [36, 58, 61] residing within the one or more dielectric layers [38, 46 and 54], the photoactive region [36, 58, 60, 62] or [36, 58, 61] comprising a heterojunction formed of a first Group IVA semiconductor alloy [n-doped Ge alloy 36 and 58] epitaxially extending from an aperture passing through the one or more dielectric layers [38, 46 and 54] to the silicon substrate [20], and a second Group IVA semiconductor alloy [p doped Ge alloy 61/62] extending epitaxially from the first Group IVA semiconductor alloy [n-doped Ge alloy 36 and 58][paragraphs [0016], [0020], [0022]-[0023], paragraph [0037], [0039], [0051], [0056]];
wherein the second Group IVA semiconductor alloy is a binary alloy, the binary alloy is Ge1-xSnx, wherein 0.01 <x< 0.30 [Paragraph [0020], “the dislocation free semiconducting region to form a multiplication zone and an epitaxial layer of a smaller bandgap material subsequently grown on top”. Paragraph [0023] “[t]he well and trench may include a germanium tin alloy… The region may include an alloy including germanium, wherein the alloy is Si1-xGex, Si1-x-yGexSny, or Ge1-xSnx”. Paragraph [0051], “[t]he misfit dislocation free volume 58 is formed as before, but after CMP and surface cleaning epitaxial layer 61 is grown upon it”. Paragraph [0056] “Although embodiments are described above with respect to a specific material, e.g., germanium, it should be realized that materials other than germanium may also be used. For example, alloys of silicon germanium, and tin could be used as well (Si1-xGex, Si1-x-yGexSny, or Ge1-xSnx) where x and y may take values between zero and unity with the sum of all constituents adding to 100 percent”].
Note, the term “epitaxially” directs to product-by-process limitation. “[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Furthermore, "[b]ecause validity is determined based on the requirements of patentability, a patent is invalid if a product made by the process recited in a product-by-process claim is anticipated by or obvious from prior art products, even if those prior art products are made by different processes." Amgen Inc. v. F. Hoffman-La Roche Ltd., 580 F.3d 1340, 1370 n 14, 92 USPQ2d 1289, 1312, n 14 (Fed. Cir. 2009). (MPEP 2113).
King et al. fails to disclose
wherein the first Group IVA semiconductor alloy is a ternary alloy, the ternary alloy is Si1-x-yGexSny.
Jernigan et al. discloses in paragraph [0008], [0020]-[0023], [0028], [0033]
wherein the first Group IVA semiconductor alloy is a ternary alloy, the ternary alloy is Si1-x-yGexSny.
For further providing support that the first Group IVA semiconductor alloy underlying the binary alloy Ge1-xSnx is a ternary alloy Si1-x-yGexSny, Kim is cited.
Kim discloses in Fig. 49, Fig. 50, paragraphs [0052]-[0053]
wherein the first Group IVA semiconductor alloy [n doped GeSiSn emitter] is a ternary alloy, the ternary alloy is Si1-x-yGexSny;
wherein the second Group IVA semiconductor alloy [p doped GeSn base] is a binary alloy, the binary alloy is Ge1-xSnx.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Jernigan et al. and Kim into the method of King et al. to include wherein the first Group IVA semiconductor alloy is a ternary alloy, the ternary alloy is Si1-x-yGexSny. The ordinary artisan would have been motivated to modify King et al. in the above manner for the purpose of providing suitable second Group IVA semiconductor alloy to form heterojunction diode, promoting the formation of a direct band-gap, suppressing the formation of vacancies that degrade minority carrier lifetime and providing more flexibility and control in device fabrication [paragraph [0020]-0023] of Jernigan et al., paragraphs [0052]-[0053] of Kim].
Regarding claims 2 and 23, King et al. discloses the second Group IVA semiconductor alloy is Ge1-xSnx.
Jernigan et al. and Kim discloses the first Group IVA semiconductor alloy is Si1-x-yGexSny.
Kim further discloses in Fig. 49 and Fig. 50
the first Group IVA semiconductor alloy [Si1-x-yGexSny] has a bandgap larger than the second Group IVA semiconductor alloy [Ge1-xSnx].
Thus, the combination of King et al., Jernigan et al. and Kim discloses limitation of claim 2 and claim 23.
Regarding claims 3-4, King et al. discloses in Fig. 6
wherein the aperture has an aspect ratio (length/width) greater than 1;
wherein the aspect ratio is greater than 1.7 [paragraph [0023], “The height of the trench is at least 1.7 times the width of the trench.”
Regarding claims 5 and 24, King et al. discloses in paragraph [0020], [0051]
wherein the first [58] and second [61/62] Group IVA alloys are substantially defect free with misfit dislocation density less than 1 x 106 cm-2 [“defect free”, “misfit dislocation free”, “the critical thickness for defect free growth must not be exceeded to avoid misfit dislocations”.]
Regarding claims 6-10, 25-27, King et al. discloses in Fig. 1, Fig. 2, Fig. 6, paragraph [0039], [0041], claims 1-4
wherein the first Group IVA semiconductor alloy forms a cathode of the photo active region [“the cathode (trench 36 and well 58)”];
wherein the aperture terminates in an n-well region [22] of the silicon substrate [20];
wherein the n-well [22] extends beyond the aperture;
wherein the n-well [22] extends to a n+ source/drain region [26];
wherein the second Group IVA semiconductor alloy [Ge alloy of anode region 61/62] forms an anode of the photoactive region;
wherein the aperture terminates in an n-well region [22] of the silicon substrate [20], the n-well region [22] extends beyond the aperture to a n+ source/drain region [26];
Regarding claim 15, King et al. discloses in Fig. 6
wherein the second Group IVA semiconductor alloy [Ge alloy of anode region 61/62] resides in a well [n well] defined by the first Group IVA semiconductor alloy [Ge alloy 58].
Regarding claims 16-17, 30-31, 41-42, King et al. discloses in paragraph [0013], [0034], [0051]
wherein the photoactive region absorbs radiation in at least one region of an electromagnetic spectrum selected from a group consisting of visible radiation, short-wave infrared radiation (SWIR), mid-wave infrared radiation (MWIR), and long-wave infrared radiation (LWIR);
wherein the photoactive region has a cutoff wavelength of 15 µm or less [cutoff wavelengths up to about 15,000 nm];
wherein the photoactive region of the pixels absorbs infrared radiation having wavelength of 15 µm or less [cutoff wavelengths up to about 15,000 nm];
wherein the photoactive region of the pixels absorbs radiation in at least one region of an electromagnetic spectrum selected from a group consisting of visible radiation, short-wave infrared radiation (SWIR), mid-wave infrared radiation (MWIR), and long-wave infrared radiation (LWIR).
In addition, the combination of King et al., Jernigan et al. and Kim discloses the claimed photoactive region including the claimed materials. Thus, the photoactive region disclosed by King et al., Jernigan et al. and Kim would possess the property/function of “wherein the photoactive region absorbs radiation in at least one region of an electromagnetic spectrum selected from a group consisting of visible radiation, short-wave infrared radiation (SWIR), mid-wave infrared radiation (MWIR), and long-wave infrared radiation (LWIR); wherein the photoactive region has a cutoff wavelength of 15 µm or less; wherein the photoactive region of the pixels absorbs infrared radiation having wavelength of 15 µm or less; wherein the photoactive region of the pixels absorbs radiation in at least one region of an electromagnetic spectrum selected from a group consisting of visible radiation, short-wave infrared radiation (SWIR), mid-wave infrared radiation (MWIR), and long-wave infrared radiation (LWIR).” “Where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977).” MPEP 2112.01.
Regarding claim 19, King et al. discloses in Fig. 1, Fig. 6, paragraph [0005]-[0006], [0016], [0020], [0023], [0035]-[0037], [0051], [0055]-[0056] an imaging system comprising:
an imaging wafer comprising a silicon substrate [20][paragraph [0006], [0055]], and a pixelated focal plane array over the substrate [20], wherein pixels of the focal plane array comprise a photoactive region [36, 58, 60, 62] or [36, 58, 61] residing within one or more dielectric layers [38, 46 and 54], the photoactive region [36, 58, 60, 62] or [36, 58, 61] comprising a heterojunction formed of a first Group IVA semiconductor alloy [Ge alloy 58 and 36] epitaxially extending from an aperture passing through the one or more dielectric layers [38, 46 and 54] to the silicon substrate [20][paragraph [0037], paragraph [0056]], and a second Group IVA semiconductor alloy [Ge alloy of anode region 61/62] extending epitaxially from the first Group IVA semiconductor alloy [Ge alloy 58 and 36][paragraphs [0016], [0020], [0022]-[0023], [0051], [0056]];
wherein the second Group IVA semiconductor alloy [Ge alloy of anode region 61/62] is a binary alloy, the binary alloy is Ge1-xSnx, wherein 0.01 <x< 0.30 [Paragraph [0020], “the dislocation free semiconducting region to form a multiplication zone and an epitaxial layer of a smaller bandgap material subsequently grown on top”. Paragraph [0023] “[t]he well and trench may include a germanium tin alloy… The region may include an alloy including germanium, wherein the alloy is Si1-xGex, Si1-x-yGexSny, or Ge1-xSnx”. Paragraph [0051], “[t]he misfit dislocation free volume 58 is formed as before, but after CMP and surface cleaning epitaxial layer 61 is grown upon it”. Paragraph [0056] “Although embodiments are described above with respect to a specific material, e.g., germanium, it should be realized that materials other than germanium may also be used. For example, alloys of silicon germanium, and tin could be used as well (Si1-xGex, Si1-x-yGexSny, or Ge1-xSnx) where x and y may take values between zero and unity with the sum of all constituents adding to 100 percent”].
Note, the term “epitaxially” directs to product-by-process limitation. “[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Furthermore, "[b]ecause validity is determined based on the requirements of patentability, a patent is invalid if a product made by the process recited in a product-by-process claim is anticipated by or obvious from prior art products, even if those prior art products are made by different processes." Amgen Inc. v. F. Hoffman-La Roche Ltd., 580 F.3d 1340, 1370 n 14, 92 USPQ2d 1289, 1312, n 14 (Fed. Cir. 2009). (MPEP 2113).
King et al. fails to disclose
wherein the first Group IVA semiconductor alloy is a ternary alloy, the ternary alloy is Si1-x-yGexSny.
Jernigan et al. discloses in paragraph [0008], [0020]-[0023], [0028], [0033]
wherein the first Group IVA semiconductor alloy is a ternary alloy, the ternary alloy is Si1-x-yGexSny.
For further providing support that the first Group IVA semiconductor alloy underlying the binary alloy Ge1-xSnx is a ternary alloy Si1-x-yGexSny, Kim is cited.
Kim discloses in Fig. 49, Fig. 50, paragraphs [0052]-[0053]
wherein the first Group IVA semiconductor alloy [n doped GeSiSn emitter] is a ternary alloy, the ternary alloy is Si1-x-yGexSny;
wherein the second Group IVA semiconductor alloy [p doped GeSn base] is a binary alloy, the binary alloy is Ge1-xSnx.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Jernigan et al. and Kim into the method of King et al. to include wherein the first Group IVA semiconductor alloy is a ternary alloy, the ternary alloy is Si1-x-yGexSny. The ordinary artisan would have been motivated to modify King et al. in the above manner for the purpose of providing suitable second Group IVA semiconductor alloy to form heterojunction diode, promoting the formation of a direct band-gap, suppressing the formation of vacancies that degrade minority carrier lifetime and providing more flexibility and control in device fabrication [paragraph [0020]-0023] of Jernigan et al., paragraphs [0052]-[0053] of Kim].
Regarding claim 32, King et al. discloses in Fig. 1, Fig. 6, paragraph [0005], [0035], [0051]
wherein the imaging system is a single photon avalanche photodetector [SPAD].
Regarding claim 33, King et al. discloses in Fig. 6, paragraph [0016], [0020], [0023], [0035]-[0037], [0051], [0055]-[0056] a method of making a photodetector comprising:
providing a silicon substrate [20] having one or more dielectric layers [38, 46 and 54] thereon [paragraphs [0035]-[0037], [0055]];
forming a well in the one or more oxide layers [38, 46 and 54], wherein a trench extends from the well to the silicon substrate [20][paragraph [0037]];
depositing a photoactive region [36, 58 and 61] in the well via epitaxially growing a first Group IVA semiconductor alloy [Ge alloy of 36 and 58] along the trench and into the well, and epitaxially growing a second Group IVA semiconductor [Ge alloy of 61] on the first Group IVA semiconductor alloy [Ge alloy of 36 and 58] in the well to establish heterojunction of the photoactive region [paragraphs [0016], [0020], [0022]-[0023], [0051], [0056]];
wherein the second Group IVA semiconductor alloy [Ge alloy of anode region 61/62] is a binary alloy, the binary alloy is Ge1-xSnx, wherein 0.01 <x< 0.30.
[Paragraph [0020], “the dislocation free semiconducting region to form a multiplication zone and an epitaxial layer of a smaller bandgap material subsequently grown on top”. Paragraph [0023] “[t]he well and trench may include a germanium tin alloy… The region may include an alloy including germanium, wherein the alloy is Si1-xGex, Si1-x-yGexSny, or Ge1-xSnx”. Paragraph [0051], “[t]he misfit dislocation free volume 58 is formed as before, but after CMP and surface cleaning epitaxial layer 61 is grown upon it”. Paragraph [0056] “Although embodiments are described above with respect to a specific material, e.g., germanium, it should be realized that materials other than germanium may also be used. For example, alloys of silicon germanium, and tin could be used as well (Si1-xGex, Si1-x-yGexSny, or Ge1-xSnx) where x and y may take values between zero and unity with the sum of all constituents adding to 100 percent”].
King et al. fails to disclose
wherein the first Group IVA semiconductor alloy is a ternary alloy, the ternary alloy is Si1-x-yGexSny.
Jernigan et al. discloses in paragraph [0008], [0020]-[0023], [0028], [0033]
wherein the first Group IVA semiconductor alloy is a ternary alloy, the ternary alloy is Si1-x-yGexSny.
For further providing support that the first Group IVA semiconductor alloy underlying the binary alloy Ge1-xSnx is a ternary alloy Si1-x-yGexSny, Kim is cited.
Kim discloses in Fig. 49, Fig. 50, paragraphs [0052]-[0053]
wherein the first Group IVA semiconductor alloy [n doped GeSiSn emitter] is a ternary alloy, the ternary alloy is Si1-x-yGexSny;
wherein the second Group IVA semiconductor alloy [p doped GeSn base] is a binary alloy, the binary alloy is Ge1-xSnx.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Jernigan et al. and Kim into the method of King et al. to include wherein the first Group IVA semiconductor alloy is a ternary alloy, the ternary alloy is Si1-x-yGexSny. The ordinary artisan would have been motivated to modify King et al. in the above manner for the purpose of providing suitable second Group IVA semiconductor alloy to form heterojunction diode, promoting the formation of a direct band-gap, suppressing the formation of vacancies that degrade minority carrier lifetime and providing more flexibility and control in device fabrication [paragraph [0020]-0023] of Jernigan et al., paragraphs [0052]-[0053] of Kim].
Regarding claims 34-38, King et al. discloses in Fig. 1, Fig. 2, Fig. 6, paragraph [0039], [0041], claims 1-4
wherein the trench has dimensions less than the well;
wherein the trench terminates in an n-well region [22] of the silicon substrate [20];
wherein the n-well region [22] extends beyond the trench and extends to a n+ source/drain region [26];
wherein the first Group IVA semiconductor alloy forms a cathode of the photoactive region [“the cathode (trench 36 and well 58)”];
wherein the second Group IVA semiconductor alloy [Ge alloy of anode region 61/62] forms an anode of the photoactive region.
Regarding claims 43-45, King et al. discloses in paragraph [0048] the heterojunction comprises a p-n junction [n-type doping is formed in Ge well 58 and p-type region 62].
Kim also discloses in Fig. 40, Fig. 50, paragraph [0052]-[0053] the heterojunction comprises a p-n junction [n-type GeSiSn emitter and p type GeSn base].
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over King et al. (US Pub. 20210343762) in view of Jernigan et al. (US Pub. 20210296524) and Kim (US Pub. 20140273323) as applied to claim 17 above and in view of Maimon et al. (US Pub. 20210190962).
Regarding claim 18, King et al. discloses in paragraph [0034]
wherein the photoactive region has a cutoff wavelength up to about 15,000 nm which includes the cutoff wavelength of 5.2 µm.
In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
King et al. further suggests in paragraph [0051], [0056] that cutoff wavelength can be varied by varying mole fraction of the constituent elements (i.e., Sn or Ge) to making it useful for MWIR or LWIR system.
Maimon et al. discloses in paragraph [0089]
a cutoff wavelength of about 5.2 μm is well suited for the Hot MW, MWIR range.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Maimon et al. into the method of King et al. to include the cutoff wavelength is 5.2 µm. The ordinary artisan would have been motivated to modify King et al. in the above manner for the purpose of providing a suitable cutoff wavelength for MWIR application.
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over King et al. (US Pub. 20210343762) in view of Jernigan et al. (US Pub. 20210296524) and Kim (US Pub. 20140273323) as applied to claim 19 above and in view of Aoki et al. (US Pub. 20040028828).
Regarding claim 22, King et al. fails to disclose
wherein the one or more dielectric layers comprise silica.
King et al. discloses in paragraph [0035]-[0036]
wherein the one or more dielectric layers [38, 46 and 54] are interlayer dielectric layers.
Aoki et al. discloses in paragraph [0002], [0007]
wherein the interlayer dielectric layers comprise silica.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Aoki et al. into the method of King et al. to include wherein the one or more dielectric layers comprise silica. The ordinary artisan would have been motivated to modify King et al. in the above manner for the purpose of providing suitable material of interlayer dielectric layer(s) which stably exhibits an extremely low specific dielectric constant and which also has resistance to various chemicals and a mechanical strength allowing the coating to withstand the latest highly integrating process [paragraph [0007] of Aoki et al.].
Response to Arguments
Applicant’s arguments with respect to claims 1-10, 15-19, 22-27, 30-38, 41-45 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Overall, Applicant’s arguments are not persuasive. The claims stand rejected and the Action is made FINAL.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SOPHIA T NGUYEN whose telephone number is (571)272-1686. The examiner can normally be reached 9:00am -5:00 pm, Monday-Friday.
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/SOPHIA T NGUYEN/Primary Examiner, Art Unit 2893
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