DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
In the effort to get this application back on track for compact prosecution as the case has been previously examined by another Examiner and withdrawn from issue, the restriction will be withdrawn and all pending claims will be examined.
Information Disclosure Statement
This office acknowledges receipt of the following item(s) from the applicant:
Information Disclosure Statement(s) (IDS) filed on 21 April 2026. The references have been considered.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 7-9, 13, 17, 20, 21, 31 and 32 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 3-5, 8, 11, 12, 14, 19 and 20 of U.S. Patent No. 12,426,383. Although the claims at issue are not identical, they are not patentably distinct from each other because the differences is the added limitations of the continuing application which is now ‘383, all the limitations of the current application are present in the patent.
Claim 1 of the current application recites: A system for impeding a radio frequency (RF) signal, the system comprising a waveguide assembly integrated with a semiconductor wafer and comprising:(a) a waveguide channel defined by internal walls of the wafer lined with a metallic layer, comprising at least one port for transmission of the RF signal into or out of the waveguide channel; and (b) at least one semiconductor obstacle member disposed in the waveguide channel, wherein the at least one semiconductor obstacle member is responsive to applied electromagnetic radiation to vary electrical conductance of the at least one semiconductor obstacle member, and thereby vary the electrical impedance of the at least one semiconductor obstacle member to transmission of the RF signal through the waveguide channel.
The bolded analysis will show the limitations of the current application are the same as those of the patent.
Claim 1 of “383 recites: A system for impeding a radio frequency (RF) signal, the system comprising a waveguide assembly integrated with a semiconductor wafer and comprising: a waveguide channel defined by internal walls of the semiconductor wafer lined with a metallic layer comprising gold, copper, nickel, aluminum, chromium, titanium tungsten, platinum, or silver, the waveguide channel comprising: at least one port for transmission of the RF signal into or out of the waveguide channel; a first waveguide channel section; a second waveguide channel section; and a third waveguide channel section, wherein the first waveguide channel section is disposed between the second waveguide channel section and the third waveguide channel section, and wherein a channel transverse width of the first waveguide channel section is less than a channel transverse width of the second waveguide channel section and the third waveguide channel section, and at least one semiconductor obstacle member disposed in the waveguide channel in the first waveguide channel section, wherein the at least one semiconductor obstacle member is responsive to applied electromagnetic radiation to vary electrical conductance of the at least one semiconductor obstacle member, and thereby vary the electrical impedance of the at least one semiconductor obstacle member to transmission of the RF signal through the waveguide channel.
As can be seen by the bolded section of the two claims, the only difference is that the current pending application does not contain the additional details with regards to the make up of the metallic layer or details of the waveguide channel section, nevertheless the rest of the claim is nearly identical and constitutes double patenting.
Dependent Claims 7-9, 13, 17, 20, 21, 31 and 32 of the current application are essentially the same as dependent claims 3-5, 8, 11, 12, 14, 19 and 20 of the ‘383.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 12, 13, 25, 26, 32-34 and 41 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ali et al. (Ali, Photo-Induced Coplanar Waveguide RF Switch and Optical Crosstalk on High-Resistivity Silicon Trap-Rich Passivated Substrate).
Referring to Claim 1, Ali teaches a waveguide assembly integrated with a semiconductor wafer (Fig. 1 and 2 and col. 2 of p3478 to col. 2 of p3479) and comprising:(a) a waveguide channel defined by internal walls of the wafer lined with a metallic layer (Fig. 1 and 2 and col. 2 of p3478 to col. 2 of p3479), comprising at least one port for transmission of the RF signal into or out of the waveguide channel (Fig. 3 and col. 2 of p3478 to col. 2 of p3479); and (b) at least one semiconductor obstacle member disposed in the waveguide channel (Fig. 1-3 and col. 2 of p3478 to col. 2 of p3479), wherein the at least one semiconductor obstacle member is responsive to applied electromagnetic radiation to vary electrical conductance of the at least one semiconductor obstacle member, and thereby vary the electrical impedance of the at least one semiconductor obstacle member to transmission of the RF signal through the waveguide channel; Fig. 3 and 4 and p3478-3483.
Referring to Claim 12, Ali teaches wherein the metallic layer comprises gold, nickel, aluminum, chromium, tungsten, platinum, or silver; p3482 teaches the use of aluminum.
Referring to Claim 13, Ali teaches wherein the at least one semiconductor obstacle member comprises silicon, germanium, gallium arsenide, gallium nitride, silicon germanium, silicon carbide, indium phosphide, or gallium phosphide; p3478 to p3479.
Referring to Claim 25, Ali teaches further comprising an electromagnetic radiation (ER) emitter for emitting the applied electromagnetic radiation, wherein the ER emitter comprises a light emitting diode (LED), a laser diode, or a vertical cavity surface emitting laser (VCSEL); p3480.
Referring to Claim 26, Ali teaches the ER emitter is configured to emit electromagnetic radiation in the UV spectrum, the visible light spectrum, or the infrared spectrum; p3480.
Referring to Claim 32, Ali teaches wherein the waveguide channel comprises semiconductor material, other than semiconductor material of the at least one semiconductor obstacle member, between the metallic layer lining the internal walls that define the waveguide channel; p3482.
Referring to Claim 33, Ali teaches (a) providing at least one semiconductor obstacle member disposed in the waveguide channel; and (b) selectively varying either one or both of frequency or power level of electromagnetic radiation applied by to the at least one semiconductor obstacle member to vary electrical conductance of the at least one semiconductor obstacle member, and thereby vary impedance of the at least one semiconductor obstacle member to transmission of the RF signal through the waveguide channel; see citations of Claim 1 above as this claim is just the method companion claim.
Referring to Claim 34, Ali teaches wherein the RF signal has a frequency in a range of about 1 GHz to about 300 GHz; p3480.
Referring to Claim 41, Ali teaches (a) providing a first portion of the semiconductor wafer and a separate second portion of the wafer; (b) etching an inner surface of the first portion of the semiconductor wafer to define:(i) walls of a waveguide channel comprising at least one port for transmission of the RF signal into or out of the waveguide channel; and (ii) a semiconductor obstacle member disposed in the waveguide channel; (c) depositing a first metallic layer on the inner surface of the first portion of the semiconductor wafer to line the walls of the waveguide channel; and (d) bonding the first metallic layer deposited on the inner surface of the first portion of the semiconductor wafer to a metalized inner surface of the second portion of the semiconductor wafer; see citations to Claim 1 above as well as process steps related to Fig. 7 and p3482.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 12, 13, 33, 34 and 41 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dogiamis et al. (Dogiamis, US PGPub 2020/0294940) in view of Deliwala (US PGPub 2003/0039430).
Referring to Claim 1, Dogiamis teaches a waveguide assembly integrated with a semiconductor wafer (See Fig. 1 and 3 and Abstract) and comprising:(a) a waveguide channel defined by internal walls of the wafer lined with a metallic layer (Fig. 1 and 3 and [0030] and [0040]), comprising at least one port for transmission of the RF signal into or out of the waveguide channel (Fig. 1 and 3); and (b) at least one semiconductor obstacle member disposed in the waveguide channel; [0038-0039]), but does not explicitly disclose nor limit wherein the at least one semiconductor obstacle member is responsive to applied electromagnetic radiation to vary electrical conductance of the at least one semiconductor obstacle member, and thereby vary the electrical impedance of the at least one semiconductor obstacle member to transmission of the RF signal through the waveguide channel.
However, Deliwala teaches varying the electrical impedance; [0112], [0119] and [0211-0213].
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Dogiamis with the varying electrical impedance as taught by Deliwala as the use a known technique to a known device (method, or product) ready for improvement to yield predictable results is well known in the art.
Referring to Claim 12, Dogiamis as modified by Deliwala teach wherein the metallic layer comprises gold, nickel, aluminum, chromium, tungsten, platinum, or silver; [0063] of Dogiamis.
Referring to Claim 13, Dogiamis as modified by Deliwala teach wherein the at least one semiconductor obstacle member comprises silicon, germanium, gallium arsenide, gallium nitride, silicon germanium, silicon carbide, indium phosphide, or gallium phosphide; Dogiamis teaches at least silicon.
Referring to Claim 33, Dogiamis as modified by Deliwala teach (a) providing at least one semiconductor obstacle member disposed in the waveguide channel; and (b) selectively varying either one or both of frequency or power level of electromagnetic radiation applied by to the at least one semiconductor obstacle member to vary electrical conductance of the at least one semiconductor obstacle member, and thereby vary impedance of the at least one semiconductor obstacle member to transmission of the RF signal through the waveguide channel; see citations of Claim 1 above as this claim is just the method companion claim.
Referring to Claim 34, Dogiamis as modified by Deliwala teach wherein the RF signal has a frequency in a range of about 1 GHz to about 300 GHz; see disclosure of Dogiamis.
Referring to Claim 41, Dogiamis as modified by Deliwala teach (a) providing a first portion of the semiconductor wafer and a separate second portion of the wafer; (b) etching an inner surface of the first portion of the semiconductor wafer to define:(i) walls of a waveguide channel comprising at least one port for transmission of the RF signal into or out of the waveguide channel; and (ii) a semiconductor obstacle member disposed in the waveguide channel; (c) depositing a first metallic layer on the inner surface of the first portion of the semiconductor wafer to line the walls of the waveguide channel; and (d) bonding the first metallic layer deposited on the inner surface of the first portion of the semiconductor wafer to a metalized inner surface of the second portion of the semiconductor wafer see citations of Claim 1 above as well as Fig. 4-8 and associated text of Dogiamis.
Allowable Subject Matter
Claims 4, 5, 7, 8, 9, 17, 18, 20, 21, 31 and 42 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WHITNEY T MOORE whose telephone number is (571)270-3338. The examiner can normally be reached Monday-Friday from 7am-4pm.
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/WHITNEY MOORE/Primary Examiner, Art Unit 3646
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