CTNF 18/507,189 CTNF 90261 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim (s) 1 and claims bellow are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by D1 EP 1317035 A1 . Regarding claim 1 D1 teaches 1. A light emitting device comprising(fig. 16) a semiconductor light emitting element including a first reflector(10), a resonator spacer(8) including an active layer(11), and a second reflector(9) stacked in this order over a semiconductor substrate(7),(fig. 16) wherein the semiconductor light emitting element includes a saturable absorption layer(33) provided between the semiconductor substrate(7) and the second reflector(9), and wherein the semiconductor light emitting element is configured to emit light having a profile that has a maximum peak value(peak bellow 50) and converges to a stable value of a predetermined light intensity after the maximum peak value.(fig. 29a after 100 if one increases the binning size the spectrum will be almost flat. Or one can take in fig. 29b small period corresponding to peak and the almost flat region before another peak) 17. A light emitting device comprising: a semiconductor light emitting element including a first reflector, a resonator spacer including an active layer, and a second reflector stacked in this order over a semiconductor substrate, wherein the semiconductor light emitting element includes a saturable absorption layer provided between the semiconductor substrate and the second reflector, and(see rejection for claim 1) wherein the active layer includes a plurality of quantum well layers and a plurality of barrier layers provided between the plurality of quantum well layers, and wherein the barrier layers are formed of GaAs.[0022-0023] 3. The light emitting device according to claim 1, wherein the saturable absorption layer is positioned between the semiconductor substrate and the active layer and serves as the first reflector.(fig. 16 one can call 10+33 as an abortion layer) 4. The light emitting device according to claim 1, wherein the saturable absorption layer is positioned between the active layer and the second reflector.(fig. 16 22 is between 10 and 8) 2. A light emitting device comprising: a semiconductor light emitting element including a first reflector, a resonator spacer including an active layer, and a second reflector stacked in this order over a semiconductor substrate, wherein the semiconductor light emitting element includes a saturable absorption layer provided between the semiconductor substrate and the second reflector, and(see rejection claim 1) Although D1 does not explicitly say wherein the semiconductor light emitting element satisfies the following relationship: Γs × gmax(Iop) > Γa × α2 + αm + αi where Γs is an optical confinement coefficient of the active layer; Γa is an optical confinement coefficient of the saturable absorption layer; gmax(Iop) is a maximum gain in the active layer obtained when a current value injected from a driving unit is Iop; α2 is an absorption coefficient of the saturable absorption layer; αm is a mirror loss; and αi is a light absorption by carriers. The limitation above is just physics law Γa × α2 + αm + αi is just potential well in which laser is pumped. Unless the Pumping energy Γs × gmax(Iop) is bellow the size of the wall the signal will bounce from the walls which are in current situation are reflectors. As soon as energy exceeds the potential barrier size it will escape and produce the pulse. Due to the fact that D1 structure is same as structure of the current Application that potential well will be present in D1 inherently and hence the same condition will apply for emitting the pulse . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 15 is/are rejected under 35 U.S.C. 103 as being obvious over D1. Regarding claim 15 D1 teaches 15. A light emitting device comprising: a semiconductor light emitting element including a first reflector, a resonator spacer including an active layer, and a second reflector stacked in this order over a semiconductor substrate, wherein the semiconductor light emitting element further includes a saturable absorption layer provided between the semiconductor substrate and the second reflector, (see rejection for claim 1) wherein the active layer includes quantum well layers[0022] Although D1 does not teach wherein the active layer includes 6 to 50 quantum well layers, wherein an optical thickness of the resonator spacer is not less than a thickness corresponding to 5 times a resonance wavelength. It would have been obvious to one of ordinary skills in the art, at the time of invention to modify apparatus by D1, since it has been held that the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Claim 5-13, 18, 19 is/are rejected under 35 U.S.C. 103 as being obvious over D1. Regarding claims 5-8 D1 teaches 8. The light emitting device according to claim 7, wherein the quantum well layers are formed of InGaAs, and wherein the barrier layers are formed of GaAs.(D1[0022-0023]) Although D1 does not explicitly teach 5. The light emitting device according to claim 1, wherein a half width value of a light pulse indicating the maximum peak value is not less than 50 ps. 6. The light emitting device according to claim 1, wherein a time difference between a timing of starting an injection of a current into the semiconductor light emitting element and a timing at which a light output reaches the maximum peak value is not less than 50 ps and not more than 1 ns. 7. The light emitting device according to claim 1, wherein the active layer includes a plurality of quantum well layers and a plurality of barrier layers provided between the plurality of quantum well layers, and an energy difference between an emission level of the quantum well layer and a band gap of the barrier layer is in a range of 105 meV to 230 meV. This is just a matter of design choice and optimal operational parameter selection It would have been obvious to one of ordinary skills in the art, at the time of invention to modify apparatus by D1, since it has been held that the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Although D1 does not explicitly teach 9. The light emitting device according to claim 1, further comprising a semiconductor layer(12) provided between the active layer(11) and the saturable absorption layer,(33) Although D1 does not explicitly teach wherein the semiconductor layer includes an AlGaAs layer having an Al composition of a range of 0.45 to 0.9. This is just a matter of design choice and optimal operational parameter selection It would have been obvious to one of ordinary skills in the art, at the time of invention to modify apparatus by D1, since it has been held that the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Depending on what we call the semiconductor layer and number of active materials 11 (which can be multiple D1 also would teach 10. The light emitting device according to claim 9, wherein the semiconductor layer further includes a GaAsP layer.[0023] But as it is not explicit it is just obvious modification to include multiple layers 11, 12, 13 in order to achieve faster higher resonance faster. Although D1 does not explicitly teach 11. The light emitting device according to claim 1, wherein an optical thickness of the resonator spacer is not less than a thickness corresponding to 5 times a resonance wavelength. 12. The light emitting device according to claim 1, wherein an optical thickness of the resonator spacer is not less than a thickness corresponding to 11 times a resonance wavelength. 13. The light emitting device according to claim 1, wherein the active layer includes 6 to 50 quantum well layers. 18. The light emitting device according to claim 17, wherein an optical thickness of the resonator spacer is not less than a thickness corresponding to 5 times a resonance wavelength. 19. The light emitting device according to claim 15, wherein an optical thickness of the resonator spacer is not less than a thickness corresponding to 11 times a resonance wavelength. D1 teaches using multiple quantum wells [0022] It would have been obvious to one of ordinary skills in the art, at the time of invention to modify apparatus by D1, since it has been held that the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Claim 14, 20, 21 is/are rejected under 35 U.S.C. 103 as being obvious over D1 in view of D2 US 20220171058 A1. Regarding claims 14, 20, 21 D1 does not teach but D2 teaches 14. The light emitting device according to claim 1, further includes a light receiving element mounted on the same package as the semiconductor light emitting element and configured to receive light emitted from the semiconductor light emitting element.(fig. 3) 20. A ranging device comprising: the light emitting device according to claim 1; a light receiving device configured to receive light emitted from the light emitting device and reflected by an object to be measured; and a distance information acquisition unit configured to acquire information on a distance to the object to be measured based on a time difference between a timing at which light is emitted from the light emitting device and a timing at which light is received by the light receiving device.(fig. 3)[0172] 21. A movable object comprising: the ranging device according to claim 20; and a control unit configured to control the movable object based on information on the distance acquired by the ranging device. .(fig. 3)[0172] .[0187] It will be obvious to one of ordinary skills in the art to modify teachings taught by D1 with teachings by D2 in order to use LIDAR technology in collision avoidance. Claim 16 is/are rejected under 35 U.S.C. 103 as being obvious over D1 in view of D3 US 20140169397 A1. Regarding claim 16 D1 does not teach but D3 teaches principle of operation of VCSEL described in D1 16. The light emitting device according to claim 15, wherein the active layer is positioned between an antinode and a node of a standing wave generated between the first reflector and the second reflector.(fig. 4)[0007] It will be obvious to one of ordinary skills in the art to modify teachings taught by D1 with teachings by D3 in order to operate the vcsel in gain switching mode.[0006] Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to HOVHANNES BAGHDASARYAN whose telephone number is (571)272-7845. The examiner can normally be reached Mon-Fri 7am - 5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HOVHANNES BAGHDASARYAN/Examiner, Art Unit 3645 Application/Control Number: 18/507,189 Page 2 Art Unit: 3645 Application/Control Number: 18/507,189 Page 3 Art Unit: 3645 Application/Control Number: 18/507,189 Page 4 Art Unit: 3645 Application/Control Number: 18/507,189 Page 5 Art Unit: 3645 Application/Control Number: 18/507,189 Page 6 Art Unit: 3645 Application/Control Number: 18/507,189 Page 7 Art Unit: 3645