DETAILED ACTION
This is a first action on the merits, in response to the claims received 11/13/2023. Claims 1-29 are pending for prosecution below.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) file on 2/26/2025 has been considered by the examiner. An initialed copy is attached herewith.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6,12-16,18,22-26 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Turner, (USNO.2018/0116514).
As for claim 1, Turner discloses and shows in Fig. 5 an electronic device, comprising: an input terminal for receiving a charging voltage (via ref’s direct contact); a first voltage divider configured to divide a power supply voltage into a divided voltage at a first node; a second voltage divider configured to divide the power supply voltage into the divided voltage at a second node (via ref’s differential amplifier combination with analog to digital converter); a high-pass filter including a high-pass filter capacitor coupled (electrically) between the input terminal and the first node; and a comparator (within ref’s analog to digital converter) configured to compare a voltage of the first node to a voltage of the second node to form a digital received signal (par.[0027,0029,0044]).
As for claim 2, Turner discloses and shows in Fig. 5 electronic device comprises an earbud
As for claim 3, Turner discloses and shows in Fig. 5 earbud includes an integrated circuit, and wherein the comparator is integrated within the integrated circuit
As for claim 4, Turner discloses and shows in Fig. 5 an input switch (sensor) coupled between a charging terminal of the integrated circuit and the input terminal (par.[0037])
As for claim 5, Turner discloses and shows in Fig. 5 high-pass filter couples to the input terminal through a communication terminal of the integrated circuit
As for claim 6, Turner discloses and shows in Fig. 5 a low-pass filter coupled between the input terminal and the high-pass filter capacitor (via ref’s filters)
As for claim 12, Turner discloses and shows in Fig. 5 a case configured to enclose the earbud, wherein the case includes an output terminal coupled to the input terminal while the earbud is enclosed.
As for claim 13, Turner discloses and shows in Fig. 5 the case is configured to charge the earbud with a charging voltage coupled through the output terminal.
As for claim 14, Turner discloses and shows in Fig. 5 the case is further configured to modulate the charging voltage with a digital message, and wherein the digital received signal includes the digital message.
As for claim 15, Turner discloses and shows in Fig. 5 a method of receiving data from a charging voltage to an electronic device, comprising: high-pass filtering a modulated charging voltage to form a high-pass filtered voltage ; combining the high-pass filtered voltage with a common-mode voltage to form a combined voltage (via ref’s differential amplifier combination with analog to digital converter); and comparing (within ref’s analog to digital converter) the combined voltage to the common-mode voltage to form a digital received signal while using the modulated charging voltage to charge a battery in the electronic device (par.[0027,0029,0044]).
As for claim 16, Turner discloses and shows in Fig. 5 high-pass filtering the modulated charging voltage comprises: low-pass filtering the modulated charging voltage to form a low-pass-filtered modulated charging voltage; and high-pass filtering the low-pass-filtered modulated charging voltage to form the high-pass filtered voltage (implied via differential amplifier combination with analog to digital converter)
As for claim 18, Turner discloses and shows in Fig. 5 electronic device comprises an earbud, the method further comprising: recovering (via ref’s processor) a digital message from the digital received signal while the earbud uses the modulated charging voltage to charge the battery (par.[0037])
As for claim 22, Turner discloses and shows in Fig. 5 an earbud, comprising: an input terminal; a charging rail for a charging voltage (via ref’s direct contact); an input switch coupled between the input terminal and the charging rail; and a data receiver (within differential amplifier combination with analog to digital converter) coupled to the input terminal, wherein the data receiver includes a comparator and a high-pass filter coupled between the input terminal and a first input of the comparator (via ref’s differential amplifier combination with analog to digital converter) (par.[0027,0029,0044]).
As for claim 23, Turner discloses and shows in Fig. 5 the data receiver further comprises: a first resistor coupled between a power supply node and the first input of the comparator; and a second resistor coupled between the first input of the comparator and ground (implied via differential amplifier combination) .
As for claim 24, Turner discloses and shows in Fig. 5 the data receiver further comprises: a third resistor coupled between the power supply node and a second input of the comparator; and a fourth resistor coupled between the second input of the comparator and ground (implied via differential amplifier combination).
As for claim 25, Turner discloses the high-pass filter comprises: the second resistor; and a high-pass filter capacitor coupled between the input terminal and the first input of the comparator.
As for claim 26, Turner discloses a low-pass filter coupled between the input terminal and the high-pass filter capacitor.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 7-10,27-29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Turner in view of Racette, (USNO.2015/0150753).
As for claim 7-9,27 and 28, Turner discloses all limitations, but differs from the claimed invention because he does not explicitly disclose a first capacitor coupled between the first node and ground, a second capacitor coupled between the second node and ground, and assert the digital received signal to a first binary value in response to the voltage of the first node being greater than a voltage of the second node by an offset value
Racette discloses and shows in Figs.2 and 8 a first capacitor coupled between the first node and ground, a second capacitor coupled between the second node and ground (via ref’s coupling capacitors), and assert the digital received signal to a first binary value in response to the voltage of the first node being greater than a voltage of the second node by an offset value (differential amplifier; Fig.2) (par.[0156])
Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention was made to have modified the teachings of Turner by using a first capacitor coupled between the first node and ground, a second capacitor coupled between the second node and ground, and assert the digital received signal to a first binary value in response to the voltage of the first node being greater than a voltage of the second node by an offset value for advantages such as providing the ability to control feedback (abstract), as taught by Racette.
As for claim 10, Turner in combination with Racette discloses assert the digital received signal to a second binary value in response to the voltage of the second node being greater than the voltage of the first node by the offset value
As for claim 29, Turner in combination with Racette discloses and shows in Fig. 8 the first input of the comparator is an inverting input of the comparator and the second input of the comparator is a non-inverting input of the comparator (via amplifier)
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Turner in view of Tu et al, (Tu), (USNO.2021/0034096).
As for claim 11, Turner discloses all limitations, but differs from the claimed invention because he does not explicitly disclose integrated circuit is configured to open the input switch during a high-speed data mode and to close the input switch during a low-speed data mode, wherein a data rate of the high-speed data mode is greater than a data rate of the low-speed data mode
Tu discloses and shows in Fig. 1 integrated circuit is configured to open the input switch during a high-speed data mode and to close the input switch during a low-speed data mode, wherein a data rate of the high-speed data mode is greater than a data rate of the low-speed data mode (via ref’s data packets) (par.[0033])
Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention was made to have modified the teachings of Turner by using integrated circuit is configured to open the input switch during a high-speed data mode and to close the input switch during a low-speed data mode, wherein a data rate of the high-speed data mode is greater than a data rate of the low-speed data mode for advantages such as providing the appropriate distribution (par.[0033]) , as taught by Tu.
Allowable Subject Matter
Claims 19-21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: a charging voltage to form the modulated charging voltage by alternatively increasing the modulated charging voltage to equal a sum of an average value of the charging voltage and a first voltage and decreasing the modulated charging voltage to equal the average value of the charging voltage minus a second voltage, in combination with the remaining limitations of independent claims
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARUN C WILLIAMS whose telephone number is (571)272-9765. The examiner can normally be reached on M-F 9 a.m. - 6 p.m..
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julian Huffman can be reached on 571-272-2147. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ARUN C WILLIAMS/ Primary Examiner, Art Unit 2859
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