DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Prabhu (US Patent Appl. Pub. No. 2003/0209772 A1).
[Re claim 20] Prabhu discloses the semiconductor device assembly, comprising: a plurality of semiconductor dies (401) singulated from a semiconductor wafer (400) (see figure 4 and paragraph [0036]), the plurality of semiconductor dies having: a front side at which circuitry is disposed; and a back side opposite the front side (see figure 5H and paragraph [0050]). Prabhu fails to disclose the selection of “the plurality of semiconductor dies has a rate of particulates fewer than 30 particles of a size less than 90 microns per 70,650 millimeters squared area”. However, it would have been obvious to one of ordinary skill in the art at the time of the invention because it is a matter of determining optimum process conditions by routine experimentation with a limited number of species of result effective variables. These claims are prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Huang, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996)(claimed ranges or a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill or art) and In re Aller, 105 USPQ 233 (CCPA 1995) (selection of optimum ranges within prior art general conditions is obvious).
Allowable Subject Matter
Claims 1-19 are allowed.
The following is an examiner's statement of reasons for allowance: Claim 13 allowable because of the closest prior art (US Patent Appl. Pub. No 2007/0032093 A1) discloses the method for fabricating a semiconductor device assembly, comprising: providing a semiconductor wafer (20) that includes an annulus of sacrificial material (24) disposed at a front side of the semiconductor wafer (see figure 2 and paragraph [0025]-[0027]). However, the prior art, either singly or in combination, fails to anticipate or render obvious, the method, wherein an annulus of sacrificial material disposed at a front side of the semiconductor wafer and extending at least partially into the semiconductor wafer; disposing circuitry at the front side of the semiconductor wafer to implement a plurality of semiconductor dies; thinning the semiconductor wafer at a back side opposite the front side effective to expose the annulus of sacrificial material and remove a portion of the semiconductor wafer that connects a center portion of the semiconductor wafer to a peripheral portion of the semiconductor wafer; and disconnecting the peripheral portion from the center portion effective to remove the peripheral portion from the semiconductor wafer. These features in combination with the other elements of the claim are neither disclosed nor suggested by the prior art of record.
The following is an examiner's statement of reasons for allowance: Claim 10 allowable because of the closest prior art (US Patent Appl. Pub. No 2007/0032093 A1) discloses the semiconductor wafer, comprising: a front side; a center portion (22); a peripheral portion (26); and an annulus of sacrificial material (24) disposed at the front side (see figure 2 and paragraph [0025]-[0027]). However, the prior art, either singly or in combination, fails to anticipate or render obvious, the device, wherein an annulus of sacrificial material disposed at the front side, extending partially through the semiconductor wafer, and separating the center portion from the peripheral portion at the front side. These features in combination with the other elements of the claim are neither disclosed nor suggested by the prior art of record.
Claims 2-9 and 11-19 depend from claim 1 or 10 so they are allowable for the same reason.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure:
Tseng (US Patent Appl. Pub. No 2007/0032093 A1).
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/KYOUNG LEE/Primary Examiner, Art Unit 2817