DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 6 is objected to because of the following informalities:
Regarding claim 6, lines 2-3 about the switching regulator should be removed since it was incorporated into claim 1. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 6, 7, 9-11, 13, 15, and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cho in view of Wehmeier (US 2014/0064355).
Regarding claim 1, fig. 5 of Cho discloses a circuit, comprising: a first integrator [501] having a first input, a second input, and an output; a second integrator [503] having a first input, a second input coupled to the output of the first integrator, and an output; a pulse generator [505,507] having a control input coupled to the output of the second integrator, and an output; and a drift compensation circuit [509, 511, 519, 521] having a first terminal coupled to the output of the second integrator, and a second terminal coupled to the output of the first integrator. Cho does not disclose a switching regulator and a feedback circuit as claimed. However, fig. 2 of Wehmeier discloses a chain of integrators outputting to a switching regulator [15] having a control input and a feedback circuit [R5, R6] having a first terminal coupled to the output of the switching regulator, and a second terminal coupled to the second input of the first integrator. In view of such teaching, it would have been obvious to the ordinary artisan before the effective filing date of the claimed invention to modify the invention as indicated above by incorporating the switching regulator and feedback as taught in Wehmeier for the purpose of utilizing a suitable and well-known type of feedback control for an integrator system. After the combination described above, the resulting combination teaches wherein the first integrator has the first input coupled to the power output (via the feedback), the second input coupled to a first reference input; the second integrator having a first input coupled to the second reference input, and the pulse generator having an output coupled to the control input of the switching regulator.
Regarding claim 2, the combination as indicated above discloses wherein the second integrator comprises: a first amplifier [OTA2] having a first input, a second input, and an output coupled to the first input, second input, and output of the second integrator respectively; a first resistor [Rzp] having a first terminal coupled to the output of the first amplifier, and a second terminal; and a first capacitor [C2p] having a first terminal coupled to the second terminal of the first resistor, and a second terminal.
Regarding claim 6, the combination as indicated above discloses the switching regulator having a control input coupled to the output of the pulse generator, and an output coupled; and a feedback circuit [R5, R6] having a first terminal coupled to the power output, and a second terminal coupled to the second input of the first integrator.
Regarding claim 7, the combination as indicated above discloses wherein the feedback circuit comprises: a first resistor having a first terminal coupled to the first terminal of the feedback circuit, and a second terminal coupled to the second terminal of the feedback circuit; and a second resistor having a first terminal coupled to the second terminal of the first resistor, and a second terminal coupled to ground.
Regarding claim 9, the combination as indicated above discloses wherein the pulse generator includes a pulse frequency modulation (PFM) comparator having a first input, and a second input coupled to the control input of the pulse generator.
Regarding claim 10, the combination as indicated above discloses wherein the pulse generator further includes a pulse width modulation comparator having a first input coupled to the control input of the pulse generator, and a second input.
Regarding claim 11, fig. 5 of Cho discloses a circuit, comprising: a first integrator [501] having a first input, a second input, and an output, the first integrator including: a first amplifier [OTA1] having a first input coupled to the first input of the first integrator, a second input, and an output coupled to the output of the first integrator; a first resistor [R1p] having a first terminal coupled to the second input of the first integrator, and a second terminal coupled to the second input of the first amplifier; a second resistor [Rzp] having a first terminal coupled to the second input of the first integrator, and a second terminal; a first capacitor [C1p] having a first terminal coupled to the second terminal of the second resistor, and a second terminal coupled to the output of the first amplifier; and a drift compensation circuit [509, 511, 519, 521] having a first terminal coupled to the output of the first integrator, a second terminal coupled to the first terminal of the first capacitor, and a third terminal. Cho discloses the device except for a switching regulator and a feedback circuit as claimed. However, fig. 2 of Wehmeier discloses a chain of integrators outputting to a switching regulator [15] having a control input and a feedback circuit [R5, R6] having a first terminal coupled to the output of the switching regulator, and a second terminal coupled to the second input of the first integrator. In view of such teaching, it would have been obvious to the ordinary artisan before the effective filing date of the claimed invention to modify the invention as indicated above by incorporating the switching regulator and feedback as taught in Wehmeier for the purpose of utilizing a suitable and well-known type of feedback control for an integrator system. After the combination described above, the resulting combination teaches wherein the first integrator has the first input coupled to the power output (via feedback), the second input coupled to a first reference input; and the output coupled to the control input of the switching regulator.
Regarding claim 13, the combination as indicated above discloses a second integrator [503] coupled between the output of the first integrator and the first terminal of the drift compensation circuit, the second integrator comprising: a second amplifier [OTA2] having a first input coupled to a second reference input, a second input coupled to the output of the first amplifier, and an output; the output coupled to the control input of the switching regulator and a second capacitor [C2p] having a first terminal coupled to the output of the second amplifier, and a second terminal coupled to ground.
Regarding claim 15, fig. 5 of Cho discloses a circuit, comprising: a first integrator [501] including: a first amplifier [OTA1] having a first input, a second input, and an output; and a first capacitor [C1p] coupled to the output of the first amplifier; a second integrator [503] including: a second amplifier [OTA2] having a first input, a second input coupled to the output of the first amplifier, and an output; and a second capacitor [C2p] coupled to the output of the second amplifier; and a drift compensation circuit [509, 511, 519, 521] having a sensing terminal coupled to the output of the second amplifier, and an output terminal coupled to the first capacitor; wherein the drift compensation circuit is configured to provide a current to the first capacitor based on a current or voltage sensed at the output of the second amplifier. Cho discloses the device except for a switching regulator and a feedback circuit as claimed. However, fig. 2 of Wehmeier discloses a chain of integrators outputting to a switching regulator [15] having a control input and a feedback circuit [R5, R6] having a first terminal coupled to the output of the switching regulator, and a second terminal coupled to the second input of the first integrator. In view of such teaching, it would have been obvious to the ordinary artisan before the effective filing date of the claimed invention to modify the invention as indicated above by incorporating the switching regulator and feedback as taught in Wehmeier for the purpose of utilizing a suitable and well-known type of feedback control for an integrator system. After the combination described above, the resulting combination teaches wherein the first integrator has the first input coupled to the power output, the second input coupled to a first reference input; the second integrator having a first input coupled to the second reference input, and the output of the second amplifier coupled to the control input of the switching regulator.
Regarding claim 17, the combination as indicated above discloses wherein the drift compensation circuit further includes a reference voltage terminal, the drift compensation circuit configured to provide the current to the first capacitor based on voltage sensed at the output of the second amplifier relative to a voltage at the reference voltage terminal.
Allowable Subject Matter
Claims 8, 12, 14, and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant's arguments filed 1/14/26 have been fully considered but they are not persuasive.
Applicant explained how claims 1, 11, and 15 were amended to incorporate some of the allowable subject matter of claim 18. To the best of Examiner’s understanding, claim 18 was not amended and the amended matter of claim 15 does not appear to correspond to the voltage offset circuit details of claim 18. Similar issues seem to apply to claims 1 and 11.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/SIBIN CHEN/ Primary Examiner, Art Unit 2896