Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendment filed 5/8/2026 has been entered. Claims 1-20 remain pending in the present application.
As a result of this amendment, the previous claim objections are being withdrawn.
Response to Arguments
Applicant’s arguments have been fully considered, but are not persuasive. The followings are the examiner’s responses to the arguments.
Applicant’s argument #1: in Jeong, the render output for which the sequence of primitives is to be rendered corresponds to a tile, and is not further divided into patches and identified for such patches respective ranges of primitives that need to subsequently be processed further for the sampling positions covered by the patch (Remarks, page 22).
Examiner’s response: the examiner did not equate a tile to the render output. Rather, the examiner equated an image frame to the render output (See the office action, page 6 where par. 12 of Jeong was cited: “The method may further include dividing a frame into tiles and recognizing a primitive included in each of the tiles, wherein the primitive visibility stream is generated according to the tiles and indicates whether a primitive included in each of the tiles is visible””). Thus, a tile was equated to the claimed “patch”. As further disclosed in par. 12, the primitive visibility stream is generated according to the tiles (patches) and indicates whether a primitive included in each of the tiles is visible. Par. 83 of Jeong further discloses that for primitives included in a tile, those that are determined to be visible are associated with a value of “1”, while those that are determined to be not visible are associated with a value of “0”. Thus, it could be said that for each tile, those primitives having a value of “1” constitute a range of primitives that needs to subsequently be processed further for the sampling positions covered by the tile.
Applicant’s argument #2: Jeong does not disclose performing visibility testing for groups of fragments during the second, main pass operation, as claimed, because the primitive visibility stream in Jeong is input to the second pipeline prior to rasterisation (Remarks, pp. 22-23).
Examiner’s response: claims 1 and 11 do not recite performing visibility testing for groups of fragments during the second, main pass operation. Rather, they recite that in the second, main pass, “visibility testing is performed to determine which primitives in the sequence of primitives should be further processed for which sampling positions within the render output”. With respect to performing visibility testing to determine which primitives should be further processed, Jeong discloses in par. 102: “In the second pipeline 720, … the rasterization unit 670 does not perform rasterization on primitives determined to be not visible based on the generated primitive visibility stream. In other words, the rasterization unit 670 performs rasterization only on primitives determined to be visible based on the generated primitive visibility stream”. A person skilled in the art would recognize that to determine whether a primitive is visible, the rasterization unit 670 could perform an operation which could be expressed in the following pseudocode: “if primitive1 == 1 then (action 1) else (action 2)”, where “1” indicates that the primitive is visible, and “0” indicates the primitive is not visible. This operation could be interpreted as visibility testing.
The Applicant also argued that the phrase “for the purposes of visibility testing at least some primitives… are processed into respective groups of fragments” implies that primitives are processed into groups of fragments (i.e. rasterized) prior to the visibility testing, not after the visibility testing as taught by Jeong (Remarks, page 23, first paragraph). The examiner respectfully disagrees with this assertion. If one looks at the visibility testing as part of the rasterization process performed by the rasterization unit 670 of the second pipeline, the use of “for the purposes of visibility testing” could mean either way. The examiner suggests that the claim language should be clarified to clearly recite that in the second, main pass operation, primitives are processed into groups of fragments prior to the visibility testing.
Because Applicant’s arguments are not persuasive, the previous double patenting and 102/103 rejections are being maintained.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-20 of the present application are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 8 of the US Patent 12,322,023 (“Patent ‘023” hereinafter), in view of Jeong et al. (Pub. No. US 2016/0125649).
The following table shows in detail the correspondence between claim 1 of the present application and claim 1 of the above US Patent. The mapping for other claims is also shown, but in less details for brevity purposes.
Present Application
Patent ‘023
1. A method of operating a graphics processor to generate a render output in which, for the purposes of generating a render output, the render output is divided into a plurality of patches, the method comprising: for a sequence of primitives to be rendered to generate the render output:
performing a first, pre-pass operation in which primitives in the sequence of primitives to be rendered are processed into respective sets of one or more fragments, each fragment associated with a respective set of one or more sampling positions within the render output, and wherein as part of the first, pre-pass operation fragments for primitives in the sequence of primitives are processed to determine visibility information for the sequence of primitives; and identifying for respective patches of the render output, each patch encompassing a respective group of plural sampling positions within the render output, respective ranges of primitives within the sequence of primitives that need to subsequently be processed further for the sampling positions covered by the patch to which the identified range of primitives relates, wherein the respective ranges of primitives within the sequence of primitives that need to subsequently be processed further for the sampling positions covered by the respective patches are identified based on the determined visibility information for the sequence of primitives; the method further comprising:
thereafter performing a second, main pass operation in which visibility testing is performed to determine which primitives in the sequence of primitives should be further processed for which sampling positions within the render output, wherein for the purposes of visibility testing at least some primitives that were processed by the first, pre-pass operation are processed into respective groups of fragments, each group of fragments corresponding to a respective patch of the render output, and wherein the visibility testing for a group of fragments uses the identified range of primitives within the sequence of primitives that need to subsequently be processed further for the respective patch corresponding to the group of fragments being tested to determine whether or not the group of fragments should be further processed.
1. A method of compiling a fragment shader for a graphics processor to generate a render output, the graphics processor including an execution unit that is operable to execute fragment shaders to process fragments to generate fragment shaded data for the render output, wherein a fragment shader may in addition to generating the fragment shaded data include one or more fragment shader side effects, wherein the graphics processor is configured to: render primitives in a sequence of primitives for a render output by: performing a first, pre-pass operation in which primitives in the sequence of primitives are processed into respective sets of one or more fragments, each fragment associated with a respective set of one or more sampling positions within the render output, and the resulting fragments are processed to determine visibility information for the sequence of primitives, wherein the first, pre-pass operation is operable to execute a first fragment shader routine for a fragment, if required, to determine the visibility information for the sequence of primitives; and
thereafter performing a second, main pass operation in which primitives that were processed by the first, pre-pass operation are processed again into their respective sets of one or more fragments for processing for respective sampling positions within the render output, wherein the fragment processing during the second, main pass is controlled based on the determined visibility information, and wherein for fragments that the visibility information indicates should be processed further to generate rendered output data, a second fragment shader routine is executed to generate the rendered output data for the sampling position or positions to which the fragments relate; the method comprising: including in a fragment shader for execution by the execution unit of the graphics processor a sequence of instructions that when executed by the first fragment shader routine and/or by the second fragment shader routine controls the execution of one or more fragment shader side effects for a fragment for a primitive such that for any fragments for which both the first fragment shader routine and the second fragment shader routine are executed, the one or more fragment shader side effects associated with the fragment shader are only executed once.
Patent ‘023 does not disclose dividing the render output into a plurality of patches, and identifying a range of primitives associated with each patch that may need to subsequently be processed further. However, Jeong teaches dividing a render output into a plurality of tiles, and identifying a range of primitives associated with each tile that may need to subsequently be processed further (See the rejection of claim 1 below).
11
8 in view of Jeong.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, 4, 6, 11, 12, 14 and 16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jeong et al. (Pub. No. US 2016/0125649).
Regarding claim 1, Jeong discloses a method of operating a graphics processor to generate a render output in which, for the purposes of generating a render output, the render output is divided into a plurality of patches (Par. 12: “The method may further include dividing a frame into tiles and recognizing a primitive included in each of the tiles, wherein the primitive visibility stream is generated according to the tiles and indicates whether a primitive included in each of the tiles is visible”), the method comprising:
for a sequence of primitives to be rendered to generate the render output (A frame (render output) comprises a plurality of primitives, as suggested in the above cited paragraph):
performing a first, pre-pass operation (Par. 100: “in the rendering method according to the current example, as illustrated in FIG. 7, rendering is continuously performed twice, thus providing for two-pass rendering, wherein the rendering apparatus 200 continuously performs rendering using a first pipeline 710 and a second pipeline 720”) in which primitives in the sequence of primitives to be rendered are processed into respective sets of one or more fragments, each fragment associated with a respective set of one or more sampling positions within the render output, and wherein as part of the first, pre-pass operation fragments for primitives in the sequence of primitives are processed to determine visibility information for the sequence of primitives (Par. 101: “In the first pipeline 710, the vertex shader 650 performs shading on a vertex by only using a location value of the vertex, the tessellation pipeline 660 performs tessellation by only using a location value of a patch, and the rasterization unit 670 performs rasterization by only using a location value of a primitive. Also, in the first pipeline 710, the depth test unit 610 determines a visible fragment via a depth test, and the P-buffer 620 stores an ID of a primitive corresponding to the visible fragment. Also, the stream generator 630 generates a primitive visibility stream, a patch visibility stream, and a vertex visibility stream based on the ID of the primitive stored in the P-buffer 620”. As is well known in the art, the rasterization unit rasterizes a primitive into fragments, each of which has at least one sampling position); and
identifying for respective patches of the render output, each patch encompassing a respective group of plural sampling positions within the render output, respective ranges of primitives within the sequence of primitives that need to subsequently be processed further for the sampling positions covered by the patch to which the identified range of primitives relates, wherein the respective ranges of primitives within the sequence of primitives that need to subsequently be processed further for the sampling positions covered by the respective patches are identified based on the determined visibility information for the sequence of primitives (Par. 104: “the rendering apparatus 100 divides a frame into a plurality of tiles and recognizes a primitive included in each of the plurality of tiles or a fragment generated from the primitive… when depth tests are performed on all fragments included in one tile, depth values stored in the Z-buffer 340 all assume depth values of visible fragments”, par. 105: “the rendering apparatus 100 stores an ID of a primitive corresponding to a visible fragment in the P-buffer 330 based on a result of performing a depth test on a depth value of each of a plurality of fragments included in a tile… when depth tests are performed on all fragments included in one frame or one tile, IDs of primitives stored in the P-buffer 330 only include IDs of visible primitives”, and par. 106: “In operation S830, the method generates a primitive visibility stream. For example, the rendering apparatus 100 generates a primitive visibility stream indicating visibility information of each of a plurality of primitives included in the tile based on the IDs of the primitives stored in the P-buffer 330”. See also pars. 82-83. Since the primitive visibility stream indicates visible information of primitives included in a tile, it could be said that each tile is associated with a range of primitives that may need to subsequently be processed further in the second pipeline (i.e. visible primitives)); the method further comprising:
thereafter performing a second, main pass operation in which visibility testing is performed to determine which primitives in the sequence of primitives should be further processed for which sampling positions within the render output, wherein for the purposes of visibility testing at least some primitives that were processed by the first, pre-pass operation are processed into respective groups of fragments, each group of fragments corresponding to a respective patch of the render output, and wherein the visibility testing for a group of fragments uses the identified range of primitives within the sequence of primitives that need to subsequently be processed further for the respective patch corresponding to the group of fragments being tested to determine whether or not the group of fragments should be further processed (Par. 107: “In operation S840, the method performs selective rendering. For example, the rendering apparatus 100 performs selective rendering on the plurality of primitives included in the tile based on the IDs of the primitives stored in the P-buffer 330. According to an example, the rendering apparatus 100 performs selective rendering on a plurality of primitives included in a tile by using a primitive visibility stream. In such an example, the rendering unit 360 included in the rendering apparatus 100 performs selective rendering on a plurality of primitives included in a primitive visibility stream received from the stream generator 350. Thus, the rendering unit 360 performs rasterizing only on a visible primitive from among a plurality of primitives by using a primitive visibility stream”).
Regarding claim 2, Jeong discloses the method of claim 1, wherein the determined visibility information comprises a set of primitive identifying information, the set of primitive identifying information capable of storing for respective sampling positions within the render output, or groups thereof, respective primitive identifiers, the primitive identifier stored for a respective sampling position, or group of sampling positions, being usable to subsequently control further processing of primitives for the sampling position or positions for which the primitive identifier is stored (Par. 82: “Referring to the example of FIG. 4, a primitive ID block 440 is an example of the P-buffer 330. According to an example, the P-buffer 330 includes the primitive ID block 440 corresponding to the tile 420, wherein the primitive ID block 440 includes an ID of a primitive visible at a location of each pixel of the tile 420, according to locations of pixels. In other words, when the tile 420 includes an array of 5×5 pixels, in the example, of FIG. 4, an ID of a primitive visible at a pixel located at a first row and a first column is 3 and an ID of a primitive visible at a pixel located at a second row and a third column is 1. Also, in such an example, the P-buffer 330 includes the primitive ID block 440 that is generated for each tile forming the frame 410”), and wherein identifying the respective ranges of primitives within the sequence of primitives that need to subsequently be processed further for the respective patches of the render output comprises: after the first, pre-pass operation has completed the processing of primitives in the sequence of primitives to determine the set of primitive identifying information for the sequence of primitives: processing the determined set of primitive identifying information for the sequence of primitives to identify the respective ranges of primitives that may need to subsequently be processed further for the sampling positions covered by the respective patches of the render output (Par. 83: “Also, according to an example, the stream generator 350 of FIG. 3 generates a primitive visibility stream 450 corresponding to the tile 420 by using the primitive ID block 440 stored in the P-buffer 330. In other words, the stream generator 350 assigns a value of ‘1’ indicating visibility to IDs included in the primitive ID block 440 from among all IDs of the primitives included in the tile 420 and assign a value of ‘0’ indicating non-visibility to IDs not included in the primitive ID block 440 from among the all IDs of the primitives included in the tile 420. The stream generator 350 assigns such a value by using values of the IDs included in the primitive ID block 440”).
Regarding claim 4, Jeong discloses the method of claim 2, wherein the processing of primitives during the first, pre-pass operation to determine the set of primitive identifying information comprises determining an initial range of primitives that may need to be further processed for respective patches of the render output, with information indicative of the initially determined range of primitives that may need to be further processed for a patch being stored accordingly in the set of primitive identifying information, and wherein the step of processing the initially determined set of primitive identifying information for the sequence of primitives to identify the respective ranges of primitives that may need to subsequently be processed further for the sampling positions covered by the respective patches of the render output is performed to update the respective ranges of primitives that may need to subsequently be processed further for at least some patches of the render output, to thereby identify a refined range of primitives within the sequence of primitives that may subsequently need to be processed further for the sampling positions covered by the patch (Jeong, par. 16: “The storing may include, in response to one fragment of the fragments being visible, updating and storing an existing identifier as an identifier of a primitive corresponding to the one fragment”, and par. 26: “In response to one fragment of the fragments being visible, an identifier pre-stored in the primitive buffer may be updated and stored as an identifier of a primitive corresponding to the one fragment”).
Regarding claim 6, Jeong discloses the method of claim 4, wherein when it is determined during the initial processing of primitives to determine the set of primitive identifying information that no primitives write to any sampling positions covered by a patch, the method comprises omitting processing that patch during the subsequent processing of the initially determined set of primitive identifying information (Jeong, par. 87: “the stream generator 350 obtains visibility information about each primitive of the tile through a P-buffer and obtains an ID of a patch or an ID of a vertex, which corresponds to an ID of each primitive, through the structure 510. As a result, the stream generator 350 generates a patch visibility stream indicating visibility information according to IDs of patches included in the tile and vertex visibility stream indicating visibility information according to IDs of vertices included in the tile”, and par. 91: “Also, according to an example, the rendering unit 360 performs selective rendering on a plurality of patches included in a patch visibility stream received from the stream generator 350”. In particular, “selective rendering’ suggests that only visible patches are rendered).
Claims 11, 12, 14 and 16 recite similar limitations as respective claims 1, 2, 4 and 6, but are directed to a graphics processor comprising a rasterizing circuit and a rendering circuit. Since Jeong also discloses such a graphics processor (Fig. 7 shows a first pipeline comprising a rasterisation unit 670 and Fig. 3 shows a rendering unit 360), these claims could be rejected under the same rationales set forth in the rejections of their respective claims.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jeong, in view of Fishwick et al. (Pub. No. US 2014/0071150).
Regarding claim 3, Jeong discloses the method of claim 2, further comprising storing, for respective patches of the render output, information indicative of the respective identified range of primitives within the sequence of primitives that may subsequently need to be processed further for the respective patches, the stored information being usable by the visibility testing,(Par. 83: “Also, according to an example, the stream generator 350 of FIG. 3 generates a primitive visibility stream 450 corresponding to the tile 420 by using the primitive ID block 440 stored in the P-buffer 330. In other words, the stream generator 350 assigns a value of ‘1’ indicating visibility to IDs included in the primitive ID block 440 from among all IDs of the primitives included in the tile 420 and assign a value of ‘0’ indicating non-visibility to IDs not included in the primitive ID block 440 from among the all IDs of the primitives included in the tile 420. The stream generator 350 assigns such a value by using values of the IDs included in the primitive ID block 440”).
Jeong, however, does not disclose the above lined-through limitations.
In the same field of GPU architecture, Fishwick teaches creating a unique identifier for each primitive in a sequence of primitives covered by a tile (See pars. 52-53), and in addition to storing an identifier identifying the primitive from which the sequence of primitives is derived, data indicating the first and/or last position in the sequence of those primitives located within the tile is stored. This data may be stored in the object list for that tile or in another region of memory (See pars. 64-67).
In light of Fishwick’s teachings, it would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Jeong by storing, for each primitive in the sequence of primitives, a unique primitive identifier, with the primitive identifiers within the sequence of primitives monotonically change from a particular starting value, and wherein the stored information indicative of the respective identified range of primitives within the sequence of primitives that may subsequently need to be processed further for a respective patch of the render output would comprise a respective primitive identifier indicating the first primitive in the sequence of primitives that may subsequently need to be processed further for the patch and a further respective primitive identifier indicating the final primitive of the primitives that were processed by the first, pre-pass operation that may need to be further processed for the patch. The motivation would have been to improve memory usage (Fishwick, par. 67).
Claim 13 recites similar limitations as claim 3, but is directed to a graphics processor comprising a rasterizing circuit and a rendering circuit. Since Jeong also discloses such a graphics processor (Fig. 7 shows a first pipeline comprising a rasterisation unit 670 and Fig. 3 shows a rendering unit 360), claim 13 could be rejected under the same rationale set forth in the rejection of claim 3.
Allowable Subject Matter
Claims 5, 7-10, 15 and 17-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PHONG X NGUYEN whose telephone number is (571)270-1591. The examiner can normally be reached Mon-Fri 8am - 5pm EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, King Poon can be reached at (571)272-7440. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PHONG X NGUYEN/ Primary Patent Examiner, Art Unit 2617
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