DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/16/2023 was filed and is in
compliance with provision of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the following features must be shown or the feature(s) canceled from the claim(s).
Regarding claim 9, buried layer is said to be the second conductivity type (p+) but in both in figure 7 and in figure 8 buried layer is shown as first conductivity type (n+).
No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35
U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction
of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be
considered a new ground of rejection if the prior art relied upon, and the rationale supporting
the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form
the basis for the rejections under this section made in this Office action:
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form
the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-7 and 9-11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Rohrer (US 2022/0238744 A1).
Regarding claim 1, Rohrer teaches a single photon avalanche diode, comprising:
a first double diffusion region (28, Fig.1A), being a second conductivity type (p-type); and
a first heavily-doped implant region (27, Fig.1A), located on said first double diffusion region (28, Fig.1A), being a first conductivity type (n-type), and a multiplication region (50, Fig.2B) formed between said first heavily-doped implant region and said first double diffusion region.
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Fig.1A
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Fig.2B
Regarding claim 2, Rohrer teaches the single photon avalanche diode of claim 1,
further comprising:
a guard ring, comprising a second double diffusion region (29, Fig.1A), said second double diffusion region being said first conductivity type (n-type) and surrounding said first double diffusion region (28, Fig.1A).
Regarding claim 3, Rohrer teaches the single photon avalanche diode of claim 2, wherein said guard ring further comprises an epitaxial layer (Epitaxy layer/substrate, Annotated Fig 1A) surrounding said second double diffusion region (29, Fig.1A).
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Annotated Fig.1A
Regarding claim 4, Rohrer teaches the single photon avalanche diode of claim 2, wherein said guard ring further comprises a substrate layer (Epitaxy layer/substrate, Annotated Fig 1A) surrounding said second double diffusion region (29, Fig.1A).
Regarding claim 5, Rohrer teaches the single photon avalanche diode of claim 3, further comprising:
a deep well (Deep well, Annotated Fig.1A), being said second conductivity type (p-type), and said second double diffusion region (29, Fig.1A) and said epitaxial layer (Epitaxy layer/substrate, Annotated Fig.1A) located on said deep well.
Regarding claim 6, Rohrer teaches the single photon avalanche diode of claim 5, further comprising:
a first well (35, Fig.1A), being said second conductivity type (p-type), located on said deep well (Deep well, Annotated Fig.1A), and surrounding said epitaxial layer (Epitaxy layer/substrate, Annotated Fig.1A); and
a second well (second well, Annotated Fig.1A), being said second conductivity type (p-type), and located between said deep well and said first double diffusion region (28, Fig. 1A), said epitaxial layer surrounding said second well and located between said first well and said second well.
Regarding claim 7, Rohrer teaches the single photon avalanche diode of claim 6, further comprising:
a second heavily-doped implant region (36, Fig.1A), being said second conductivity type (p-type), and located on said first well (35, Fig.1A);
a first electrode (19, Fig.1A), disposed on said first heavily-doped implant region (27, Fig. 1A); and a second electrode (21, Fig.1A), disposed on said second heavily-doped implant region.
Regarding claim 9, Rohrer teaches the single photon avalanche diode of claim 3, further comprising:
a buried layer (Buried layer, Annotated Fig.1A), being said second conductivity type (p-type), and said second double diffusion region (29, Fig.1A) and said epitaxial layer (Epitaxy layer/substrate, Annotated Fig.1A) located on said buried layer.
Regarding claim 10, Rohrer teaches the single photon avalanche diode of claim 9, further comprising:
a first well (35, Fig.1A), being said second conductivity type (p-type), located on said buried layer (Buried layer, Annotated Fig.1A), and surrounding said epitaxial layer (Epitaxy layer/substrate, Annotated Fig.1A); and
a second well (second well, Annotated Fig.1A), being said second conductivity type (p-type), and located between said buried layer and said first double diffusion region (28, Fig.1A), said epitaxial layer surrounding said second well, and located between said first well and said second well.
Regarding claim 11, Rohrer teaches the single photon avalanche diode of claim 10, further comprising:
a second heavily-doped implant region (36, Fig.1A), being said second conductivity type (p-type), and located on said first well (35, Fig.1A);
a first electrode (19, Fig.1A), disposed on said first heavily-doped implant region (27, Fig. 1A); and
a second electrode (21, Fig.1A), disposed on said second heavily-doped implant region.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or non-obviousness.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Rohrer (US 2022/0238744 A1) in view of Yang Huang et al. (Y. Huang, Y. Xu and P. Xiatig, "A high-fill-factor SPAD array cell with a shared deep N-well," 2016 China Semiconductor Technology International Conference (CSTIC), Shanghai, China, 2016, pp. 1-3, Doi: 10.1109/CSTIC.2016.7463899. (Year: 2016))
Regarding claim 8, Rohrer teaches the single photon avalanche diode of claim 7, further comprising:
a shallow trench isolation layer (38, Fig.1A), said first heavily-doped implant region (27, Fig.1A), and said second heavily-doped implant region (36, Fig.1A).
However, Rohrer does not teach a shallow trench isolation layer surrounding said first heavily-doped implant region, and located between said first heavily-doped implant region and said second heavily-doped implant region.
Yang Huang et al. teaches a shallow trench isolation layer (STI, Fig.2) surrounding said first heavily-doped implant region (N+ region, Fig.2), and located between said first heavily-doped implant region and said second heavily-doped implant region (P+ region, Fig.2).
Rohrer and Yang Huang et al. are analogous art to the claimed invention because they both are directed to semiconductor device with single photon avalanche diode (SPAD) and one of ordinary skill in the art would have had a reasonable expectation of success to modify Rohrer in view of Yang Huang et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to modify Rohrer by placing STI surrounding said first heavily -doped implant region, and located between first heavily-doped implant region and said second heavily-doped implant region as taught by Yang Huang et al..
Since, STI protects from leakage current between two heavily-doped implant region and also prevents carriers from diffusing from one active region to the another.
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Figure.2
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RUDRA B CHAUDHARY whose telephone number is (571)272-9292. The examiner can normally be reached Mon-Fri 7:30-5:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/R.B.C./Examiner, Art Unit 2811
/LYNNE A GURLEY/Supervisory Patent Examiner, Art Unit 2811
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