DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2020/0357703) hereinafter “Lee” in view of Mandelman et al. (US 2002/0171118) hereinafter “Mandelman” and in further view of Chung et al. (US 2025/0063763) hereinafter “Chung”.
Regarding claim 1, Figs. 8 and 8A of Lee teach a semiconductor structure comprising: a transistor (Item nFET) adjacent to a shallow trench isolation (STI) region (Item STI), the STI region comprising a first liner (Item 302), a second liner (Item 304), and a fill material (Item 402).
Lee does not teach the second liner being pinched off in a portion of the STI region.
Fig. 1G of Mandelman teaches an isolation region between transistors where the isolation region comprises a first liner (Item 35), a second liner (Item 40) and a fill material (Item 44), the second liner (Item 40) being pinched off (Paragraph 0045) in a portion of the isolation region.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the second liner being pinched off in a portion of the STI region because an isolation region having this structure is known to enable extreme scaling and provides for low dielectric constant isolation for reduced coupling and provides for reduced noise for low voltage applications (Mandelman Paragraph 0065).
Lee does not teach a backside contact coupled to the transistor, the first liner and the second liner.
Fig. 2 of Chung teaches a backside contact (Item 170) coupled (See Examiner’s Note below) to a transistor and a dielectric region (Item 105) between transistors.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have a backside contact coupled to the transistor, the first liner and the second liner because the backside contact allows electrical contact between a transistor and a backside wiring (Chung Paragraph 0128).
When the first and second liners of Mandelman and the backside contact of Chung are included in the structure of Lee as stated above, the backside contact will be coupled to the first and second liners of the STI region.
Examiner’s Note: The Examiner notes that the term “coupling” does not require direct contact between structures. Instead a first structure may be coupled to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 2, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
When the first liner of Mandelman and the backside contact of Chung are included in the structure of Lee as stated above, the backside contact will be connected (See the Examiner’s Note below) to the first liner of the STI region.
Examiner’s Note: The Examiner notes that the term “connected” does not require direct contact between structures. Instead a first structure may be coupled to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 3, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
When the second liner of Mandelman and the backside contact of Chung are included in the structure of Lee as stated above, the backside contact will be connected (See the Examiner’s Note below) to the side surface of the second liner of the STI region.
Examiner’s Note: The Examiner notes that the term “connected” does not require direct contact between structures. Instead a first structure may be connected to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 4, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
Fig. 8 of Lee further teaches where the transistor comprises an epitaxial region (Item 802).
Lee does not teach where the backside contact is connected to the epitaxial region.
Fig. 2 of Chung further teaches where a backside contact (Item 170) is connected to an epitaxial region (Item 150).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the backside contact be connected to the epitaxial region because the backside contact being connected to the epitaxial region of the transistor allows electrical contact between a transistor and a backside wiring (Chung Paragraph 0128).
Regarding claim 5, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
Fig. 8 of Lee further teaches where the transistor comprises an epitaxial region (Item 802).
Lee does not teach where the epitaxial region has a cavity nor where the backside contact is formed in the cavity of the epitaxial region.
Fig. 2 of Chung further teaches where an epitaxial region (Item 150) has a cavity and where a backside contact (Item 170) is formed in the cavity of the epitaxial region (Item 150).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the epitaxial region have a cavity, where the backside contact is formed in the cavity of the epitaxial region because this allows for greater contact surface area between the epitaxial region and the backside contact (Chung Paragraph 0131).
Regarding claim 6, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
Lee does not teach where the first and the second liners comprise different materials.
Mandelman further teaches where the first (Item 35) and the second liner (Item 40) comprise different materials (Paragraph 0041 where the first liner is a CVD oxide and Paragraph 0045 where the second liner may include silicate glass).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the first and the second liners comprise different materials because these materials are known to form an isolation region which provides for low dielectric constant isolation for reduced coupling and provides for reduced noise for low voltage applications.
Regarding claim 7, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
Lee does not teach where the fill material is different from materials of the first and second liners.
Mandelman further teaches where the fill material (Item 44) and first (Item 35) and the second liner (Item 40) comprise different materials (Paragraph 0041 where the first liner is a CVD oxide and Paragraph 0045 where the second liner may include silicate glass and Paragraph 0056 where the fill material may include a high-plasma oxide).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the film material be different from the materials of the first and second liners because these materials are known to form an isolation region which provides for low dielectric constant isolation for reduced coupling and provides for reduced noise for low voltage applications.
Regarding claim 8, Figs. 8 and 8A of Lee teaches a method comprising: providing a transistor (Item nFET) adjacent to a shallow trench isolation (STI) region (Item STI), the STI region comprising a first liner (Item 302), a second liner (Item 304), and a fill material (Item 402).
Lee does not teach the second liner being pinched off in a portion of the STI region.
Fig. 1G of Mandelman teaches an isolation region between transistors where the isolation region comprises a first liner (Item 35), a second liner (Item 40) and a fill material (Item 44), the second liner (Item 40) being pinched off (Paragraph 0045) in a portion of the isolation region.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the second liner being pinched off in a portion of the STI region because an isolation region having this structure is known to enable extreme scaling and provides for low dielectric constant isolation for reduced coupling and provides for reduced noise for low voltage applications (Mandelman Paragraph 0065).
Lee does not teach coupling a backside contact to the transistor, the first liner and the second liner.
Fig. 2 of Chung teaches coupling (See Examiner’s Note below) a backside contact (Item 170) to a transistor and a dielectric region (Item 105) between transistors.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to couple a backside contact to the transistor, the first liner and the second liner because the backside contact allows electrical contact between a transistor and a backside wiring (Chung Paragraph 0128).
When the first and second liners of Mandelman and the backside contact of Chung are included in the structure of Lee as stated above, the backside contact will be coupled to the first and second liners of the STI region.
Examiner’s Note: The Examiner notes that the term “coupling” does not require direct contact between structures. Instead a first structure may be coupled to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 9, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
When the first liner of Mandelman and the backside contact of Chung are included in the structure of Lee as stated above, the backside contact will be connected (See the Examiner’s Note below) to the first liner of the STI region.
Examiner’s Note: The Examiner notes that the term “connected” does not require direct contact between structures. Instead a first structure may be coupled to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 10, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
When the second liner of Mandelman and the backside contact of Chung are included in the structure of Lee as stated above, the backside contact will be connected (See the Examiner’s Note below) to the side surface of the second liner of the STI region.
Examiner’s Note: The Examiner notes that the term “connected” does not require direct contact between structures. Instead a first structure may be connected to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 11, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
Fig. 8 of Lee further teaches where the transistor comprises an epitaxial region (Item 802).
Lee does not teach where the backside contact is connected to the epitaxial region.
Fig. 2 of Chung further teaches where a backside contact (Item 170) is connected to an epitaxial region (Item 150).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the backside contact be connected to the epitaxial region because the backside contact being connected to the epitaxial region of the transistor allows electrical contact between a transistor and a backside wiring (Chung Paragraph 0128).
Regarding claim 12, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
Fig. 8 of Lee further teaches where the transistor comprises an epitaxial region (Item 802).
Lee does not teach where the epitaxial region has a cavity nor where the backside contact is formed in the cavity of the epitaxial region.
Fig. 2 of Chung further teaches where an epitaxial region (Item 150) has a cavity and where a backside contact (Item 170) is formed in the cavity of the epitaxial region (Item 150).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the epitaxial region have a cavity, where the backside contact is formed in the cavity of the epitaxial region because this allows for greater contact surface area between the epitaxial region and the backside contact (Chung Paragraph 0131).
Regarding claim 13, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
Lee does not teach where the first and the second liners comprise different materials.
Mandelman further teaches where the first (Item 35) and the second liner (Item 40) comprise different materials (Paragraph 0041 where the first liner is a CVD oxide and Paragraph 0045 where the second liner may include silicate glass).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the first and the second liners comprise different materials because these materials are known to form an isolation region which provides for low dielectric constant isolation for reduced coupling and provides for reduced noise for low voltage applications.
Regarding claim 14, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
Lee does not teach where the fill material is different from materials of the first and second liners.
Mandelman further teaches where the fill material (Item 44) and first (Item 35) and the second liner (Item 40) comprise different materials (Paragraph 0041 where the first liner is a CVD oxide and Paragraph 0045 where the second liner may include silicate glass and Paragraph 0056 where the fill material may include a high-plasma oxide).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the film material be different from the materials of the first and second liners because these materials are known to form an isolation region which provides for low dielectric constant isolation for reduced coupling and provides for reduced noise for low voltage applications.
Regarding claim 8, Figs. 8 and 8A of Lee teaches a method comprising: providing a first transistor (Item nFET) and second transistor (Item pFET) separated by a shallow trench isolation (STI) region (Item STI), the STI region comprising a first liner (Item 302), a second liner (Item 304), and a fill material (Item 402).
Lee does not teach the second liner being pinched off in a portion of the STI region.
Fig. 1G of Mandelman teaches an isolation region between transistors where the isolation region comprises a first liner (Item 35), a second liner (Item 40) and a fill material (Item 44), the second liner (Item 40) being pinched off (Paragraph 0045) in a portion of the isolation region.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the second liner being pinched off in a portion of the STI region because an isolation region having this structure is known to enable extreme scaling and provides for low dielectric constant isolation for reduced coupling and provides for reduced noise for low voltage applications (Mandelman Paragraph 0065).
Lee does not teach coupling a backside contacts to the first and second transistors, the first liner and the second liner.
Fig. 2 of Chung teaches coupling (See Examiner’s Note below) a backside contact (Item 170) to a transistor and a dielectric region (Item 105) between transistors.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to couple backside contacts to the first and second transistors, the first liner and the second liner because the backside contact allows electrical contact between a transistor and a backside wiring (Chung Paragraph 0128).
When the first and second liners of Mandelman and the backside contact of Chung are included in the structure of Lee as stated above, the backside contact will be coupled to the first and second liners of the STI region.
Examiner’s Note: The Examiner notes that the term “coupling” does not require direct contact between structures. Instead a first structure may be coupled to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 16, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
When the first liner of Mandelman and the backside contacts of Chung are included in the structure of Lee as stated above, the backside contacts will be connected (See the Examiner’s Note below) to the first liner of the STI region.
Examiner’s Note: The Examiner notes that the term “connected” does not require direct contact between structures. Instead a first structure may be coupled to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 17, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
When the second liner of Mandelman and the backside contacts of Chung are included in the structure of Lee as stated above, the backside contacts will be connected (See the Examiner’s Note below) to a side surface of the second liner of the STI region.
Examiner’s Note: The Examiner notes that the term “connected” does not require direct contact between structures. Instead a first structure may be connected to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 18, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
Fig. 8 of Lee further teaches where the first and second transistors comprises epitaxial regions (Item 802).
Lee does not teach where the backside contacts are connected to the epitaxial regions.
Fig. 2 of Chung further teaches where a backside contact (Item 170) is connected to an epitaxial region (Item 150).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the backside contacts be connected to the epitaxial region because the backside contacts being connected to the epitaxial regions of the transistors allows electrical contact between a transistor and a backside wiring (Chung Paragraph 0128).
Regarding claim 19, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
Fig. 8 of Lee further teaches where the first and second transistors comprise epitaxial regions (Items 802 and 804, respectively).
Lee does not teach where the first and second epitaxial regions have cavities nor where the backside contacts are formed in the cavities of the epitaxial regions.
Fig. 2 of Chung further teaches where an epitaxial region (Item 150) has a cavity and where a backside contact (Item 170) is formed in the cavity of the epitaxial region (Item 150).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the first and second epitaxial regions have cavities, where the backside contacts are formed in the cavities of the epitaxial regions because this allows for greater contact surface area between the epitaxial regions and the backside contacts (Chung Paragraph 0131).
Regarding claim 20, the combination of Lee, Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
Lee does not teach where the first and the second liners comprise different materials.
Mandelman further teaches where the first (Item 35) and the second liner (Item 40) comprise different materials (Paragraph 0041 where the first liner is a CVD oxide and Paragraph 0045 where the second liner may include silicate glass).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the first and the second liners comprise different materials because these materials are known to form an isolation region which provides for low dielectric constant isolation for reduced coupling and provides for reduced noise for low voltage applications.
Claims 1-3, 6-10, 13-16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Mandelman et al. (US 2002/0171118) hereinafter “Mandelman” in view of Chung et al. (US 2025/0063763) hereinafter “Chung”.
Regarding claim 1, Figs. 1G and 2A of Mandelman teach a semiconductor structure comprising: a transistor (Paragraph 0060) adjacent to a shallow trench isolation (STI) region (Item Deep Slit STI), the STI region comprising a first liner (Item 35), a second liner (Item 40), and a fill material (Item 44), the second liner (Item 40) being pinched off (Paragraph 0045) in a portion of the isolation region.
Mandelman does not teach a backside contact coupled to the transistor, the first liner and the second liner.
Fig. 2 of Chung teaches a backside contact (Combination of Items 170) coupled (See Examiner’s Note below) to a transistor and a dielectric region (Item 105) between transistors.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have a backside contact coupled to the transistor, the first liner and the second liner because the backside contact allows electrical contact between a transistor and a backside wiring (Chung Paragraph 0128).
When the backside contact of Chung is included in the structure of Mandelman as stated above, the backside contact will be coupled to the first and second liners of the STI region.
Examiner’s Note: The Examiner notes that the term “coupling” does not require direct contact between structures. Instead a first structure may be coupled to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 2, the combination of Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
When the backside contact of Chung is included in the structure of Mandelman as stated above, the backside contact will be connected (See the Examiner’s Note below) to the first liner of the STI region.
Examiner’s Note: The Examiner notes that the term “connected” does not require direct contact between structures. Instead a first structure may be coupled to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 3, the combination of Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
When the backside contact of Chung is included in the structure of Mandelman as stated above, the backside contact will be connected (See the Examiner’s Note below) to the side surface of the second liner of the STI region.
Examiner’s Note: The Examiner notes that the term “connected” does not require direct contact between structures. Instead a first structure may be connected to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 6, Mandelman further teaches where the first (Item 35) and the second liner (Item 40) comprise different materials (Paragraph 0041 where the first liner is a CVD oxide and Paragraph 0045 where the second liner may include silicate glass).
Regarding claim 7, Mandelman further teaches where the fill material (Item 44) and first (Item 35) and the second liner (Item 40) comprise different materials (Paragraph 0041 where the first liner is a CVD oxide and Paragraph 0045 where the second liner may include silicate glass and Paragraph 0056 where the fill material may include a high-plasma oxide).
Regarding claim 8, Figs. 1G and 2A of Mandelman teach a method comprising: providing a transistor (Paragraph 0060) adjacent to a shallow trench isolation (STI) region (Item Deep Slit STI), the STI region comprising a first liner (Item 35), a second liner (Item 40), and a fill material (Item 44), the second liner (Item 40) being pinched off (Paragraph 0045) in a portion of the STI region.
Mandelman does not teach coupling a backside contact to the transistor, the first liner and the second liner.
Fig. 2 of Chung teaches coupling (See Examiner’s Note below) a backside contact (Combination of Items 170) to a transistor and a dielectric region (Item 105) between transistors.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to couple a backside contact to the transistor, the first liner and the second liner because coupling the backside contact allows electrical contact between a transistor and a backside wiring (Chung Paragraph 0128).
When the backside contact of Chung is included in the structure of Mandelman as stated above, the backside contact will be coupled to the first and second liners of the STI region.
Examiner’s Note: The Examiner notes that the term “coupling” does not require direct contact between structures. Instead a first structure may be coupled to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 9, the combination of Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
When the backside contact of Chung is included in the structure of Mandelman as stated above, the backside contact will be connected (See the Examiner’s Note below) to the first liner of the STI region.
Examiner’s Note: The Examiner notes that the term “connected” does not require direct contact between structures. Instead a first structure may be coupled to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 10, the combination of Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
When the backside contact of Chung is included in the structure of Mandelman as stated above, the backside contact will be connected (See the Examiner’s Note below) to the side surface of the second liner of the STI region.
Examiner’s Note: The Examiner notes that the term “connected” does not require direct contact between structures. Instead a first structure may be connected to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 13, Mandelman further teaches where the first (Item 35) and the second liner (Item 40) comprise different materials (Paragraph 0041 where the first liner is a CVD oxide and Paragraph 0045 where the second liner may include silicate glass).
Regarding claim 14, Mandelman further teaches where the fill material (Item 44) and first (Item 35) and the second liner (Item 40) comprise different materials (Paragraph 0041 where the first liner is a CVD oxide and Paragraph 0045 where the second liner may include silicate glass and Paragraph 0056 where the fill material may include a high-plasma oxide).
Regarding claim 15, Figs. 1G and 2A of Mandelman teach a method comprising: providing a first transistor and a second transistor (Paragraph 0060) separated by a shallow trench isolation (STI) region (Item Deep Slit STI), the STI region comprising a first liner (Item 35), a second liner (Item 40), and a fill material (Item 44), the second liner (Item 40) being pinched off (Paragraph 0045) in a portion of the STI region.
Mandelman does not teach coupling backside contacts to the first and second transistors, the first liner and the second liner.
Fig. 2 of Chung teaches coupling (See Examiner’s Note below) a backside contact (Combination of Items 170) to a transistor and a dielectric region (Item 105) between transistors.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to couple backside contacts to the first and second transistors, the first liner and the second liner because coupling the backside contacts allows electrical contact between transistors and a backside wiring (Chung Paragraph 0128).
When the backside contact of Chung is included in the structure of Mandelman as stated above, the backside contact will be coupled to the first and second liners of the STI region.
Examiner’s Note: The Examiner notes that the term “coupling” does not require direct contact between structures. Instead a first structure may be coupled to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 16, the combination of Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
When the backside contacts of Chung are included in the structure of Mandelman as stated above, the backside contacts will be connected (See the Examiner’s Note below) to the first liner of the STI region.
Examiner’s Note: The Examiner notes that the term “connected” does not require direct contact between structures. Instead a first structure may be coupled to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 17, the combination of Mandelman and Chung teaches all of the elements of the claimed invention as stated above.
When the backside contacts of Chung are included in the structure of Mandelman as stated above, the backside contacts will be connected (See the Examiner’s Note below) to a side surface of the second liner of the STI region.
Examiner’s Note: The Examiner notes that the term “connected” does not require direct contact between structures. Instead a first structure may be connected to a second structure via a number of intermediate structures between the first and second structures.
Regarding claim 20, Mandelman further teaches where the first (Item 35) and the second liner (Item 40) comprise different materials (Paragraph 0041 where the first liner is a CVD oxide and Paragraph 0045 where the second liner may include silicate glass).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC K ASHBAHIAN whose telephone number is (571)270-5187. The examiner can normally be reached 8-5:30 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERIC K ASHBAHIAN/Primary Examiner, Art Unit 2891
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