DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 5, 8-9, 12, and 15-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Rigetti et al., (US 2022/0084085 A1, hereinafter Rigetti).
Regarding claims 1, 8, and 17, taking claim 1 as exemplary:
Rigetti shows:
“A system comprising: a memory that stores computer executable components; a processor that executes computer executable components stored in the memory, wherein the computer executable components comprise:” (Paragraph [0048]: “The classical processors 111 can include various kinds of apparatus, devices, and machines for processing data, including, by way of example, a microprocessor, a central processing unit (CPU), a graphics processing unit (GPU), an FPGA (field programmable gate array), an ASIC (application specific integrated circuit), or combinations of these. The memory 112 can include, for example, a random access memory (RAM), a storage device (e.g., a writable read-only memory (ROM) or others), a hard disk, or another type of storage medium. The memory 112 can include various forms of volatile or non-volatile memory, media and memory devices, etc.” And in paragraph [0050]: “the servers 108 generate programs, identify appropriate computing resources (e.g., a QPU or QVM) in the computing system 101 to execute the programs, and send the programs to the identified resources for execution. For example, the servers 108 may send programs to the quantum computing system 103A, the quantum computing system 103B or any of the other resources 107. The programs may include classical programs, quantum programs, hybrid classical/quantum programs, and may include any type of function, code, data, instruction set, etc.”) And in paragraph [0068]: “all or part of the quantum processing unit 102A functions as a quantum processor, a quantum memory, or another type of subsystem. In some examples, the quantum processing unit 102A includes a quantum circuit system. The quantum circuit system may include qubit devices, readout devices and possibly other devices that are used to store and process quantum information.”
“a scheduling component that determines a first set of qubits to execute a first quantum job on a quantum processor and a second set of qubits to execute a second quantum job, wherein the second set of qubits does not include the first set of qubits or a first set of idle qubits;” (Paragraph [0184]: “a computer system for matching quantum computing programs to particular subsets of qubits on one or more quantum processor units, may comprise: (1) an anonymizer unit for: receiving a quantum computing program by the anonymizer unit, the anonymizer unit processing the quantum computing program to remove distinguishing characteristics of a quantum computing program for anonymizing the quantum computing program; and (2) an adviser for: extracting a basic structure of the anonymized quantum computing program, the basic structure including one or more of qubit count, qubit connectivity, native gate sets, fidelity-type measurements of native gates, readout fidelity, execution fidelity, relaxation or coherence time measurements, randomized benchmarking results, run quality of certain standard programs, historical quantum processor unit performance drifts, and coherent and incoherent noise channel measurements; comparing the basic structure of the anonymized quantum computing program with structures of a plurality of quantum execution targets, wherein the quantum execution targets are subsets of qubits and qubit-qubit links on one or more quantum computational devices, and determining appropriate quantum execution targets using a heuristic, the heuristic including one or more of: matching native gate sets, matching plaquette and desired topologies, meeting fidelity requirements, and meeting coherence time or relaxation time requirements; and generating output identifying recommended quantum execution targets for the quantum computing program.” In paragraph [0186]: “FIG. 17 shows a representation 1700 of a 16 qubit QPU 1701 with changing plaquette configurations over 4 subsequent epochs 1702 (t=0, 1, 2, 3) where individual qubits are grouped into a plaquette for each epoch (filled circles 1703). Plaquettes can generally persist for several epochs (vertical dashed lines) and may be separated by unused and inactive qubits (open circles 1704) to prevent or reduce cross talk or entanglement between plaquettes.” And in paragraph [0187]: “Process 1800 for combining plaquettes on an array of plaquettes is represented in FIG. 18, where individually requested plaquettes are combined to larger and more regularly shaped (e.g., convex with near minimal circumference) subgraphs, with reserved unused and inactive qubits for crosstalk reduction, etc. as discussed above. The graph of 2-qubit gates naturally provides a criterion for how such a boundary should be defined. For example, one could require that when removing the boundary unused qubits from the 2-qubit graph, the graph components corresponding to different plaquettes must be disconnected, i.e., no path exists that originates in one plaquette and ends in another. A different way of defining which qubits must be unused and inactive could be by using an empirically calibrated matrix of qubit-qubit cross-talk, i.e, a matrix (S_jk) where j and k are labels for qubits on the device which specifies the strength (e.g., in decibels or some other relevant unit) of cross-talk between qubits j and k. In this case the requirement could be to disallow any qubits labeled j, k from different plaquettes to have S_jk larger than some threshold. Combined plaquette blocks can be merged to form ever larger tiles. For example, plaquettes 1801 and 1802 can be combined, with unused qubits 1806 (open circles) between the plaquettes, forming a first combined plaquette block 1803. The first combined plaquette block 1803 can then be combined with a plaquette block 1804, again with unused qubits between adjacent plaquettes, to form a second combined plaquette block 1805.” – The use of plaquettes to for matching quantum computer programs to particular sets of qubits for processing and that this is separated by idle qubits is scheduling that determines a first set of qubits to execute a first quantum job on a quantum processor and a second set of qubits to execute a second quantum job where the second set of qubits does not include the first set of qubits or a first set of idle qubits.)
“and an isolation component that determines the first set of idle qubits, wherein the first set of idle qubits isolates the first set of qubits from crosstalk of other operations on the quantum processor.” (Paragraph [0186]: “FIG. 17 shows a representation 1700 of a 16 qubit QPU 1701 with changing plaquette configurations over 4 subsequent epochs 1702 (t=0, 1, 2, 3) where individual qubits are grouped into a plaquette for each epoch (filled circles 1703). Plaquettes can generally persist for several epochs (vertical dashed lines) and may be separated by unused and inactive qubits (open circles 1704) to prevent or reduce cross talk or entanglement between plaquettes.” And in paragraph [0187]: “Process 1800 for combining plaquettes on an array of plaquettes is represented in FIG. 18, where individually requested plaquettes are combined to larger and more regularly shaped (e.g., convex with near minimal circumference) subgraphs, with reserved unused and inactive qubits for crosstalk reduction, etc. as discussed above. The graph of 2-qubit gates naturally provides a criterion for how such a boundary should be defined. For example, one could require that when removing the boundary unused qubits from the 2-qubit graph, the graph components corresponding to different plaquettes must be disconnected, i.e., no path exists that originates in one plaquette and ends in another. A different way of defining which qubits must be unused and inactive could be by using an empirically calibrated matrix of qubit-qubit cross-talk, i.e, a matrix (S_jk) where j and k are labels for qubits on the device which specifies the strength (e.g., in decibels or some other relevant unit) of cross-talk between qubits j and k. In this case the requirement could be to disallow any qubits labeled j, k from different plaquettes to have S_jk larger than some threshold. Combined plaquette blocks can be merged to form ever larger tiles. For example, plaquettes 1801 and 1802 can be combined, with unused qubits 1806 (open circles) between the plaquettes, forming a first combined plaquette block 1803. The first combined plaquette block 1803 can then be combined with a plaquette block 1804, again with unused qubits between adjacent plaquettes, to form a second combined plaquette block 1805.”)
Regarding claims 2, 9, and 18, taking claim 2 as exemplary:
Rigetti shows the system, method, and computer program product of claims 1, 8, and 17 as claimed and specified above.
And Rigetti shows “wherein the scheduling component further schedules the first quantum job and the second quantum job for simultaneous execution on the quantum processor.” (Paragraph [0143]: “A single user can be allocated resources across multiple HPU units, and the resources within each HPU can be allocated among many simultaneous user programs. At a finer level, multiple users can run on subsets of qubits within each QPU unit, and the classical portion of the program control can run on subsets of the CPU cores available in each HPU.” And in paragraph [0193]: “scheduling a heuristic that operates by hierarchically combining requests for qubit plaquettes of comparable size in order to make the scheduling problem tractable by allocating larger segments of the quantum processor at once, where requested plaquettes can be grouped by their size and connectivity (very small plaquettes are then combined into larger super-plaquettes with ideally very simple shapes—e.g. rectangular—that are subsequently easier to tile the full QPU with; scheduling and partitioning qubits on a quantum processor such that cross-talk from simultaneously executed programs on nearby plaquettes is minimized;”)
Regarding claims 5 and 12, taking claim 5 as exemplary:
Rigetti shows the system and method of claims 1 and 8 as claimed and specified above.
And Rigetti shows “wherein the first quantum job and the second quantum job comprise different quantum jobs.” (Paragraph [0184]: “a computer system for matching quantum computing programs to particular subsets of qubits on one or more quantum processor units, may comprise: (1) an anonymizer unit for: receiving a quantum computing program by the anonymizer unit, the anonymizer unit processing the quantum computing program to remove distinguishing characteristics of a quantum computing program for anonymizing the quantum computing program; and (2) an adviser for: extracting a basic structure of the anonymized quantum computing program, the basic structure including one or more of qubit count, qubit connectivity, native gate sets, fidelity-type measurements of native gates, readout fidelity, execution fidelity, relaxation or coherence time measurements, randomized benchmarking results, run quality of certain standard programs, historical quantum processor unit performance drifts, and coherent and incoherent noise channel measurements; comparing the basic structure of the anonymized quantum computing program with structures of a plurality of quantum execution targets, wherein the quantum execution targets are subsets of qubits and qubit-qubit links on one or more quantum computational devices, and determining appropriate quantum execution targets using a heuristic, the heuristic including one or more of: matching native gate sets, matching plaquette and desired topologies, meeting fidelity requirements, and meeting coherence time or relaxation time requirements; and generating output identifying recommended quantum execution targets for the quantum computing program.” – the use of matching of plaquettes of qubits to quantum programs shows that the quantum jobs are different. Additionally, the jobs are different because they will be running on different plaquettes and exist on different plaquettes.)
Regarding claims 15 and 20, taking claim 15 as exemplary:
Rigetti shows the method and computer program product of claims 8 and 17 as claimed and specified above.
And Rigetti shows “determining, by the system, one or more additional sets of idle qubits, wherein a set of idle qubits of the one or more additional sets of idle qubits isolates the second set of qubits from crosstalk of other operations on the quantum processor; and determining, by the system, one or more additional sets of qubits to execute one or more additional quantum jobs, wherein the one or more additional sets of qubits does not include the first set of qubits, the first set of idle qubits, the second set of qubits, or the one or more additional sets of idle qubits.” (Paragraph [0186]: “FIG. 17 shows a representation 1700 of a 16 qubit QPU 1701 with changing plaquette configurations over 4 subsequent epochs 1702 (t=0, 1, 2, 3) where individual qubits are grouped into a plaquette for each epoch (filled circles 1703). Plaquettes can generally persist for several epochs (vertical dashed lines) and may be separated by unused and inactive qubits (open circles 1704) to prevent or reduce cross talk or entanglement between plaquettes.” And in paragraph [0187]: “Process 1800 for combining plaquettes on an array of plaquettes is represented in FIG. 18, where individually requested plaquettes are combined to larger and more regularly shaped (e.g., convex with near minimal circumference) subgraphs, with reserved unused and inactive qubits for crosstalk reduction, etc. as discussed above. The graph of 2-qubit gates naturally provides a criterion for how such a boundary should be defined. For example, one could require that when removing the boundary unused qubits from the 2-qubit graph, the graph components corresponding to different plaquettes must be disconnected, i.e., no path exists that originates in one plaquette and ends in another. A different way of defining which qubits must be unused and inactive could be by using an empirically calibrated matrix of qubit-qubit cross-talk, i.e, a matrix (S_jk) where j and k are labels for qubits on the device which specifies the strength (e.g., in decibels or some other relevant unit) of cross-talk between qubits j and k. In this case the requirement could be to disallow any qubits labeled j, k from different plaquettes to have S_jk larger than some threshold. Combined plaquette blocks can be merged to form ever larger tiles. For example, plaquettes 1801 and 1802 can be combined, with unused qubits 1806 (open circles) between the plaquettes, forming a first combined plaquette block 1803. The first combined plaquette block 1803 can then be combined with a plaquette block 1804, again with unused qubits between adjacent plaquettes, to form a second combined plaquette block 1805.” – the continual changing plaquette formations of qubits separated by inactive qubits is the additional sets of idle quits used to isolate for to prevent crosstalk.)
Regarding claims 16 and 19, taking claim 16 as exemplary:
Rigetti shows the method and computer program product of claims 8 and 17 as claimed and specified above.
And Rigetti shows “wherein the first set of qubits and the second set of qubits are determined based on at least one of performance history of the quantum processor, coherence times, gate fidelity and calibration data.” (Paragraph [0184]: “a computer system for matching quantum computing programs to particular subsets of qubits on one or more quantum processor units, may comprise: (1) an anonymizer unit for: receiving a quantum computing program by the anonymizer unit, the anonymizer unit processing the quantum computing program to remove distinguishing characteristics of a quantum computing program for anonymizing the quantum computing program; and (2) an adviser for: extracting a basic structure of the anonymized quantum computing program, the basic structure including one or more of qubit count, qubit connectivity, native gate sets, fidelity-type measurements of native gates, readout fidelity, execution fidelity, relaxation or coherence time measurements, randomized benchmarking results, run quality of certain standard programs, historical quantum processor unit performance drifts, and coherent and incoherent noise channel measurements; comparing the basic structure of the anonymized quantum computing program with structures of a plurality of quantum execution targets, wherein the quantum execution targets are subsets of qubits and qubit-qubit links on one or more quantum computational devices, and determining appropriate quantum execution targets using a heuristic, the heuristic including one or more of: matching native gate sets, matching plaquette and desired topologies, meeting fidelity requirements, and meeting coherence time or relaxation time requirements; and generating output identifying recommended quantum execution targets for the quantum computing program.”)
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 3, 7, 10, and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Rigetti in view of Coady et al., (US 2022/0269964 A1, hereinafter Coady).
Regarding claims 3 and 10, taking claim 3 as exemplary:
Rigetti shows the system and method of claims 1 and 8 as claimed and specified above.
But Rigetti does not appear to explicitly recite “wherein the first quantum job and the second quantum job comprise copies of identical quantum jobs.”
However, Coady teaches “wherein the first quantum job and the second quantum job comprise copies of identical quantum jobs.” (Paragraph [0017]: “The quantum process manager then duplicates the first quantum process as a second quantum process in a manner analogous to conventional duplication of a classical computing process.”)
Rigetti and Coady are analogous in the arts because both Rigetti and Coady describe quantum job processes.
Therefore, it would be obvious to one of ordinary skill in the art at the filing date of the instant application, having the teachings of Rigetti and Coady before him or her, to modify the teachings of Rigetti to include the teachings of Coady in order to support user request for copying and duplicating quantum processes and thereby increase useability (see Coady paragraph [0024]).
Regarding claims 7 and 14, taking claim 7 as exemplary:
Rigetti shows the system and method of claims 5 and 12 as claimed and specified above.
But Rigetti does not appear to explicitly recite “wherein the first quantum job and the second quantum job comprise copies of identical quantum jobs.”
However, Coady teaches “wherein the second quantum job comprises a runtime less than or equal to a runtime of the first quantum job.” (Paragraph [0017]: “The quantum process manager then duplicates the first quantum process as a second quantum process in a manner analogous to conventional duplication of a classical computing process.” – the duplicated quantum process that then is executed becomes a second different quantum job with an equal runtime as the first runtime job.)
Rigetti and Coady are analogous in the arts because both Rigetti and Coady describe quantum job processes.
Therefore, it would be obvious to one of ordinary skill in the art at the filing date of the instant application, having the teachings of Rigetti and Coady before him or her, to modify the teachings of Rigetti to include the teachings of Coady in order to support user request for copying and duplicating quantum processes and thereby increase useability (see Coady paragraph [0024]).
Claim(s) 6 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fitzpatrick et al., (US 2023/0315516 A1, hereinafter Fitzpatrick).
Regarding claims 6 and 13, taking claim 6 as exemplary:
Rigetti shows the system and method of claims 1 and 12 as claimed and specified above.
But Rigetti does not appear to explicitly recite “wherein at least one of the first quantum job or the second quantum job comprises a monitoring job.”
However, Fitzpatrick teaches “wherein at least one of the first quantum job or the second quantum job comprises a monitoring job.” (Paragraph [0031]: “To that end, the various aspects and embodiments herein relate to techniques for enhanced calibration and performance of quantum computers are presented. A monitoring job component can execute monitoring jobs on a quantum computer. A set (e.g., group) of system parameter values of system parameters associated with the quantum computer can be determined, estimated, or measured based on the execution of the monitoring jobs.”)
Rigetti and Fitzpatrick are analogous in the arts because both Rigetti and Fitzpatrick describe running jobs on a quantum computer.
Therefore, it would be obvious to one of ordinary skill in the art at the filing date of the instant application, having the teachings of Rigetti and Fitzpatrick before him or her, to modify the teachings of Rigetti to include the teachings of Fitzpatrick in order to increase marketability of Rigetti by including the added features of running monitoring jobs on quantum processor of Fitzpatrick (see Fitzpatrick paragraph [0031]).
Allowable Subject Matter
Claims 4 and 11 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
As per claims 4 and 11, taking claim 4 as exemplary:
Though Rigetti et al., (US 2022/0084085 A1), part of the prior art of record, teaches the use of multiple processes operating simultaneously of claims 4 and 11 through the use of scheduling quantum processes through plaquettes to reduce cross-talk in paragraphs [0143], [0187], and [0193].
And though Coady et al., (US 2022/0269964 A1), part of the prior art made of record, teaches the use of identical quantum processes of claims 4 and 11 through the duplicated processes in paragraph [0017].
And though Bishop et al., (US 2019/0156236 A1), part of the prior art made of record, teaches idle qubits in a cross-talk environment and the removing of cross talk of claims 1, 8, and 17 in paragraphs [0033] and [0080] through the use of idle qubits in a cross-talk environment and a calibration mode to remove crosstalk.
The primary reason for marking of allowable subject matter of dependent claims 4 and 11, taking claim 4 as exemplary, in the instant application, is the combination with the inclusion in these claims of the limitations of a system and method comprising:
“wherein the scheduling component further receives a number of iterations to execute the identical quantum jobs and schedules the copies of the identical quantum jobs for simultaneous execution on the quantum processor for the number of iterations divided by a number of copies of the identical quantum jobs.”
The prior art of made of record above neither anticipates nor renders obvious the above-recited combinations. Specifically, though the prior art of made of record does teach the use of identical quantum processes running simultaneously, it does not teach scheduling component that uses a number of iterations to execute the identical quantum jobs and then schedules… copies of the identical quantum jobs for simultaneous execution on the quantum processor for the number of iterations divided by a number of copies of the identical quantum jobs.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Bishop et al., (US 2019/0156236 A1), part of the prior art made of record, teaches idle qubits in a cross-talk environment and the removing of cross talk of claims 1, 8, and 17 in paragraphs [0033] and [0080] through the use of idle qubits in a cross-talk environment and a calibration mode to remove crosstalk.
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SHANE D. WOOLWINE
Primary Examiner
Art Unit 2124
/SHANE D WOOLWINE/Primary Examiner, Art Unit 2124
Prosecution Insights